msm: camera: Enable top debug status cfg register

In case of VFE Overflow print additional debug
information based on whether the overflow is
on bus side or in the IFE modules.

Change-Id: I292bab0e75824bd1f151a4824f25220784c81172
Signed-off-by: Vishalsingh Hajeri <[email protected]>
Signed-off-by: Venkat Chinta <[email protected]>

drivers/cam_cpas/cam_cpas_hw.c

@@ -377,15 +377,13 @@ static int cam_cpas_hw_reg_read(struct cam_hw_info *cpas_hw,
 	if (!CAM_CPAS_CLIENT_VALID(client_indx))
 		return -EINVAL;
 
-	mutex_lock(&cpas_core->client_mutex[client_indx]);
 	cpas_client = cpas_core->cpas_client[client_indx];
 
 	if (!CAM_CPAS_CLIENT_STARTED(cpas_core, client_indx)) {
 		CAM_ERR(CAM_CPAS, "client=[%d][%s][%d] has not started",
 			client_indx, cpas_client->data.identifier,
 			cpas_client->data.cell_index);
-		rc = -EPERM;
-		goto unlock_client;
+		return -EPERM;
 	}
 
 	if (mb)
@@ -397,8 +395,6 @@ static int cam_cpas_hw_reg_read(struct cam_hw_info *cpas_hw,
 
 	*value = reg_value;
 
-unlock_client:
-	mutex_unlock(&cpas_core->client_mutex[client_indx]);
 	return rc;
 }
 

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_vfe_hw_intf.h

@@ -60,6 +60,7 @@ enum cam_vfe_hw_irq_regs {
 	CAM_IFE_IRQ_CAMIF_REG_STATUS1           = 1,
 	CAM_IFE_IRQ_CAMIF_REG_STATUS2           = 2,
 	CAM_IFE_IRQ_VIOLATION_STATUS            = 3,
+	CAM_IFE_IRQ_BUS_OVERFLOW_STATUS         = 4,
 	CAM_IFE_IRQ_REGISTERS_MAX,
 };
 

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe480.h

@@ -80,6 +80,7 @@ static struct cam_vfe_camif_ver3_reg_data vfe_480_camif_reg_data = {
 	.enable_diagnostic_hw            = 0x1,
 	.pp_camif_cfg_en_shift           = 0,
 	.pp_camif_cfg_ife_out_en_shift   = 8,
+	.top_debug_cfg_en                = 1,
 };
 
 static struct cam_vfe_top_ver3_reg_offset_common vfe480_top_common_reg = {
@@ -106,6 +107,21 @@ static struct cam_vfe_top_ver3_reg_offset_common vfe480_top_common_reg = {
 	.diag_sensor_status_0     = 0x00000068,
 	.diag_sensor_status_1     = 0x00000098,
 	.bus_overflow_status      = 0x0000AA68,
+	.top_debug_cfg            = 0x000000DC,
+	.top_debug_0              = 0x00000080,
+	.top_debug_1              = 0x00000084,
+	.top_debug_2              = 0x00000088,
+	.top_debug_3              = 0x0000008C,
+	.top_debug_4              = 0x0000009C,
+	.top_debug_5              = 0x000000A0,
+	.top_debug_6              = 0x000000A4,
+	.top_debug_7              = 0x000000A8,
+	.top_debug_8              = 0x000000AC,
+	.top_debug_9              = 0x000000B0,
+	.top_debug_10             = 0x000000B4,
+	.top_debug_11             = 0x000000B8,
+	.top_debug_12             = 0x000000BC,
+	.top_debug_13             = 0x000000C0,
 };
 
 static struct cam_vfe_camif_lite_ver3_reg vfe480_camif_rdi[3] = {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe_lite48x.h

@@ -48,6 +48,11 @@ static struct cam_vfe_top_ver3_reg_offset_common vfe48x_top_common_reg = {
 	.diag_config              = 0x00000050,
 	.diag_sensor_status_0     = 0x00000054,
 	.bus_overflow_status      = 0x00001A68,
+	.top_debug_cfg            = 0x00000074,
+	.top_debug_0              = 0x0000005C,
+	.top_debug_1              = 0x00000068,
+	.top_debug_2              = 0x0000006C,
+	.top_debug_3              = 0x00000070,
 };
 
 static struct cam_vfe_camif_lite_ver3_reg vfe48x_camif_rdi[4] = {
@@ -118,6 +123,7 @@ static struct cam_vfe_camif_lite_ver3_reg_data vfe48x_camif_rdi_reg_data[4] = {
 		.error_irq_mask2                 = 0x100,
 		.subscribe_irq_mask1             = 0x3,
 		.enable_diagnostic_hw            = 0x1,
+		.top_debug_cfg_en                = 0x1,
 	},
 	{
 		.extern_reg_update_shift         = 0,
@@ -131,6 +137,7 @@ static struct cam_vfe_camif_lite_ver3_reg_data vfe48x_camif_rdi_reg_data[4] = {
 		.error_irq_mask2                 = 0x200,
 		.subscribe_irq_mask1             = 0x30,
 		.enable_diagnostic_hw            = 0x1,
+		.top_debug_cfg_en                = 0x1,
 	},
 	{
 		.extern_reg_update_shift         = 0,
@@ -144,6 +151,7 @@ static struct cam_vfe_camif_lite_ver3_reg_data vfe48x_camif_rdi_reg_data[4] = {
 		.error_irq_mask2                 = 0x400,
 		.subscribe_irq_mask1             = 0x300,
 		.enable_diagnostic_hw            = 0x1,
+		.top_debug_cfg_en                = 0x1,
 	},
 	{
 		.extern_reg_update_shift         = 0,
@@ -157,6 +165,7 @@ static struct cam_vfe_camif_lite_ver3_reg_data vfe48x_camif_rdi_reg_data[4] = {
 		.error_irq_mask2                 = 0x800,
 		.subscribe_irq_mask1             = 0x3000,
 		.enable_diagnostic_hw            = 0x1,
+		.top_debug_cfg_en                = 0x1,
 	},
 };
 

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_lite_ver3.c

@@ -17,6 +17,7 @@
 #include "cam_vfe_camif_lite_ver3.h"
 #include "cam_debug_util.h"
 #include "cam_cdm_util.h"
+#include "cam_cpas_api.h"
 
 struct cam_vfe_mux_camif_lite_data {
 	void __iomem                                *mem_base;
@@ -142,9 +143,8 @@ static int cam_vfe_camif_lite_err_irq_top_half(
 	evt_payload->irq_reg_val[i] = cam_io_r(camif_lite_priv->mem_base +
 		camif_lite_priv->common_reg->violation_status);
 
-	if (error_flag && !soc_private->is_ife_lite)
-		CAM_INFO(CAM_ISP, "Violation status = 0x%X",
-			evt_payload->irq_reg_val[i]);
+	evt_payload->irq_reg_val[++i] = cam_io_r(camif_lite_priv->mem_base +
+		camif_lite_priv->common_reg->bus_overflow_status);
 
 	th_payload->evt_payload_priv = evt_payload;
 
@@ -308,6 +308,10 @@ skip_core_cfg:
 	memset(err_irq_mask, 0, sizeof(err_irq_mask));
 	memset(irq_mask, 0, sizeof(irq_mask));
 
+	/* config debug status registers */
+	cam_io_w_mb(rsrc_data->reg_data->top_debug_cfg_en, rsrc_data->mem_base +
+		rsrc_data->common_reg->top_debug_cfg);
+
 	err_irq_mask[CAM_IFE_IRQ_CAMIF_REG_STATUS0] =
 		rsrc_data->reg_data->error_irq_mask0;
 	err_irq_mask[CAM_IFE_IRQ_CAMIF_REG_STATUS2] =
@@ -726,23 +730,93 @@ static int cam_vfe_camif_lite_process_cmd(
 	return rc;
 }
 
+static void cam_vfe_camif_lite_overflow_debug_info(uint32_t *status,
+	struct cam_vfe_mux_camif_lite_data *camif_lite_priv)
+{
+	uint32_t bus_overflow_status = 0;
+	struct cam_vfe_soc_private *soc_private = NULL;
+	uint32_t val0, val1, val2, val3;
+
+	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];
+	soc_private = camif_lite_priv->soc_info->soc_private;
+
+	if (bus_overflow_status) {
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
+		CAM_INFO(CAM_ISP,
+			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
+			val0, val1, val2);
+
+	} else {
+		val0 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_0);
+		val1 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_1);
+		val2 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_2);
+		val3 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_3);
+		CAM_INFO(CAM_ISP,
+			"status_0: 0x%X status_1: 0x%X status_2: 0x%X status_3: 0x%X",
+			val0, val1, val2, val3);
+
+		if (soc_private->is_ife_lite)
+			return;
+
+		val0 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_4);
+		val1 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_5);
+		val2 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_6);
+		val3 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_7);
+		CAM_INFO(CAM_ISP,
+			"status_4: 0x%X status_5: 0x%X status_6: 0x%X status_7: 0x%X",
+			val0, val1, val2, val3);
+		val0 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_8);
+		val1 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_9);
+		val2 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_10);
+		val3 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_11);
+		CAM_INFO(CAM_ISP,
+			"status_8: 0x%X status_9: 0x%X status_10: 0x%X status_11: 0x%X",
+			val0, val1, val2, val3);
+		val0 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_12);
+		val1 = cam_io_r(camif_lite_priv->mem_base +
+			camif_lite_priv->common_reg->top_debug_13);
+		CAM_INFO(CAM_ISP, "status_12: 0x%X status_13: 0x%X",
+			val0, val1);
+	}
+}
+
 static void cam_vfe_camif_lite_print_status(uint32_t *status,
-	int err_type, bool is_ife_lite)
+	int err_type, struct cam_vfe_mux_camif_lite_data *camif_lite_priv)
 {
 	uint32_t violation_mask = 0x3F00, violation_status = 0;
 	uint32_t bus_overflow_status = 0, status_0 = 0, status_2 = 0;
+	struct cam_vfe_soc_private *soc_private = NULL;
 
 	if (!status) {
 		CAM_ERR(CAM_ISP, "Invalid params");
 		return;
 	}
 
-	bus_overflow_status = status[CAM_IFE_IRQ_REGISTERS_MAX];
+	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];
 	violation_status = status[CAM_IFE_IRQ_VIOLATION_STATUS];
 	status_0 = status[CAM_IFE_IRQ_CAMIF_REG_STATUS0];
 	status_2 = status[CAM_IFE_IRQ_CAMIF_REG_STATUS2];
+	soc_private = camif_lite_priv->soc_info->soc_private;
 
-	if (is_ife_lite)
+	if (soc_private->is_ife_lite)
 		goto ife_lite;
 
 	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW) {
@@ -792,7 +866,8 @@ static void cam_vfe_camif_lite_print_status(uint32_t *status,
 
 	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {
 		CAM_INFO(CAM_ISP, "PDLIB / LCR Module hang");
-		/* print debug registers here */
+		/* print debug registers */
+		cam_vfe_camif_lite_overflow_debug_info(status, camif_lite_priv);
 		return;
 	}
 
@@ -874,6 +949,13 @@ ife_lite:
 			CAM_INFO(CAM_ISP, "RDI3 BUS OVERFLOW");
 	}
 
+	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {
+		CAM_INFO(CAM_ISP, "RDI hang");
+		/* print debug registers */
+		cam_vfe_camif_lite_overflow_debug_info(status, camif_lite_priv);
+		return;
+	}
+
 	if (err_type == CAM_VFE_IRQ_STATUS_VIOLATION) {
 		if (status_2 & 0x100)
 			CAM_INFO(CAM_ISP, "RDI0 CAMIF VIOLATION");
@@ -942,9 +1024,8 @@ static int cam_vfe_camif_lite_handle_irq_bottom_half(
 	struct cam_vfe_top_irq_evt_payload *payload;
 	struct cam_isp_hw_event_info evt_info;
 	struct cam_vfe_soc_private *soc_private = NULL;
-	uint32_t irq_status[CAM_IFE_IRQ_REGISTERS_MAX + 1];
+	uint32_t irq_status[CAM_IFE_IRQ_REGISTERS_MAX] = {0};
 	int i = 0;
-	bool is_ife_lite = true;
 
 	if (!handler_priv || !evt_payload_priv) {
 		CAM_ERR(CAM_ISP, "Invalid params");
@@ -961,10 +1042,6 @@ static int cam_vfe_camif_lite_handle_irq_bottom_half(
 		return -ENODEV;
 	}
 
-	is_ife_lite = soc_private->is_ife_lite;
-
-	memset(irq_status, 0,
-		sizeof(uint32_t) * (CAM_IFE_IRQ_REGISTERS_MAX + 1));
 	for (i = 0; i < CAM_IFE_IRQ_REGISTERS_MAX; i++)
 		irq_status[i] = payload->irq_reg_val[i];
 
@@ -1023,13 +1100,10 @@ static int cam_vfe_camif_lite_handle_irq_bottom_half(
 			camif_lite_priv->event_cb(camif_lite_priv->priv,
 				CAM_ISP_HW_EVENT_ERROR, (void *)&evt_info);
 
-		irq_status[CAM_IFE_IRQ_REGISTERS_MAX] =
-			cam_io_r(camif_lite_priv->mem_base +
-			camif_lite_priv->common_reg->bus_overflow_status);
-
 		ret = CAM_VFE_IRQ_STATUS_OVERFLOW;
 
-		cam_vfe_camif_lite_print_status(irq_status, ret, is_ife_lite);
+		cam_vfe_camif_lite_print_status(irq_status, ret,
+			camif_lite_priv);
 
 		if (camif_lite_priv->camif_debug & CAMIF_DEBUG_ENABLE_REG_DUMP)
 			cam_vfe_camif_lite_reg_dump(camif_lite_node);
@@ -1047,7 +1121,8 @@ static int cam_vfe_camif_lite_handle_irq_bottom_half(
 
 		ret = CAM_VFE_IRQ_STATUS_VIOLATION;
 
-		cam_vfe_camif_lite_print_status(irq_status, ret, is_ife_lite);
+		cam_vfe_camif_lite_print_status(irq_status, ret,
+			camif_lite_priv);
 
 		if (camif_lite_priv->camif_debug & CAMIF_DEBUG_ENABLE_REG_DUMP)
 			cam_vfe_camif_lite_reg_dump(camif_lite_node);

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_lite_ver3.h

@@ -40,6 +40,7 @@ struct cam_vfe_camif_lite_ver3_reg_data {
 	uint32_t     error_irq_mask2;
 	uint32_t     subscribe_irq_mask1;
 	uint32_t     enable_diagnostic_hw;
+	uint32_t     top_debug_cfg_en;
 };
 
 struct cam_vfe_camif_lite_ver3_hw_info {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_ver3.c

@@ -141,9 +141,8 @@ static int cam_vfe_camif_ver3_err_irq_top_half(
 	evt_payload->irq_reg_val[i] = cam_io_r(camif_priv->mem_base +
 		camif_priv->common_reg->violation_status);
 
-	if (error_flag)
-		CAM_INFO(CAM_ISP, "Violation status = 0x%X",
-			evt_payload->irq_reg_val[i]);
+	evt_payload->irq_reg_val[++i] = cam_io_r(camif_priv->mem_base +
+		camif_priv->common_reg->bus_overflow_status);
 
 	th_payload->evt_payload_priv = evt_payload;
 
@@ -374,6 +373,10 @@ static int cam_vfe_camif_ver3_resource_start(
 		return -ENODEV;
 	}
 
+	/* config debug status registers */
+	cam_io_w_mb(rsrc_data->reg_data->top_debug_cfg_en, rsrc_data->mem_base +
+		rsrc_data->common_reg->top_debug_cfg);
+
 	/*config vfe core*/
 	val = (rsrc_data->pix_pattern <<
 		rsrc_data->reg_data->pixel_pattern_shift);
@@ -733,8 +736,76 @@ static int cam_vfe_camif_ver3_process_cmd(
 	return rc;
 }
 
+
+static void cam_vfe_camif_ver3_overflow_debug_info(uint32_t *status,
+	struct cam_vfe_mux_camif_ver3_data *camif_priv)
+{
+	struct cam_vfe_soc_private *soc_private;
+	uint32_t bus_overflow_status;
+	uint32_t val0, val1, val2, val3;
+
+	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];
+	soc_private = camif_priv->soc_info->soc_private;
+
+	if (bus_overflow_status) {
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0xA20, true, &val0);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1420, true, &val1);
+		cam_cpas_reg_read(soc_private->cpas_handle,
+			CAM_CPAS_REG_CAMNOC, 0x1A20, true, &val2);
+		CAM_INFO(CAM_ISP,
+			"CAMNOC REG ife_linear: 0x%X ife_rdi_wr: 0x%X ife_ubwc_stats: 0x%X",
+			val0, val1, val2);
+	} else {
+		val0 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_0);
+		val1 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_1);
+		val2 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_2);
+		val3 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_3);
+		CAM_INFO(CAM_ISP,
+			"status_0: 0x%X status_1: 0x%X status_2: 0x%X status_3: 0x%X",
+			val0, val1, val2, val3);
+
+		val0 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_4);
+		val1 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_5);
+		val2 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_6);
+		val3 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_7);
+		CAM_INFO(CAM_ISP,
+			"status_4: 0x%X status_5: 0x%X status_6: 0x%X status_7: 0x%X",
+			val0, val1, val2, val3);
+
+		val0 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_8);
+		val1 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_9);
+		val2 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_10);
+		val3 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_11);
+		CAM_INFO(CAM_ISP,
+			"status_8: 0x%X status_9: 0x%X status_10: 0x%X status_11: 0x%X",
+			val0, val1, val2, val3);
+
+		val0 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_12);
+		val1 = cam_io_r(camif_priv->mem_base +
+			camif_priv->common_reg->top_debug_13);
+		CAM_INFO(CAM_ISP, "status_12: 0x%X status_13: 0x%X",
+			val0, val1);
+	}
+
+}
+
 static void cam_vfe_camif_ver3_print_status(uint32_t *status,
-	int err_type)
+	int err_type, struct cam_vfe_mux_camif_ver3_data *camif_priv)
 {
 	uint32_t violation_mask = 0x3F, module_id = 0;
 	uint32_t bus_overflow_status = 0, status_0 = 0, status_2 = 0;
@@ -744,7 +815,7 @@ static void cam_vfe_camif_ver3_print_status(uint32_t *status,
 		return;
 	}
 
-	bus_overflow_status = status[CAM_IFE_IRQ_REGISTERS_MAX];
+	bus_overflow_status = status[CAM_IFE_IRQ_BUS_OVERFLOW_STATUS];
 	status_0 = status[CAM_IFE_IRQ_CAMIF_REG_STATUS0];
 	status_2 = status[CAM_IFE_IRQ_CAMIF_REG_STATUS2];
 
@@ -829,6 +900,7 @@ static void cam_vfe_camif_ver3_print_status(uint32_t *status,
 	if (err_type == CAM_VFE_IRQ_STATUS_OVERFLOW && !bus_overflow_status) {
 		CAM_INFO(CAM_ISP, "PIXEL PIPE Module hang");
 		/* print debug registers */
+		cam_vfe_camif_ver3_overflow_debug_info(status, camif_priv);
 		return;
 	}
 
@@ -1100,7 +1172,7 @@ static int cam_vfe_camif_ver3_handle_irq_bottom_half(void *handler_priv,
 	struct cam_vfe_mux_camif_ver3_data *camif_priv;
 	struct cam_vfe_top_irq_evt_payload *payload;
 	struct cam_isp_hw_event_info evt_info;
-	uint32_t irq_status[CAM_IFE_IRQ_REGISTERS_MAX + 1] = {0};
+	uint32_t irq_status[CAM_IFE_IRQ_REGISTERS_MAX] = {0};
 	int i = 0;
 
 	if (!handler_priv || !evt_payload_priv) {
@@ -1177,13 +1249,9 @@ static int cam_vfe_camif_ver3_handle_irq_bottom_half(void *handler_priv,
 			camif_priv->event_cb(camif_priv->priv,
 				CAM_ISP_HW_EVENT_ERROR, (void *)&evt_info);
 
-		irq_status[CAM_IFE_IRQ_REGISTERS_MAX] =
-			cam_io_r(camif_priv->mem_base +
-			camif_priv->common_reg->bus_overflow_status);
-
 		ret = CAM_VFE_IRQ_STATUS_OVERFLOW;
 
-		cam_vfe_camif_ver3_print_status(irq_status, ret);
+		cam_vfe_camif_ver3_print_status(irq_status, ret, camif_priv);
 
 		if (camif_priv->camif_debug & CAMIF_DEBUG_ENABLE_REG_DUMP)
 			cam_vfe_camif_ver3_reg_dump(camif_node);
@@ -1198,7 +1266,7 @@ static int cam_vfe_camif_ver3_handle_irq_bottom_half(void *handler_priv,
 
 		ret = CAM_VFE_IRQ_STATUS_VIOLATION;
 
-		cam_vfe_camif_ver3_print_status(irq_status, ret);
+		cam_vfe_camif_ver3_print_status(irq_status, ret, camif_priv);
 
 		if (camif_priv->camif_debug & CAMIF_DEBUG_ENABLE_REG_DUMP)
 			cam_vfe_camif_ver3_reg_dump(camif_node);

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_camif_ver3.h

@@ -56,6 +56,7 @@ struct cam_vfe_camif_ver3_reg_data {
 	uint32_t     enable_diagnostic_hw;
 	uint32_t     pp_camif_cfg_en_shift;
 	uint32_t     pp_camif_cfg_ife_out_en_shift;
+	uint32_t     top_debug_cfg_en;
 };
 
 struct cam_vfe_camif_ver3_hw_info {

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver3.h

@@ -48,6 +48,21 @@ struct cam_vfe_top_ver3_reg_offset_common {
 	uint32_t diag_sensor_status_0;
 	uint32_t diag_sensor_status_1;
 	uint32_t bus_overflow_status;
+	uint32_t top_debug_cfg;
+	uint32_t top_debug_0;
+	uint32_t top_debug_1;
+	uint32_t top_debug_2;
+	uint32_t top_debug_3;
+	uint32_t top_debug_4;
+	uint32_t top_debug_5;
+	uint32_t top_debug_6;
+	uint32_t top_debug_7;
+	uint32_t top_debug_8;
+	uint32_t top_debug_9;
+	uint32_t top_debug_10;
+	uint32_t top_debug_11;
+	uint32_t top_debug_12;
+	uint32_t top_debug_13;
 };
 
 struct cam_vfe_camif_common_cfg {