samsung-sm8650/android_kernel_samsung_sm8650-modules
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asoc: wsa88XX: Enable/Disable swr ports based on setbit.

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During some concurrencies even though we are not
enabling the swrm port, we are trying to disable it.
which causes problem w.r.t clock disablement,
To avoid that we are updating the set bit only
when port is enabled, based on that bit we are taking
decision to disable or enable the port.

Change-Id: I6707c56c40dd3716917edc097c4b7bcad68261fd
Signed-off-by: Ganapathiraju Sarath Varma <quic_ganavarm@quicinc.com>
这个提交包含在：
Ganapathiraju Sarath Varma
2023-04-04 22:18:14 +05:30
父节点 4b8497c773
当前提交 7f605534e2
共修改 4 个文件，包含 43 行新增和 8 行删除
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1
asoc/codecs/wsa884x/internal.h
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@@ -397,6 +397,7 @@ struct wsa884x_priv {
int num_supplies;
struct regulator_bulk_data *supplies;
unsigned long status_mask;
unsigned long port_status_mask;
struct snd_soc_dai_driver *dai_driver;
struct snd_soc_component_driver *driver;
int noise_gate_mode;

26
asoc/codecs/wsa884x/wsa884x.c
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@@ -166,6 +166,12 @@ enum {
SPKR_ADIE_LB,
};
enum {
COMP_PORT_EN_STATUS_BIT = 0,
VI_PORT_EN_STATUS_BIT,
PBR_PORT_EN_STATUS_BIT,
CPS_PORT_EN_STATUS_BIT,
};
enum {
WSA884X_IRQ_INT_SAF2WAR = 0,
WSA884X_IRQ_INT_WAR2SAF,
@@ -1307,6 +1313,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(COMP_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->pbr_enable) {
wsa884x_set_port(component, SWR_PBR_PORT,
@@ -1314,6 +1321,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(PBR_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->visense_enable) {
wsa884x_set_port(component, SWR_VISENSE_PORT,
@@ -1321,6 +1329,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(VI_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->cps_enable) {
wsa884x_set_port(component, SWR_CPS_PORT,
@@ -1328,6 +1337,7 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
set_bit(CPS_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
swr_connect_port(wsa884x->swr_slave, &port_id[0], num_port,
&ch_mask[0], &ch_rate[0], &num_ch[0],
@@ -1343,33 +1353,41 @@ static int wsa884x_enable_swr_dac_port(struct snd_soc_dapm_widget *w,
&port_type[num_port]);
++num_port;
if (wsa884x->comp_enable) {
if (wsa884x->comp_enable &&
test_bit(COMP_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_COMP_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(COMP_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->pbr_enable) {
if (wsa884x->pbr_enable &&
test_bit(PBR_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_PBR_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(PBR_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->visense_enable) {
if (wsa884x->visense_enable &&
test_bit(VI_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_VISENSE_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(VI_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
if (wsa884x->cps_enable) {
if (wsa884x->cps_enable &&
test_bit(CPS_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask)) {
wsa884x_set_port(component, SWR_CPS_PORT,
&port_id[num_port], &num_ch[num_port],
&ch_mask[num_port], &ch_rate[num_port],
&port_type[num_port]);
++num_port;
clear_bit(CPS_PORT_EN_STATUS_BIT, &wsa884x->port_status_mask);
}
swr_disconnect_port(wsa884x->swr_slave, &port_id[0], num_port,
&ch_mask[0], &port_type[0]);