disp: msm: dp: use link clk khz when initializing mst mgr

MST driver is incorrectly using maximum bw_code while initializing
MST topology manager instead of maximum link clock in KHz. This
prevents the topology manager to set MST state on a subsequent MST
plug in causing all MST cases to fail.

Change-Id: I9fc4e0326fe0c7a6c9b81af8810b7098fa8ba967
Signed-off-by: Rajkumar Subbiah <[email protected]>

msm/dp/dp_mst_drm.c

@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2018-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -43,6 +44,7 @@
 #include "sde_connector.h"
 #include "dp_drm.h"
 #include "dp_debug.h"
+#include "dp_parser.h"
 
 #define DP_MST_DEBUG(fmt, ...) DP_DEBUG(fmt, ##__VA_ARGS__)
 #define DP_MST_INFO(fmt, ...) DP_DEBUG(fmt, ##__VA_ARGS__)
@@ -1875,7 +1877,7 @@ int dp_mst_init(struct dp_display *dp_display)
 					dp_mst.caps.drm_aux,
 					dp_mst.caps.max_dpcd_transaction_bytes,
 					dp_mst.caps.max_streams_supported,
-					4, DP_LINK_BW_8_1, conn_base_id);
+					4, DP_MAX_LINK_CLK_KHZ, conn_base_id);
 #else
 	ret = drm_dp_mst_topology_mgr_init(&dp_mst.mst_mgr, dev,
 					dp_mst.caps.drm_aux,