qcacmn: Add cfg command to enable umac reset skeleton debug

Add cfg command to enable umac reset skeleton debug, which
when enabled will skip post reset procedure handling.

Change-Id: Ieca393e6292660bb3ada40408fd6e71ac78d0a1f
CRs-Fixed: 3296960
This commit is contained in:
Pavankumar Nandeshwar
2022-09-21 07:05:16 -07:00
committed by Madan Koyyalamudi
parent 238555b44c
commit 7dee89e9ec
3 changed files with 57 additions and 7 deletions

View File

@@ -10063,6 +10063,42 @@ static void dp_txrx_stats_help(void)
dp_info(" 37 -- Host SRNG usage watermark stats");
}
#ifdef DP_UMAC_HW_RESET_SUPPORT
/**
* dp_umac_rst_skel_enable_update(): Update skel dbg flag for umac reset
* @soc: dp soc handle
* @en: ebable/disable
*
* Return: void
*/
static void dp_umac_rst_skel_enable_update(struct dp_soc *soc, bool en)
{
soc->umac_reset_ctx.skel_enable = en;
dp_cdp_debug("UMAC HW reset debug skelton code enabled :%u",
soc->umac_reset_ctx.skel_enable);
}
/**
* dp_umac_rst_skel_enable_get(): Get skel dbg flag for umac reset
* @soc: dp soc handle
*
* Return: enable/disable flag
*/
static bool dp_umac_rst_skel_enable_get(struct dp_soc *soc)
{
return soc->umac_reset_ctx.skel_enable;
}
#else
static void dp_umac_rst_skel_enable_update(struct dp_soc *soc, bool en)
{
}
static bool dp_umac_rst_skel_enable_get(struct dp_soc *soc)
{
return false;
}
#endif
/**
* dp_print_host_stats()- Function to print the stats aggregated at host
* @vdev_handle: DP_VDEV handle
@@ -10953,6 +10989,9 @@ dp_set_psoc_param(struct cdp_soc_t *cdp_soc,
case CDP_SAWF_ENABLE:
wlan_cfg_set_sawf_config(wlan_cfg_ctx, val.cdp_sawf_enabled);
break;
case CDP_UMAC_RST_SKEL_ENABLE:
dp_umac_rst_skel_enable_update(soc, val.cdp_umac_rst_skel);
break;
default:
break;
}
@@ -10986,6 +11025,9 @@ static QDF_STATUS dp_get_psoc_param(struct cdp_soc_t *cdp_soc,
val->cdp_psoc_param_vdev_stats_hw_offload =
wlan_cfg_get_vdev_stats_hw_offload_config(soc->wlan_cfg_ctx);
break;
case CDP_UMAC_RST_SKEL_ENABLE:
val->cdp_umac_rst_skel = dp_umac_rst_skel_enable_get(soc);
break;
default:
dp_warn("Invalid param");
break;
@@ -13426,19 +13468,21 @@ static QDF_STATUS dp_umac_reset_handle_pre_reset(struct dp_soc *soc)
*/
static QDF_STATUS dp_umac_reset_handle_post_reset(struct dp_soc *soc)
{
qdf_nbuf_t *nbuf_list = &soc->umac_reset_ctx.nbuf_list;
if (!soc->umac_reset_ctx.skel_enable) {
qdf_nbuf_t *nbuf_list = &soc->umac_reset_ctx.nbuf_list;
dp_set_umac_regs(soc);
dp_set_umac_regs(soc);
dp_reinit_rings(soc);
dp_reinit_rings(soc);
dp_rx_desc_reuse(soc, nbuf_list);
dp_rx_desc_reuse(soc, nbuf_list);
dp_cleanup_reo_cmd_module(soc);
dp_cleanup_reo_cmd_module(soc);
dp_tx_desc_pool_cleanup(soc, nbuf_list);
dp_tx_desc_pool_cleanup(soc, nbuf_list);
dp_reset_tid_q_setup(soc);
dp_reset_tid_q_setup(soc);
}
return dp_umac_reset_notify_action_completion(soc,
UMAC_RESET_ACTION_DO_POST_RESET_START);