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cnss2: Trigger pci link to retrain

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When feature CNSS2_CONDITIONAL_POWEROFF enabled, wlan chip HST and
HSP will not power off in cnss probe. PCI link will not be triggered
to retrain once CNSS2_ENUM_WITH_LOW_SPEED enabled.

So, add API cnss_pci_link_retrain_trigger() to trigger pci link retrain
when HST and HSP not power off.

Change-Id: I2ba44837a03b09b1ef3cd0c23a780b89ff837740
CRs-Fixed: 3491396
This commit is contained in:
Yu Ouyang
2023-07-13 14:26:45 +08:00
committed by Rahul Choudhary
parent 4561632548
commit 7de707a939
1 changed files with 45 additions and 30 deletions
Download Patch File Download Diff File Expand all files Collapse all files

75
cnss2/pci.c
View File

@@ -7045,28 +7045,6 @@ static bool cnss_should_suspend_pwroff(struct pci_dev *pci_dev)
}
#endif
static void cnss_pci_suspend_pwroff(struct pci_dev *pci_dev)
{
struct cnss_pci_data *pci_priv = cnss_get_pci_priv(pci_dev);
int rc_num = pci_dev->bus->domain_nr;
struct cnss_plat_data *plat_priv;
int ret = 0;
bool suspend_pwroff = cnss_should_suspend_pwroff(pci_dev);
plat_priv = cnss_get_plat_priv_by_rc_num(rc_num);
if (suspend_pwroff) {
ret = cnss_suspend_pci_link(pci_priv);
if (ret)
cnss_pr_err("Failed to suspend PCI link, err = %d\n",
ret);
cnss_power_off_device(plat_priv);
} else {
cnss_pr_dbg("bus suspend and dev power off disabled for device [0x%x]\n",
pci_dev->device);
}
}
#ifdef CONFIG_CNSS2_ENUM_WITH_LOW_SPEED
static void
cnss_pci_downgrade_rc_speed(struct cnss_plat_data *plat_priv, u32 rc_num)
@@ -7093,16 +7071,25 @@ cnss_pci_restore_rc_speed(struct cnss_pci_data *pci_priv)
if (ret)
cnss_pr_err("Failed to reset max PCIe RC%x link speed to default, err = %d\n",
plat_priv->rc_num, ret);
/* suspend/resume will trigger retain to re-establish link speed */
ret = cnss_suspend_pci_link(pci_priv);
if (ret)
cnss_pr_err("Failed to suspend PCI link, err = %d\n", ret);
ret = cnss_resume_pci_link(pci_priv);
cnss_pr_err("Failed to resume PCI link, err = %d\n", ret);
}
}
static void
cnss_pci_link_retrain_trigger(struct cnss_pci_data *pci_priv)
{
int ret;
/* suspend/resume will trigger retain to re-establish link speed */
ret = cnss_suspend_pci_link(pci_priv);
if (ret)
cnss_pr_err("Failed to suspend PCI link, err = %d\n", ret);
ret = cnss_resume_pci_link(pci_priv);
if (ret)
cnss_pr_err("Failed to resume PCI link, err = %d\n", ret);
cnss_pci_get_link_status(pci_priv);
}
#else
static void
cnss_pci_downgrade_rc_speed(struct cnss_plat_data *plat_priv, u32 rc_num)
@@ -7113,8 +7100,36 @@ static void
cnss_pci_restore_rc_speed(struct cnss_pci_data *pci_priv)
{
}
static void
cnss_pci_link_retrain_trigger(struct cnss_pci_data *pci_priv)
{
}
#endif
static void cnss_pci_suspend_pwroff(struct pci_dev *pci_dev)
{
struct cnss_pci_data *pci_priv = cnss_get_pci_priv(pci_dev);
int rc_num = pci_dev->bus->domain_nr;
struct cnss_plat_data *plat_priv;
int ret = 0;
bool suspend_pwroff = cnss_should_suspend_pwroff(pci_dev);
plat_priv = cnss_get_plat_priv_by_rc_num(rc_num);
if (suspend_pwroff) {
ret = cnss_suspend_pci_link(pci_priv);
if (ret)
cnss_pr_err("Failed to suspend PCI link, err = %d\n",
ret);
cnss_power_off_device(plat_priv);
} else {
cnss_pr_dbg("bus suspend and dev power off disabled for device [0x%x]\n",
pci_dev->device);
cnss_pci_link_retrain_trigger(pci_priv);
}
}
static int cnss_pci_probe(struct pci_dev *pci_dev,
const struct pci_device_id *id)
{