Merge "msm: camera: vfe: Add support for new VFE hardware" into camera-kernel.lnx.4.0
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1306
drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe680.h
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1306
drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe17x/cam_vfe680.h
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@@ -0,0 +1,235 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_VFE_LITE680X_H_
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#define _CAM_VFE_LITE680X_H_
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#include "cam_vfe_camif_ver3.h"
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#include "cam_vfe_top_ver3.h"
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#include "cam_vfe_core.h"
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#include "cam_vfe_bus_ver3.h"
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#include "cam_irq_controller.h"
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static struct cam_irq_register_set vfe680x_bus_irq_reg[2] = {
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{
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.mask_reg_offset = 0x00000218,
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.clear_reg_offset = 0x00000220,
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.status_reg_offset = 0x00000228,
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},
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{
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.mask_reg_offset = 0x0000021C,
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.clear_reg_offset = 0x00000224,
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.status_reg_offset = 0x0000022C,
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},
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};
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static struct cam_vfe_bus_ver3_hw_info vfe680x_bus_hw_info = {
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.common_reg = {
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.hw_version = 0x00000200,
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.cgc_ovd = 0x00000208,
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.if_frameheader_cfg = {
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0x00000234,
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0x00000238,
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0x0000023C,
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0x00000240,
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0x00000244,
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0x00000248,
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},
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.pwr_iso_cfg = 0x0000025C,
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.overflow_status_clear = 0x00000260,
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.ccif_violation_status = 0x00000264,
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.overflow_status = 0x00000268,
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.image_size_violation_status = 0x00000270,
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.debug_status_top_cfg = 0x000002D4,
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.debug_status_top = 0x000002D8,
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.test_bus_ctrl = 0x000002DC,
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.irq_reg_info = {
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.num_registers = 2,
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.irq_reg_set = vfe680x_bus_irq_reg,
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.global_clear_offset = 0x00000230,
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.global_clear_bitmask = 0x00000001,
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},
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},
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.num_client = 4,
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.bus_client_reg = {
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/* BUS Client 0 RDI0 */
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{
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.cfg = 0x00000400,
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.image_addr = 0x00000404,
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.frame_incr = 0x00000408,
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.image_cfg_0 = 0x0000040C,
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.image_cfg_1 = 0x00000410,
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.image_cfg_2 = 0x00000414,
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.packer_cfg = 0x00000418,
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.frame_header_addr = 0x00000420,
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.frame_header_incr = 0x00000424,
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.frame_header_cfg = 0x00000428,
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.irq_subsample_period = 0x00000430,
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.irq_subsample_pattern = 0x00000434,
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.framedrop_period = 0x00000438,
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.framedrop_pattern = 0x0000043C,
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.mmu_prefetch_cfg = 0x00000460,
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.mmu_prefetch_max_offset = 0x00000464,
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.system_cache_cfg = 0x00000468,
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.addr_status_0 = 0x00000470,
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.addr_status_1 = 0x00000474,
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.addr_status_2 = 0x00000478,
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.addr_status_3 = 0x0000047C,
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.debug_status_cfg = 0x00000480,
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.debug_status_0 = 0x00000484,
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.debug_status_1 = 0x00000488,
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.comp_group = CAM_VFE_BUS_VER3_COMP_GRP_0,
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.ubwc_regs = NULL,
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},
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/* BUS Client 1 RDI1 */
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{
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.cfg = 0x00000500,
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.image_addr = 0x00000504,
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.frame_incr = 0x00000508,
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.image_cfg_0 = 0x0000050C,
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.image_cfg_1 = 0x00000510,
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.image_cfg_2 = 0x00000514,
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.packer_cfg = 0x00000518,
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.frame_header_addr = 0x00000520,
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.frame_header_incr = 0x00000524,
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.frame_header_cfg = 0x00000528,
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.irq_subsample_period = 0x00000530,
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.irq_subsample_pattern = 0x00000534,
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.framedrop_period = 0x00000538,
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.framedrop_pattern = 0x0000053C,
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.mmu_prefetch_cfg = 0x00000560,
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.mmu_prefetch_max_offset = 0x00000564,
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.system_cache_cfg = 0x00000568,
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.addr_status_0 = 0x00000570,
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.addr_status_1 = 0x00000574,
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.addr_status_2 = 0x00000578,
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.addr_status_3 = 0x0000057C,
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.debug_status_cfg = 0x00000580,
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.debug_status_0 = 0x00000584,
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.debug_status_1 = 0x00000588,
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.comp_group = CAM_VFE_BUS_VER3_COMP_GRP_1,
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.ubwc_regs = NULL,
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},
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/* BUS Client 2 RDI2 */
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{
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.cfg = 0x00000600,
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.image_addr = 0x00000604,
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.frame_incr = 0x00000608,
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.image_cfg_0 = 0x0000060C,
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.image_cfg_1 = 0x00000610,
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.image_cfg_2 = 0x00000614,
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.packer_cfg = 0x00000618,
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.frame_header_addr = 0x00000620,
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.frame_header_incr = 0x00000624,
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.frame_header_cfg = 0x00000628,
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.irq_subsample_period = 0x00000630,
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.irq_subsample_pattern = 0x00000634,
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.framedrop_period = 0x00000638,
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.framedrop_pattern = 0x0000063C,
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.mmu_prefetch_cfg = 0x00000660,
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.mmu_prefetch_max_offset = 0x00000664,
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.system_cache_cfg = 0x00000668,
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.addr_status_0 = 0x00000670,
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.addr_status_1 = 0x00000674,
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.addr_status_2 = 0x00000678,
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.addr_status_3 = 0x0000067C,
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.debug_status_cfg = 0x00000680,
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.debug_status_0 = 0x00000684,
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.debug_status_1 = 0x00000688,
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.comp_group = CAM_VFE_BUS_VER3_COMP_GRP_2,
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.ubwc_regs = NULL,
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},
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/* BUS Client 3 RDI3 */
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{
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.cfg = 0x00000700,
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.image_addr = 0x00000704,
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.frame_incr = 0x00000708,
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.image_cfg_0 = 0x0000070C,
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.image_cfg_1 = 0x00000710,
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.image_cfg_2 = 0x00000714,
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.packer_cfg = 0x00000718,
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.frame_header_addr = 0x00000720,
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.frame_header_incr = 0x00000724,
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.frame_header_cfg = 0x00000728,
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.irq_subsample_period = 0x00000730,
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.irq_subsample_pattern = 0x00000734,
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.framedrop_period = 0x00000738,
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.framedrop_pattern = 0x0000073C,
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.mmu_prefetch_cfg = 0x00000760,
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.mmu_prefetch_max_offset = 0x00000764,
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.system_cache_cfg = 0x00000768,
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.addr_status_0 = 0x00000770,
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.addr_status_1 = 0x00000774,
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.addr_status_2 = 0x00000778,
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.addr_status_3 = 0x0000077C,
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.debug_status_cfg = 0x00000780,
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.debug_status_0 = 0x00000784,
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.debug_status_1 = 0x00000788,
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.comp_group = CAM_VFE_BUS_VER3_COMP_GRP_3,
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.ubwc_regs = NULL,
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},
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},
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.num_out = 4,
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.vfe_out_hw_info = {
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{
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.vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI0,
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.max_width = -1,
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.max_height = -1,
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.source_group = CAM_VFE_BUS_VER3_SRC_GRP_0,
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.num_wm = 1,
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.wm_idx = {
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0,
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},
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},
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{
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.vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI1,
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.max_width = -1,
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.max_height = -1,
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.source_group = CAM_VFE_BUS_VER3_SRC_GRP_1,
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.num_wm = 1,
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.wm_idx = {
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1,
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},
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},
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{
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.vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI2,
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.max_width = -1,
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.max_height = -1,
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.source_group = CAM_VFE_BUS_VER3_SRC_GRP_2,
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.num_wm = 1,
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.wm_idx = {
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2,
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},
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},
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{
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.vfe_out_type = CAM_VFE_BUS_VER3_VFE_OUT_RDI3,
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.max_width = -1,
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.max_height = -1,
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.source_group = CAM_VFE_BUS_VER3_SRC_GRP_3,
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.num_wm = 1,
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.wm_idx = {
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3,
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},
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},
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},
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.comp_done_shift = 6,
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.top_irq_shift = 1,
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.max_out_res = CAM_ISP_IFE_OUT_RES_BASE + 33,
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};
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static struct cam_vfe_hw_info cam_vfe_lite68x_hw_info = {
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.irq_reg_info =,
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.bus_version = CAM_VFE_BUS_VER_3_0,
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.bus_hw_info = &vfe680x_bus_hw_info,
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.bus_rd_version = NULL,
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.bus_rd_hw_info = NULL,
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.top_version =,
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.top_hw_info =,
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};
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#endif /* _CAM_VFE_LITE680X_H_ */
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@@ -11,8 +11,10 @@
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#include "cam_vfe_bus.h"
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#define CAM_VFE_BUS_VER3_MAX_CLIENTS 26
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#define CAM_VFE_BUS_VER3_MAX_SUB_GRPS 6
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#define CAM_VFE_BUS_VER3_MAX_SUB_GRPS 6
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#define CAM_VFE_BUS_VER3_MAX_MID_PER_PORT 4
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#define CAM_VFE_BUS_VER3_480_MAX_CLIENTS 26
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#define CAM_VFE_BUS_VER3_680_MAX_CLIENTS 28
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enum cam_vfe_bus_ver3_vfe_core_id {
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CAM_VFE_BUS_VER3_VFE_CORE_0,
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@@ -45,6 +47,9 @@ enum cam_vfe_bus_ver3_comp_grp_type {
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CAM_VFE_BUS_VER3_COMP_GRP_11,
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CAM_VFE_BUS_VER3_COMP_GRP_12,
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CAM_VFE_BUS_VER3_COMP_GRP_13,
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CAM_VFE_BUS_VER3_COMP_GRP_14,
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CAM_VFE_BUS_VER3_COMP_GRP_15,
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CAM_VFE_BUS_VER3_COMP_GRP_16,
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CAM_VFE_BUS_VER3_COMP_GRP_MAX,
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};
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@@ -73,6 +78,9 @@ enum cam_vfe_bus_ver3_vfe_out_type {
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CAM_VFE_BUS_VER3_VFE_OUT_DS16_DISP,
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CAM_VFE_BUS_VER3_VFE_OUT_2PD,
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CAM_VFE_BUS_VER3_VFE_OUT_LCR,
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CAM_VFE_BUS_VER3_VFE_OUT_AWB_BFW,
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CAM_VFE_BUS_VER3_VFE_OUT_2PD_STATS,
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CAM_VFE_BUS_VER3_VFE_OUT_LTM_STATS,
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CAM_VFE_BUS_VER3_VFE_OUT_MAX,
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};
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@@ -138,6 +146,8 @@ struct cam_vfe_bus_ver3_reg_offset_bus_client {
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uint32_t irq_subsample_pattern;
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uint32_t framedrop_period;
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uint32_t framedrop_pattern;
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uint32_t mmu_prefetch_cfg;
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uint32_t mmu_prefetch_max_offset;
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uint32_t burst_limit;
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uint32_t system_cache_cfg;
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void *ubwc_regs;
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@@ -162,6 +172,8 @@ struct cam_vfe_bus_ver3_vfe_out_hw_info {
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uint32_t max_height;
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uint32_t source_group;
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uint32_t mid[CAM_VFE_BUS_VER3_MAX_MID_PER_PORT];
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uint32_t num_wm;
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uint32_t wm_idx[PLANE_MAX];
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};
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/*
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@@ -182,7 +194,7 @@ struct cam_vfe_bus_ver3_hw_info {
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struct cam_vfe_bus_ver3_reg_offset_common common_reg;
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uint32_t num_client;
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struct cam_vfe_bus_ver3_reg_offset_bus_client
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bus_client_reg[CAM_VFE_BUS_VER3_MAX_CLIENTS];
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bus_client_reg[CAM_VFE_BUS_VER3_680_MAX_CLIENTS];
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uint32_t num_out;
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struct cam_vfe_bus_ver3_vfe_out_hw_info
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vfe_out_hw_info[CAM_VFE_BUS_VER3_VFE_OUT_MAX];
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@@ -1,6 +1,6 @@
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/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
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* Copyright (c) 2017-2020, The Linux Foundation. All rights reserved.
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*/
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#ifndef _CAM_VFE_TOP_H_
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@@ -12,6 +12,7 @@
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#define CAM_VFE_TOP_VER_1_0 0x100000
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#define CAM_VFE_TOP_VER_2_0 0x200000
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#define CAM_VFE_TOP_VER_3_0 0x300000
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#define CAM_VFE_TOP_VER_4_0 0x400000
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#define CAM_VFE_CAMIF_VER_1_0 0x10
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#define CAM_VFE_CAMIF_VER_2_0 0x20
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