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disp: msm: dsi: add DSI PLL support for 10nm-LPU

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This change adds DSI pll support for 10nm architecture.

Change-Id: I3819dd828dbcc168b115bd718c5d656ea9fd12c8
Signed-off-by: Rajeev Nandan <rajeevny@codeaurora.org>
This commit is contained in:
Rajeev Nandan
2020-07-03 19:54:28 +05:30
committed by Gerrit - the friendly Code Review server
parent 6fd5a637c2
commit 7cf728f3a6
4 changed files with 2085 additions and 1 deletions
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1
msm/Makefile
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@@ -105,6 +105,7 @@ msm_drm-$(CONFIG_DRM_MSM_DSI) += dsi/dsi_phy.o \
dsi/dsi_phy_timing_v4_0.o \ dsi/dsi_phy_timing_v4_0.o \
dsi/dsi_pll.o \ dsi/dsi_pll.o \
dsi/dsi_pll_5nm.o \ dsi/dsi_pll_5nm.o \
dsi/dsi_pll_10nm.o \
dsi/dsi_ctrl_hw_cmn.o \ dsi/dsi_ctrl_hw_cmn.o \
dsi/dsi_ctrl_hw_1_4.o \ dsi/dsi_ctrl_hw_1_4.o \
dsi/dsi_ctrl_hw_2_0.o \ dsi/dsi_ctrl_hw_2_0.o \

7
msm/dsi/dsi_pll.c
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@@ -23,6 +23,9 @@ static int dsi_pll_clock_register(struct platform_device *pdev,
case DSI_PLL_5NM: case DSI_PLL_5NM:
rc = dsi_pll_clock_register_5nm(pdev, pll_res); rc = dsi_pll_clock_register_5nm(pdev, pll_res);
break; break;
case DSI_PLL_10NM:
rc = dsi_pll_clock_register_10nm(pdev, pll_res);
break;
default: default:
rc = -EINVAL; rc = -EINVAL;
break; break;
@@ -141,12 +144,14 @@ int dsi_pll_init(struct platform_device *pdev, struct dsi_pll_resource **pll)
DSI_PLL_INFO(pll_res, "DSI pll label = %s\n", label); DSI_PLL_INFO(pll_res, "DSI pll label = %s\n", label);
/** /**
* Currently, Only supports 5nm PLL version. Will add * Currently, Only supports 5nm and 10nm PLL version. Will add
* support for other versions as needed. * support for other versions as needed.
*/ */
if (!strcmp(label, "dsi_pll_5nm")) if (!strcmp(label, "dsi_pll_5nm"))
pll_res->pll_revision = DSI_PLL_5NM; pll_res->pll_revision = DSI_PLL_5NM;
else if (!strcmp(label, "dsi_pll_10nm"))
pll_res->pll_revision = DSI_PLL_10NM;
else else
return -ENOTSUPP; return -ENOTSUPP;

4
msm/dsi/dsi_pll.h
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@@ -54,6 +54,7 @@ struct lpfr_cfg {
enum { enum {
DSI_PLL_5NM, DSI_PLL_5NM,
DSI_PLL_10NM,
DSI_UNKNOWN_PLL, DSI_UNKNOWN_PLL,
}; };
@@ -228,6 +229,9 @@ static inline struct dsi_pll_vco_clk *to_vco_clk_hw(struct clk_hw *hw)
int dsi_pll_clock_register_5nm(struct platform_device *pdev, int dsi_pll_clock_register_5nm(struct platform_device *pdev,
struct dsi_pll_resource *pll_res); struct dsi_pll_resource *pll_res);
int dsi_pll_clock_register_10nm(struct platform_device *pdev,
struct dsi_pll_resource *pll_res);
int dsi_pll_init(struct platform_device *pdev, int dsi_pll_init(struct platform_device *pdev,
struct dsi_pll_resource **pll_res); struct dsi_pll_resource **pll_res);
#endif #endif

2074
msm/dsi/dsi_pll_10nm.c Normal file
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