disp: msm: dsi: follow the HPG guidelines for DATABUS_WIDEN
In case of DATABUS_WIDEN, follow the HPG to calculate bitclk, byteclk and pclk. Configure the DST_FORMAT and the clock dividers in DSI PHY and DISP_CC w.r.t. the bpp before compression. Change-Id: I526eab5bc88b8d667b8b1a0d257b2f147998286a Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com> Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
This commit is contained in:

committed by
Rohith Iyer

parent
f993f4d8e0
commit
7b4616f157
@@ -1581,7 +1581,7 @@ static int dp_panel_dsc_prepare_basic_params(
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comp_info->comp_type = MSM_DISPLAY_COMPRESSION_DSC;
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comp_info->tgt_bpp = DSC_TGT_BPP;
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comp_info->src_bpp = dp_mode->timing.bpp;
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comp_info->comp_ratio = dp_mode->timing.bpp / DSC_TGT_BPP;
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comp_info->comp_ratio = mult_frac(100, dp_mode->timing.bpp, DSC_TGT_BPP);
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comp_info->enabled = true;
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return 0;
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@@ -3007,7 +3007,7 @@ static void dp_panel_convert_to_dp_mode(struct dp_panel *dp_panel,
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comp_info->src_bpp = default_bpp;
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comp_info->tgt_bpp = default_bpp;
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comp_info->comp_type = MSM_DISPLAY_COMPRESSION_NONE;
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comp_info->comp_ratio = 1;
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comp_info->comp_ratio = MSM_DISPLAY_COMPRESSION_RATIO_NONE;
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comp_info->enabled = false;
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/* As YUV was not supported now, so set the default format to RGB */
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@@ -3042,7 +3042,7 @@ static void dp_panel_convert_to_dp_mode(struct dp_panel *dp_panel,
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}
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rc = sde_dsc_populate_dsc_private_params(&comp_info->dsc_info,
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dp_mode->timing.h_active);
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dp_mode->timing.h_active, dp_mode->timing.widebus_en);
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if (rc) {
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DP_DEBUG("failed populating other dsc params\n");
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return;
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@@ -567,7 +567,7 @@ void dsi_ctrl_hw_cmn_setup_cmd_stream(struct dsi_ctrl_hw *ctrl,
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this_frame_slices = pic_width / dsc.config.slice_width;
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intf_ip_w = this_frame_slices * dsc.config.slice_width;
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sde_dsc_populate_dsc_private_params(&dsc, intf_ip_w);
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sde_dsc_populate_dsc_private_params(&dsc, intf_ip_w, ctrl->widebus_support);
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width_final = dsc.bytes_per_pkt * dsc.pkt_per_line;
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stride_final = dsc.bytes_per_pkt;
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@@ -7083,12 +7083,23 @@ int dsi_display_get_modes_helper(struct dsi_display *display,
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memset(&display_mode, 0, sizeof(display_mode));
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display_mode.priv_info = kzalloc(sizeof(*display_mode.priv_info), GFP_KERNEL);
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if (!display_mode.priv_info) {
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rc = -ENOMEM;
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return rc;
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}
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/* Setup widebus support */
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display_mode.priv_info->widebus_support = ctrl->ctrl->hw.widebus_support;
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rc = dsi_panel_get_mode(display->panel, mode_idx,
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&display_mode,
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topology_override);
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if (rc) {
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DSI_ERR("[%s] failed to get mode idx %d from panel\n",
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display->name, mode_idx);
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kfree(display_mode.priv_info);
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display_mode.priv_info = NULL;
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rc = -EINVAL;
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return rc;
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}
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@@ -7106,9 +7117,18 @@ int dsi_display_get_modes_helper(struct dsi_display *display,
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else
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nondsc_modes++;
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/* Setup widebus support */
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display_mode.priv_info->widebus_support =
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ctrl->ctrl->hw.widebus_support;
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/*
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* Update the host_config.dst_format for compressed RGB101010 pixel format
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* when there is no widebus support.
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*/
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if (host->dst_format == DSI_PIXEL_FORMAT_RGB101010 &&
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display_mode.timing.dsc_enabled &&
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!display_mode.priv_info->widebus_support) {
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host->dst_format = DSI_PIXEL_FORMAT_RGB888;
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DSI_DEBUG("updated dst_format from %d to %d\n",
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DSI_PIXEL_FORMAT_RGB101010, host->dst_format);
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}
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num_dfps_rates = ((!dfps_caps.dfps_support ||
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!support_video_mode) ? 1 : dfps_caps.dfps_list_len);
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@@ -686,7 +686,7 @@ int dsi_conn_get_mode_info(struct drm_connector *connector,
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if (mode_info->comp_info.comp_type) {
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tar_bpp = dsi_mode->priv_info->pclk_scale.numer;
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src_bpp = dsi_mode->priv_info->pclk_scale.denom;
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mode_info->comp_info.comp_ratio = mult_frac(1, src_bpp,
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mode_info->comp_info.comp_ratio = mult_frac(100, src_bpp,
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tar_bpp);
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mode_info->wide_bus_en = dsi_mode->priv_info->widebus_support;
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}
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@@ -2821,7 +2821,8 @@ static int dsi_panel_parse_dsc_params(struct dsi_display_mode *mode,
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goto error;
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}
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rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width);
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rc = sde_dsc_populate_dsc_private_params(&priv_info->dsc, intf_width,
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priv_info->widebus_support);
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if (rc) {
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DSI_DEBUG("failed populating other dsc params\n");
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rc = -EINVAL;
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@@ -4188,12 +4189,6 @@ int dsi_panel_get_mode(struct dsi_panel *panel,
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mutex_lock(&panel->panel_lock);
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utils = &panel->utils;
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mode->priv_info = kzalloc(sizeof(*mode->priv_info), GFP_KERNEL);
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if (!mode->priv_info) {
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rc = -ENOMEM;
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goto done;
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}
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prv_info = mode->priv_info;
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timings_np = utils->get_child_by_name(utils->data,
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@@ -4287,12 +4282,8 @@ int dsi_panel_get_mode(struct dsi_panel *panel,
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if (rc)
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DSI_ERR("failed to partial update caps, rc=%d\n", rc);
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}
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goto done;
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parse_fail:
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kfree(mode->priv_info);
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mode->priv_info = NULL;
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done:
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utils->data = utils_data;
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mutex_unlock(&panel->panel_lock);
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return rc;
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@@ -286,8 +286,11 @@ enum msm_display_wd_jitter_type {
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MSM_DISPLAY_WD_LTJ_JITTER = BIT(2),
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};
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#define MSM_DISPLAY_COMPRESSION_RATIO_NONE 1
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#define MSM_DISPLAY_COMPRESSION_RATIO_MAX 5
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/*
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* Scale macros so that compression ratio is a factor of 100 everywhere
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*/
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#define MSM_DISPLAY_COMPRESSION_RATIO_NONE 100
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#define MSM_DISPLAY_COMPRESSION_RATIO_MAX 500
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/**
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* enum msm_display_spr_pack_type - sub pixel rendering pack patterns supported
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@@ -719,11 +722,17 @@ struct msm_display_vdc_info {
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*/
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#define DSC_BPP(config) ((config).bits_per_pixel >> 4)
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/**
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* Bits/component
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* returns the integer bpc value from the drm_dsc_config struct
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*/
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#define DSC_BPC(config) ((config).bits_per_component)
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/**
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* struct msm_compression_info - defined panel compression
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* @enabled: enabled/disabled
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* @comp_type: type of compression supported
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* @comp_ratio: compression ratio
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* @comp_ratio: compression ratio multiplied by 100
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* @src_bpp: bits per pixel before compression
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* @tgt_bpp: bits per pixel after compression
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* @dsc_info: dsc configuration if the compression
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
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*/
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@@ -418,6 +418,7 @@ static int _dce_dsc_setup_helper(struct sde_encoder_virt *sde_enc,
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int dsc_pic_width;
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int dsc_common_mode = 0;
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int i, rc = 0;
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bool widebus_en;
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sde_kms = sde_encoder_get_kms(&sde_enc->base);
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@@ -486,7 +487,9 @@ static int _dce_dsc_setup_helper(struct sde_encoder_virt *sde_enc,
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else if ((dsc_common_mode & DSC_MODE_MULTIPLEX) || (dsc->half_panel_pu))
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dsc->num_active_ss_per_enc = dsc->config.slice_count >> 1;
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sde_dsc_populate_dsc_private_params(dsc, intf_ip_w);
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widebus_en = sde_encoder_is_widebus_enabled(enc_master->parent);
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sde_dsc_populate_dsc_private_params(dsc, intf_ip_w, widebus_en);
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_dce_dsc_initial_line_calc(dsc, enc_ip_w, dsc_common_mode);
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@@ -305,7 +305,7 @@ struct sde_encoder_irq {
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* @intf_cfg_v1: Interface hardware configuration to be used if control
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* path supports SDE_CTL_ACTIVE_CFG
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* @comp_type: Type of compression supported
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* @comp_ratio: Compression ratio
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* @comp_ratio: Compression ratio multiplied by 100
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* @dsc_extra_pclk_cycle_cnt: Extra pclk cycle count for DSC over DP
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* @dsc_extra_disp_width: Additional display width for DSC over DP
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* @poms_align_vsync: poms with vsync aligned
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@@ -11,6 +11,7 @@
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#include "sde_formats.h"
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#include "dsi_display.h"
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#include "sde_trace.h"
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#include <drm/drm_fixed.h>
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#define SDE_DEBUG_VIDENC(e, fmt, ...) SDE_DEBUG("enc%d intf%d " fmt, \
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(e) && (e)->base.parent ? \
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@@ -48,6 +49,7 @@ static void drm_mode_to_intf_timing_params(
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struct intf_timing_params *timing)
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{
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const struct sde_encoder_phys *phys_enc = &vid_enc->base;
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s64 comp_ratio, width;
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memset(timing, 0, sizeof(*timing));
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@@ -124,7 +126,7 @@ static void drm_mode_to_intf_timing_params(
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*/
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if (phys_enc->hw_intf->cap->type == INTF_DP &&
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(timing->wide_bus_en ||
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(vid_enc->base.comp_ratio > 1))) {
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(vid_enc->base.comp_ratio > MSM_DISPLAY_COMPRESSION_RATIO_NONE))) {
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timing->width = timing->width >> 1;
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timing->xres = timing->xres >> 1;
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timing->h_back_porch = timing->h_back_porch >> 1;
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@@ -132,7 +134,7 @@ static void drm_mode_to_intf_timing_params(
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timing->hsync_pulse_width = timing->hsync_pulse_width >> 1;
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if (vid_enc->base.comp_type == MSM_DISPLAY_COMPRESSION_DSC &&
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(vid_enc->base.comp_ratio > 1)) {
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(vid_enc->base.comp_ratio > MSM_DISPLAY_COMPRESSION_RATIO_NONE)) {
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timing->extra_dto_cycles =
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vid_enc->base.dsc_extra_pclk_cycle_cnt;
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timing->width += vid_enc->base.dsc_extra_disp_width;
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@@ -151,10 +153,11 @@ static void drm_mode_to_intf_timing_params(
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(vid_enc->base.comp_type ==
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MSM_DISPLAY_COMPRESSION_VDC))) {
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// adjust active dimensions
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timing->width = DIV_ROUND_UP(timing->width,
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vid_enc->base.comp_ratio);
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timing->xres = DIV_ROUND_UP(timing->xres,
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vid_enc->base.comp_ratio);
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width = drm_fixp_from_fraction(timing->width, 1);
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comp_ratio = drm_fixp_from_fraction(vid_enc->base.comp_ratio, 100);
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width = drm_fixp_div(width, comp_ratio);
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timing->width = drm_fixp2int_ceil(width);
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timing->xres = timing->width;
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}
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/*
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@@ -1,6 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2021-2022 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2012-2021 The Linux Foundation. All rights reserved.
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*/
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@@ -372,12 +372,13 @@ int sde_dsc_populate_dsc_config(struct drm_dsc_config *dsc, int scr_ver) {
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}
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int sde_dsc_populate_dsc_private_params(struct msm_display_dsc_info *dsc_info,
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int intf_width)
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int intf_width, bool widebus_en)
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{
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int mod_offset;
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int slice_per_pkt, slice_per_intf;
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int bytes_in_slice, total_bytes_per_intf;
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u16 bpp;
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u16 bpc;
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u32 bytes_in_dsc_pair;
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u32 total_bytes_in_dsc_pair;
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@@ -421,12 +422,26 @@ int sde_dsc_populate_dsc_private_params(struct msm_display_dsc_info *dsc_info,
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slice_per_pkt = 1;
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bpp = DSC_BPP(dsc_info->config);
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bpc = DSC_BPC(dsc_info->config);
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bytes_in_slice = DIV_ROUND_UP(dsc_info->config.slice_width *
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bpp, 8);
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total_bytes_per_intf = bytes_in_slice * slice_per_intf;
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dsc_info->eol_byte_num = total_bytes_per_intf % 3;
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dsc_info->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf, 3);
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/*
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* In DATABUS-WIDEN mode, MDP always sends out 48-bit compressed data per pclk
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* and on average, DSI consumes an amount of compressed data equivalent to the
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* uncompressed pixel depth per pclk.
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*
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* In NON-DATABUS-WIDEN mode, MDP always sends out 24-bit compressed data per
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* pclk and DSI always consumes 24-bit compressed data per pclk.
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*/
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if (widebus_en)
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dsc_info->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf * 8,
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msm_get_src_bpc(dsc_info->chroma_format, bpc));
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else
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dsc_info->pclk_per_line = DIV_ROUND_UP(total_bytes_per_intf * 8, 24);
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dsc_info->bytes_in_slice = bytes_in_slice;
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dsc_info->bytes_per_pkt = bytes_in_slice * slice_per_pkt;
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dsc_info->pkt_per_line = slice_per_intf / slice_per_pkt;
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@@ -571,4 +586,3 @@ int sde_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc_info,
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return 0;
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}
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@@ -1,5 +1,6 @@
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// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
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* Copyright (c) 2020 The Linux Foundation. All rights reserved.
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*/
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@@ -13,10 +14,9 @@
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int sde_dsc_populate_dsc_config(struct drm_dsc_config *dsc, int scr_ver);
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int sde_dsc_populate_dsc_private_params(struct msm_display_dsc_info *dsc_info,
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int intf_width);
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int intf_width, bool widebus_en);
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int sde_dsc_create_pps_buf_cmd(struct msm_display_dsc_info *dsc_info,
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char *buf, int pps_id, u32 len);
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#endif /* __SDE_DSC_HELPER_H__ */
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