disp: msm: dsi: follow the HPG guidelines for DATABUS_WIDEN

In case of DATABUS_WIDEN, follow the HPG to calculate bitclk,
byteclk and pclk. Configure the DST_FORMAT and the clock
dividers in DSI PHY and DISP_CC w.r.t. the bpp before
compression.

Change-Id: I526eab5bc88b8d667b8b1a0d257b2f147998286a
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
此提交包含在:
Kirill Shpin
2023-04-12 16:43:35 -07:00
提交者 Rohith Iyer
父節點 f993f4d8e0
當前提交 7b4616f157
共有 11 個檔案被更改,包括 77 行新增37 行删除

查看文件

@@ -286,8 +286,11 @@ enum msm_display_wd_jitter_type {
MSM_DISPLAY_WD_LTJ_JITTER = BIT(2),
};
#define MSM_DISPLAY_COMPRESSION_RATIO_NONE 1
#define MSM_DISPLAY_COMPRESSION_RATIO_MAX 5
/*
* Scale macros so that compression ratio is a factor of 100 everywhere
*/
#define MSM_DISPLAY_COMPRESSION_RATIO_NONE 100
#define MSM_DISPLAY_COMPRESSION_RATIO_MAX 500
/**
* enum msm_display_spr_pack_type - sub pixel rendering pack patterns supported
@@ -719,11 +722,17 @@ struct msm_display_vdc_info {
*/
#define DSC_BPP(config) ((config).bits_per_pixel >> 4)
/**
* Bits/component
* returns the integer bpc value from the drm_dsc_config struct
*/
#define DSC_BPC(config) ((config).bits_per_component)
/**
* struct msm_compression_info - defined panel compression
* @enabled: enabled/disabled
* @comp_type: type of compression supported
* @comp_ratio: compression ratio
* @comp_ratio: compression ratio multiplied by 100
* @src_bpp: bits per pixel before compression
* @tgt_bpp: bits per pixel after compression
* @dsc_info: dsc configuration if the compression