disp: msm: dsi: follow the HPG guidelines for DATABUS_WIDEN

In case of DATABUS_WIDEN, follow the HPG to calculate bitclk,
byteclk and pclk. Configure the DST_FORMAT and the clock
dividers in DSI PHY and DISP_CC w.r.t. the bpp before
compression.

Change-Id: I526eab5bc88b8d667b8b1a0d257b2f147998286a
Signed-off-by: Srihitha Tangudu <quic_tangudu@quicinc.com>
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>

msm/dsi/dsi_drm.c

@@ -686,7 +686,7 @@ int dsi_conn_get_mode_info(struct drm_connector *connector,
 	if (mode_info->comp_info.comp_type) {
 		tar_bpp = dsi_mode->priv_info->pclk_scale.numer;
 		src_bpp = dsi_mode->priv_info->pclk_scale.denom;
-		mode_info->comp_info.comp_ratio = mult_frac(1, src_bpp,
+		mode_info->comp_info.comp_ratio = mult_frac(100, src_bpp,
 				tar_bpp);
 		mode_info->wide_bus_en = dsi_mode->priv_info->widebus_support;
 	}