samsung-sm8650/android_kernel_samsung_sm8650-modules
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Kods Problēmas Izmaiņu pieprasījumi Darbības Pakotnes Projekti Laidieni Vikivietne Aktivitāte

qcacmn: add new files for HAL v2

Pārlūkot izejas kodu 
add hal v2 new files

Change-Id: I7728be33db7d28e44d04f19c99e8b9f47145f2e3
CRs-Fixed: 3249002
Šī revīzija ir iekļauta:
Ruben Columbus
2022-07-18 17:30:03 -07:00
revīziju iesūtīja Madan Koyyalamudi
vecāks a0e9c0fa4a
revīzija 7a962c59e6
11 mainīti faili ar 1326 papildinājumiem un 672 dzēšanām
Lejupielādēt ielāpa failu Lejupielādēt izmaiņu failu Izvērst visus failus Savērst visus failus

140
hal/wifi3.0/be/hal_be_tx.h
Parādīt failu

@@ -627,83 +627,16 @@ hal_tx_get_num_tcl_banks(hal_soc_handle_t hal_soc_hdl)
*
* Returns: None
*/
#ifdef HWIO_TCL_R0_SW_CONFIG_BANK_n_MCAST_PACKET_CTRL_SHFT
static inline void
hal_tx_populate_bank_register(hal_soc_handle_t hal_soc_hdl,
union hal_tx_bank_config *config,
uint8_t bank_id)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
uint32_t reg_addr, reg_val = 0;
reg_addr = HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDR(MAC_TCL_REG_REG_BASE,
bank_id);
reg_val |= (config->epd << HWIO_TCL_R0_SW_CONFIG_BANK_n_EPD_SHFT);
reg_val |= (config->encap_type <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ENCAP_TYPE_SHFT);
reg_val |= (config->encrypt_type <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ENCRYPT_TYPE_SHFT);
reg_val |= (config->src_buffer_swap <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_SRC_BUFFER_SWAP_SHFT);
reg_val |= (config->link_meta_swap <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_LINK_META_SWAP_SHFT);
reg_val |= (config->index_lookup_enable <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_INDEX_LOOKUP_ENABLE_SHFT);
reg_val |= (config->addrx_en <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDRX_EN_SHFT);
reg_val |= (config->addry_en <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDRY_EN_SHFT);
reg_val |= (config->mesh_enable <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_MESH_ENABLE_SHFT);
reg_val |= (config->vdev_id_check_en <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_VDEV_ID_CHECK_EN_SHFT);
reg_val |= (config->pmac_id <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_PMAC_ID_SHFT);
reg_val |= (config->mcast_pkt_ctrl <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_MCAST_PACKET_CTRL_SHFT);
HAL_REG_WRITE(hal_soc, reg_addr, reg_val);
hal_soc->ops->hal_tx_populate_bank_register(hal_soc_hdl, config,
bank_id);
}
#else
static inline void
hal_tx_populate_bank_register(hal_soc_handle_t hal_soc_hdl,
union hal_tx_bank_config *config,
uint8_t bank_id)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
uint32_t reg_addr, reg_val = 0;
reg_addr = HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDR(MAC_TCL_REG_REG_BASE,
bank_id);
reg_val |= (config->epd << HWIO_TCL_R0_SW_CONFIG_BANK_n_EPD_SHFT);
reg_val |= (config->encap_type <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ENCAP_TYPE_SHFT);
reg_val |= (config->encrypt_type <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ENCRYPT_TYPE_SHFT);
reg_val |= (config->src_buffer_swap <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_SRC_BUFFER_SWAP_SHFT);
reg_val |= (config->link_meta_swap <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_LINK_META_SWAP_SHFT);
reg_val |= (config->index_lookup_enable <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_INDEX_LOOKUP_ENABLE_SHFT);
reg_val |= (config->addrx_en <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDRX_EN_SHFT);
reg_val |= (config->addry_en <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_ADDRY_EN_SHFT);
reg_val |= (config->mesh_enable <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_MESH_ENABLE_SHFT);
reg_val |= (config->vdev_id_check_en <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_VDEV_ID_CHECK_EN_SHFT);
reg_val |= (config->pmac_id <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_PMAC_ID_SHFT);
reg_val |= (config->dscp_tid_map_id <<
HWIO_TCL_R0_SW_CONFIG_BANK_n_DSCP_TID_TABLE_NUM_SHFT);
HAL_REG_WRITE(hal_soc, reg_addr, reg_val);
}
#endif
#ifdef DP_TX_IMPLICIT_RBM_MAPPING
@@ -817,57 +750,6 @@ hal_tx_desc_set_buf_addr_be(hal_soc_handle_t hal_soc_hdl, void *desc,
}
#endif
#ifdef HWIO_TCL_R0_VDEV_MCAST_PACKET_CTRL_MAP_n_VAL_SHFT
#define HAL_TCL_VDEV_MCAST_PACKET_CTRL_REG_ID(vdev_id) (vdev_id >> 0x4)
#define HAL_TCL_VDEV_MCAST_PACKET_CTRL_INDEX_IN_REG(vdev_id) (vdev_id & 0xF)
#define HAL_TCL_VDEV_MCAST_PACKET_CTRL_MASK 0x3
#define HAL_TCL_VDEV_MCAST_PACKET_CTRL_SHIFT 0x2
/**
* hal_tx_vdev_mcast_ctrl_set - set mcast_ctrl value
* @hal_soc: HAL SoC context
* @mcast_ctrl_val: mcast ctrl value for this VAP
*
* Return: void
*/
static inline void
hal_tx_vdev_mcast_ctrl_set(hal_soc_handle_t hal_soc_hdl,
uint8_t vdev_id,
uint8_t mcast_ctrl_val)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
uint32_t reg_addr, reg_val = 0;
uint32_t val;
uint8_t reg_idx = HAL_TCL_VDEV_MCAST_PACKET_CTRL_REG_ID(vdev_id);
uint8_t index_in_reg =
HAL_TCL_VDEV_MCAST_PACKET_CTRL_INDEX_IN_REG(vdev_id);
reg_addr =
HWIO_TCL_R0_VDEV_MCAST_PACKET_CTRL_MAP_n_ADDR(MAC_TCL_REG_REG_BASE,
reg_idx);
val = HAL_REG_READ(hal_soc, reg_addr);
/* mask out other stored value */
val &= (~(HAL_TCL_VDEV_MCAST_PACKET_CTRL_MASK <<
(HAL_TCL_VDEV_MCAST_PACKET_CTRL_SHIFT * index_in_reg)));
reg_val = val |
((HAL_TCL_VDEV_MCAST_PACKET_CTRL_MASK & mcast_ctrl_val) <<
(HAL_TCL_VDEV_MCAST_PACKET_CTRL_SHIFT * index_in_reg));
HAL_REG_WRITE(hal_soc, reg_addr, reg_val);
}
#else
static inline void
hal_tx_vdev_mcast_ctrl_set(hal_soc_handle_t hal_soc_hdl,
uint8_t vdev_id,
uint8_t mcast_ctrl_val)
{
}
#endif
/**
* hal_tx_vdev_mismatch_routing_set - set vdev mismatch exception routing
* @hal_soc: HAL SoC context
@@ -1032,4 +914,22 @@ hal_tx_enable_pri2tid_map(hal_soc_handle_t hal_soc_hdl, bool val,
hal_soc->ops->hal_tx_enable_pri2tid_map(hal_soc_hdl, val,
ppe_vp_idx);
}
#ifdef HWIO_TCL_R0_VDEV_MCAST_PACKET_CTRL_MAP_n_VAL_SHFT
static inline void
hal_tx_vdev_mcast_ctrl_set(hal_soc_handle_t hal_soc_hdl,
uint8_t vdev_id, uint8_t mcast_ctrl_val)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
hal_soc->ops->hal_tx_vdev_mcast_ctrl_set(hal_soc_hdl, vdev_id,
mcast_ctrl_val);
}
#else
static inline void
hal_tx_vdev_mcast_ctrl_set(hal_soc_handle_t hal_soc_hdl,
uint8_t vdev_id, uint8_t mcast_ctrl_val)
{
}
#endif
#endif /* _HAL_BE_TX_H_ */