Merge "qcacmn: Add HE beamforming capabilty mask"

wmi/inc/wmi_unified_param.h

@@ -166,6 +166,7 @@
 #define WMI_HOST_TXBF_CONF_SU_TX_BFEE_SET(x, z) \
 	WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_SU_TX_BFEE)
 
+
 #define WMI_HOST_TXBF_CONF_MU_TX_BFEE_S 1
 #define WMI_HOST_TXBF_CONF_MU_TX_BFEE_M 0x1
 #define WMI_HOST_TXBF_CONF_MU_TX_BFEE \
@@ -220,6 +221,70 @@
 #define WMI_HOST_TXBF_CONF_BF_SND_DIM_SET(x, z) \
 	WMI_HOST_F_RMW(x, z, WMI_HOST_TXBF_CONF_BF_SND_DIM)
 
+/* HE BF capabilities mask */
+#define WMI_HOST_HE_BF_CONF_SU_BFEE_S 0
+#define WMI_HOST_HE_BF_CONF_SU_BFEE_M 0x1
+#define WMI_HOST_HE_BF_CONF_SU_BFEE \
+	(WMI_HOST_HE_BF_CONF_SU_BFEE_M << WMI_HOST_HE_BF_CONF_SU_BFEE_S)
+#define WMI_HOST_HE_BF_CONF_SU_BFEE_GET(x) \
+	WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_SU_BFEE)
+#define WMI_HOST_HE_BF_CONF_SU_BFEE_SET(x, z) \
+	WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_SU_BFEE)
+
+#define WMI_HOST_HE_BF_CONF_SU_BFER_S 1
+#define WMI_HOST_HE_BF_CONF_SU_BFER_M 0x1
+#define WMI_HOST_HE_BF_CONF_SU_BFER \
+	(WMI_HOST_HE_BF_CONF_SU_BFER_M << WMI_HOST_HE_BF_CONF_SU_BFER_S)
+#define WMI_HOST_HE_BF_CONF_SU_BFER_GET(x) \
+	WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_SU_BFER)
+#define WMI_HOST_HE_BF_CONF_SU_BFER_SET(x, z) \
+	WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_SU_BFER)
+
+#define WMI_HOST_HE_BF_CONF_MU_BFEE_S 2
+#define WMI_HOST_HE_BF_CONF_MU_BFEE_M 0x1
+#define WMI_HOST_HE_BF_CONF_MU_BFEE \
+	(WMI_HOST_HE_BF_CONF_MU_BFEE_M << WMI_HOST_HE_BF_CONF_MU_BFEE_S)
+#define WMI_HOST_HE_BF_CONF_MU_BFEE_GET(x) \
+	WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_MU_BFEE)
+#define WMI_HOST_HE_BF_CONF_MU_BFEE_SET(x, z) \
+	WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_MU_BFEE)
+
+#define WMI_HOST_HE_BF_CONF_MU_BFER_S 3
+#define WMI_HOST_HE_BF_CONF_MU_BFER_M 0x1
+#define WMI_HOST_HE_BF_CONF_MU_BFER \
+	(WMI_HOST_HE_BF_CONF_MU_BFER_M << WMI_HOST_HE_BF_CONF_MU_BFER_S)
+#define WMI_HOST_HE_BF_CONF_MU_BFER_GET(x) \
+	WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_MU_BFER)
+#define WMI_HOST_HE_BF_CONF_MU_BFER_SET(x, z) \
+	WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_MU_BFER)
+
+#define WMI_HOST_HE_BF_CONF_DL_OFDMA_S 4
+#define WMI_HOST_HE_BF_CONF_DL_OFDMA_M 0x1
+#define WMI_HOST_HE_BF_CONF_DL_OFDMA \
+	(WMI_HOST_HE_BF_CONF_DL_OFDMA_M << WMI_HOST_HE_BF_CONF_DL_OFDMA_S)
+#define WMI_HOST_HE_BF_CONF_DL_OFDMA_GET(x) \
+	WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_DL_OFDMA)
+#define WMI_HOST_HE_BF_CONF_DL_OFDMA_SET(x, z) \
+	WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_DL_OFDMA)
+
+#define WMI_HOST_HE_BF_CONF_UL_OFDMA_S 5
+#define WMI_HOST_HE_BF_CONF_UL_OFDMA_M 0x1
+#define WMI_HOST_HE_BF_CONF_UL_OFDMA \
+	(WMI_HOST_HE_BF_CONF_UL_OFDMA_M << WMI_HOST_HE_BF_CONF_UL_OFDMA_S)
+#define WMI_HOST_HE_BF_CONF_UL_OFDMA_GET(x) \
+	WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_UL_OFDMA)
+#define WMI_HOST_HE_BF_CONF_UL_OFDMA_SET(x, z) \
+	WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_UL_OFDMA)
+
+#define WMI_HOST_HE_BF_CONF_UL_MUMIMO_S 6
+#define WMI_HOST_HE_BF_CONF_UL_MUMIMO_M 0x1
+#define WMI_HOST_HE_BF_CONF_UL_MUMIMO \
+	(WMI_HOST_HE_BF_CONF_UL_MUMIMO_M << WMI_HOST_HE_BF_CONF_UL_MUMIMO_S)
+#define WMI_HOST_HE_BF_CONF_UL_MUMIMO_GET(x) \
+	WMI_HOST_F_MS(x, WMI_HOST_HE_BF_CONF_UL_MUMIMO)
+#define WMI_HOST_HE_BF_CONF_UL_MUMIMO_SET(x, z) \
+	WMI_HOST_F_RMW(x, z, WMI_HOST_HE_BF_CONF_UL_MUMIMO)
+
 #define WMI_HOST_TPC_RATE_MAX	160
 #define WMI_HOST_TPC_TX_NUM_CHAIN	4
 #define WMI_HOST_RXG_CAL_CHAN_MAX	4