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@@ -187,6 +187,9 @@
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#define AR6320V2_SOC_CHIP_ID_VERSION_LSB 18
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#define AR6320V2_SOC_CHIP_ID_VERSION_LSB 18
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#define AR6320V2_SOC_CHIP_ID_REVISION_MASK 0x00000f00
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#define AR6320V2_SOC_CHIP_ID_REVISION_MASK 0x00000f00
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#define AR6320V2_SOC_CHIP_ID_REVISION_LSB 8
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#define AR6320V2_SOC_CHIP_ID_REVISION_LSB 8
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+#if defined(HIF_SDIO)
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+#define AR6320V2_FW_IND_HELPER 4
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+#endif
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#if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB)
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#if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB)
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#define AR6320V2_CE_WRAPPER_BASE_ADDRESS 0x00034000
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#define AR6320V2_CE_WRAPPER_BASE_ADDRESS 0x00034000
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#define AR6320V2_CE0_BASE_ADDRESS 0x00034400
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#define AR6320V2_CE0_BASE_ADDRESS 0x00034400
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@@ -747,6 +750,9 @@ struct hostdef_s ar6320v2_hostdef = {
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.d_HOST_CE_COUNT = 8,
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.d_HOST_CE_COUNT = 8,
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.d_ENABLE_MSI = 0,
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.d_ENABLE_MSI = 0,
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#endif
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#endif
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+#if defined(HIF_SDIO)
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+ .d_FW_IND_HELPER = AR6320V2_FW_IND_HELPER,
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+#endif
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};
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};
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#if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB)
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#if defined(HIF_PCI) || defined(HIF_SNOC) || defined(HIF_AHB)
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