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@@ -69,18 +69,18 @@ irqreturn_t cam_cci_irq(int irq_num, void *data)
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if (irq_status0 & CCI_IRQ_STATUS_0_RST_DONE_ACK_BMSK) {
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if (irq_status0 & CCI_IRQ_STATUS_0_RST_DONE_ACK_BMSK) {
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struct cam_cci_master_info *cci_master_info;
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struct cam_cci_master_info *cci_master_info;
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- if (cci_dev->cci_master_info[MASTER_0].reset_pending == TRUE) {
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+ if (cci_dev->cci_master_info[MASTER_0].reset_pending == true) {
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cci_master_info = &cci_dev->cci_master_info[MASTER_0];
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cci_master_info = &cci_dev->cci_master_info[MASTER_0];
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cci_dev->cci_master_info[MASTER_0].reset_pending =
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cci_dev->cci_master_info[MASTER_0].reset_pending =
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- FALSE;
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+ false;
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if (!cci_master_info->status)
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if (!cci_master_info->status)
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complete(&cci_master_info->reset_complete);
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complete(&cci_master_info->reset_complete);
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cci_master_info->status = 0;
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cci_master_info->status = 0;
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}
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}
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- if (cci_dev->cci_master_info[MASTER_1].reset_pending == TRUE) {
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+ if (cci_dev->cci_master_info[MASTER_1].reset_pending == true) {
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cci_master_info = &cci_dev->cci_master_info[MASTER_1];
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cci_master_info = &cci_dev->cci_master_info[MASTER_1];
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cci_dev->cci_master_info[MASTER_1].reset_pending =
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cci_dev->cci_master_info[MASTER_1].reset_pending =
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- FALSE;
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+ false;
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if (!cci_master_info->status)
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if (!cci_master_info->status)
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complete(&cci_master_info->reset_complete);
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complete(&cci_master_info->reset_complete);
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cci_master_info->status = 0;
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cci_master_info->status = 0;
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@@ -205,12 +205,12 @@ irqreturn_t cam_cci_irq(int irq_num, void *data)
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CAM_DBG(CAM_CCI, "RD_PAUSE ON MASTER_1");
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CAM_DBG(CAM_CCI, "RD_PAUSE ON MASTER_1");
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if (irq_status0 & CCI_IRQ_STATUS_0_I2C_M0_Q0Q1_HALT_ACK_BMSK) {
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if (irq_status0 & CCI_IRQ_STATUS_0_I2C_M0_Q0Q1_HALT_ACK_BMSK) {
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- cci_dev->cci_master_info[MASTER_0].reset_pending = TRUE;
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+ cci_dev->cci_master_info[MASTER_0].reset_pending = true;
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cam_io_w_mb(CCI_M0_RESET_RMSK,
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cam_io_w_mb(CCI_M0_RESET_RMSK,
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base + CCI_RESET_CMD_ADDR);
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base + CCI_RESET_CMD_ADDR);
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}
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}
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if (irq_status0 & CCI_IRQ_STATUS_0_I2C_M1_Q0Q1_HALT_ACK_BMSK) {
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if (irq_status0 & CCI_IRQ_STATUS_0_I2C_M1_Q0Q1_HALT_ACK_BMSK) {
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- cci_dev->cci_master_info[MASTER_1].reset_pending = TRUE;
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+ cci_dev->cci_master_info[MASTER_1].reset_pending = true;
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cam_io_w_mb(CCI_M1_RESET_RMSK,
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cam_io_w_mb(CCI_M1_RESET_RMSK,
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base + CCI_RESET_CMD_ADDR);
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base + CCI_RESET_CMD_ADDR);
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}
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}
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@@ -316,7 +316,7 @@ static int cam_cci_irq_routine(struct v4l2_subdev *sd, u32 status,
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&cci_dev->soc_info;
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&cci_dev->soc_info;
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ret = cam_cci_irq(soc_info->irq_line->start, cci_dev);
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ret = cam_cci_irq(soc_info->irq_line->start, cci_dev);
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- *handled = TRUE;
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+ *handled = true;
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return 0;
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return 0;
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}
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}
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