disp: msm: sde: fix gamut block pogramming sequence

Gamut registers have been updated in newer version of dpu where the
bit depth of the registers have been updated. Change programs
the values by adjusting for bit depth changes.

Change-Id: Id8d8dc37aff6854d67855b9aa7644d1ca4ec4e6f
Signed-off-by: Lakshmi Narayana Kalavala <[email protected]>

msm/sde/sde_hw_reg_dma_v1_color_proc.c

@@ -4146,9 +4146,10 @@ void reg_dmav2_setup_dspp_3d_gamutv43(struct sde_hw_dspp *ctx, void *cfg)
 	struct sde_reg_dma_setup_ops_cfg dma_write_cfg;
 	struct drm_msm_3d_gamut *payload;
 	int rc;
-	u32 num_of_mixers, blk = 0, i, j, k = 0, len;
+	u32 num_of_mixers, blk = 0, i, j, k = 0, len, tmp;
 	u32 op_mode, scale_offset, scale_tbl_offset, transfer_size_bytes;
 	u16 *data;
+	u32 scale_off[GAMUT_3D_SCALE_OFF_TBL_NUM][GAMUT_3D_SCALE_OFF_SZ];
 
 	rc = reg_dma_dspp_check(ctx, cfg, GAMUT);
 	if (rc)
@@ -4244,13 +4245,26 @@ void reg_dmav2_setup_dspp_3d_gamutv43(struct sde_hw_dspp *ctx, void *cfg)
 		goto exit;
 	}
 
+	if (payload && (payload->flags & GAMUT_3D_MAP_EN)) {
+		for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) {
+			for (j = 0; j < GAMUT_3D_SCALE_OFF_SZ; j++) {
+				scale_off[i][j] = payload->scale_off[i][j];
+				tmp = scale_off[i][j] & 0x1ffff000;
+				scale_off[i][j] &= 0xfff;
+				tmp = tmp << 3;
+				scale_off[i][j] =
+					tmp | scale_off[i][j];
+			}
+		}
+	}
+
 	if (op_mode & GAMUT_MAP_EN) {
 		for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) {
 			scale_tbl_offset = ctx->cap->sblk->gamut.base +
 					scale_offset +
 					(i * GAMUT_SCALE_OFF_LEN);
 			REG_DMA_SETUP_OPS(dma_write_cfg, scale_tbl_offset,
-					&payload->scale_off[i][0],
+					&scale_off[i][0],
 					GAMUT_SCALE_OFF_LEN,
 					REG_BLK_WRITE_SINGLE, 0, 0, 0);
 			rc = dma_ops->setup_payload(&dma_write_cfg);