qcacmn: Flush srng tp and hp only for flush event
Currently after runtime resume all SW2TCL data and reo cmd srng rings hp and tp value are flushed. In case of IPA offload case SW2TCL3 righ hp value will be updated by IPA and not by host. In case of runtime pm enable host is setting the value to zero as part of runtime resume which results in incorrect hp value of SW2TCL3. As part of this change set flush event for rings which are accessed by host during link down state and after runtime resume flush the rings for which flush event is set. Change-Id: I5c9afa708277cf3a6e6d5ef99447bc21f88cfdcf CRs-Fixed: 2514621
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committed by
nshrivas

parent
816b503c44
commit
78b01a1e1b
@@ -686,7 +686,6 @@ inline int hal_reo_cmd_update_rx_queue(hal_ring_handle_t hal_ring_hdl,
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struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
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uint32_t *reo_desc, val;
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struct hal_reo_cmd_update_queue_params *p;
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struct hal_srng *srng = (struct hal_srng *)hal_ring_hdl;
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p = &cmd->u.upd_queue_params;
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@@ -888,7 +887,8 @@ inline int hal_reo_cmd_update_rx_queue(hal_ring_handle_t hal_ring_hdl,
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hif_pm_runtime_put(hal_soc->hif_handle);
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} else {
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hal_srng_access_end_reap(hal_soc_hdl, hal_ring_hdl);
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srng->needs_flush++;
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hal_srng_set_event(hal_ring_hdl, HAL_SRNG_FLUSH_EVENT);
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hal_srng_inc_flush_cnt(hal_ring_hdl);
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}
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val = reo_desc[CMD_HEADER_DW_OFFSET];
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