video: driver: add buffer handling support
- Add queue buffer support - Add dequeue buffer support - Use multiple plane buffers instead of single plane. Change-Id: I911784a1fa4b8a4b5d3fd35049379ea35d4d52b0 Signed-off-by: Maheshwar Ajja <majja@codeaurora.org>
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@@ -8,6 +8,7 @@
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#include "msm_vidc_buffer.h"
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#include "msm_vidc_inst.h"
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#include "msm_vidc_core.h"
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#include "msm_vidc_platform.h"
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#include "msm_vidc_driver.h"
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#include "msm_vidc_debug.h"
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@@ -1001,27 +1002,36 @@ static u32 calculate_mpeg2d_persist1_size(void)
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return QMATRIX_SIZE + MP2D_QPDUMP_SIZE;
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}
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/* encoder internal buffers */
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/* decoder internal buffers */
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u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst)
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{
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struct msm_vidc_core *core;
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u32 size = 0;
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u32 width, height, num_vpp_pipes;
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struct v4l2_format *f;
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bool is_interlaced;
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u32 vpp_delay;
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d_vpr_h("%s()\n", __func__);
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if (!inst) {
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if (!inst || !inst->core) {
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d_vpr_e("%s: invalid params\n", __func__);
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return size;
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}
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core = inst->core;
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num_vpp_pipes = 0;
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vpp_delay = 0;
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if (!core->capabilities) {
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d_vpr_e("%s: invalid capabilities\n", __func__);
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return size;
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}
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num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value;
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if (inst->decode_vpp_delay.enable)
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vpp_delay = inst->decode_vpp_delay.size;
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else
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vpp_delay = DEFAULT_BSE_VPP_DELAY;
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is_interlaced = false; //(inst->pic_struct == MSM_VIDC_PIC_STRUCT_MAYBE_INTERLACED);
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f = &inst->fmts[INPUT_PORT];
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width = f->fmt.pix.width;
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height = f->fmt.pix.height;
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width = f->fmt.pix_mp.width;
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height = f->fmt.pix_mp.height;
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if (inst->codec == MSM_VIDC_H264) {
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size = calculate_h264d_scratch_size(inst, width, height,
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@@ -1042,22 +1052,31 @@ u32 msm_vidc_decoder_scratch_size_iris2(struct msm_vidc_inst *inst)
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u32 msm_vidc_decoder_scratch_1_size_iris2(struct msm_vidc_inst *inst)
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{
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struct msm_vidc_core *core;
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u32 size = 0;
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u32 width, height, out_min_count, num_vpp_pipes;
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struct v4l2_format *f;
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u32 vpp_delay;
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d_vpr_h("%s()\n", __func__);
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if (!inst) {
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if (!inst || !inst->core) {
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d_vpr_e("%s: invalid params\n", __func__);
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return size;
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}
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core = inst->core;
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num_vpp_pipes = 0;
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vpp_delay = 0;
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if (!core->capabilities) {
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d_vpr_e("%s: invalid capabilities\n", __func__);
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return size;
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}
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num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value;
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if (inst->decode_vpp_delay.enable)
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vpp_delay = inst->decode_vpp_delay.size;
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else
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vpp_delay = DEFAULT_BSE_VPP_DELAY;
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f = &inst->fmts[INPUT_PORT];
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width = f->fmt.pix.width;
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height = f->fmt.pix.height;
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width = f->fmt.pix_mp.width;
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height = f->fmt.pix_mp.height;
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out_min_count = inst->buffers.output.min_count;
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out_min_count = max(vpp_delay + 1, out_min_count);
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@@ -1108,6 +1127,7 @@ u32 msm_vidc_decoder_persist_1_size_iris2(struct msm_vidc_inst *inst)
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/* encoder internal buffers */
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u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst)
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{
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struct msm_vidc_core *core;
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u32 size = 0;
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u32 width, height, num_vpp_pipes;
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struct v4l2_format *f;
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@@ -1116,11 +1136,17 @@ u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst)
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d_vpr_e("%s: invalid params\n", __func__);
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return size;
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}
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core = inst->core;
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num_vpp_pipes = 4; //inst->core->platform_data->num_vpp_pipes;
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if (!core->capabilities) {
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d_vpr_e("%s: invalid capabilities\n", __func__);
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return size;
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}
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num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value;
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f = &inst->fmts[OUTPUT_PORT];
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width = f->fmt.pix.width;
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height = f->fmt.pix.height;
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width = f->fmt.pix_mp.width;
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height = f->fmt.pix_mp.height;
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if (inst->codec == MSM_VIDC_H264) {
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size = calculate_h264e_scratch_size(inst, width, height,
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@@ -1137,6 +1163,7 @@ u32 msm_vidc_encoder_scratch_size_iris2(struct msm_vidc_inst *inst)
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u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst)
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{
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struct msm_vidc_core *core;
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u32 size = 0;
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u32 width, height, num_ref, num_vpp_pipes;
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bool is_tenbit = false;
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@@ -1146,11 +1173,17 @@ u32 msm_vidc_encoder_scratch_1_size_iris2(struct msm_vidc_inst *inst)
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d_vpr_e("%s: Instance is null!", __func__);
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return size;
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}
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core = inst->core;
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num_vpp_pipes = 4; //inst->core->platform_data->num_vpp_pipes;
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if (!core->capabilities) {
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d_vpr_e("%s: invalid capabilities\n", __func__);
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return size;
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}
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num_vpp_pipes = core->capabilities[NUM_VPP_PIPE].value;
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f = &inst->fmts[OUTPUT_PORT];
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width = f->fmt.pix.width;
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height = f->fmt.pix.height;
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width = f->fmt.pix_mp.width;
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height = f->fmt.pix_mp.height;
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num_ref = 4; //msm_vidc_get_num_ref_frames(inst);
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is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10);
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@@ -1177,8 +1210,8 @@ u32 msm_vidc_encoder_scratch_2_size_iris2(struct msm_vidc_inst *inst)
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}
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f = &inst->fmts[OUTPUT_PORT];
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width = f->fmt.pix.width;
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height = f->fmt.pix.height;
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width = f->fmt.pix_mp.width;
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height = f->fmt.pix_mp.height;
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num_ref = 4; //msm_vidc_get_num_ref_frames(inst);
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is_tenbit = false; //(inst->bit_depth == MSM_VIDC_BIT_DEPTH_10);
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