Merge "msm: camera: isp: Optimize logging in CSID and VFE" into camera-kernel.lnx.5.0

This commit is contained in:
Haritha Chintalapati
2021-04-30 17:31:46 -07:00
gecommit door Gerrit - the friendly Code Review server
bovenliggende f55270528c 079ac53c61
commit 77b450ba67
4 gewijzigde bestanden met toevoegingen van 11 en 10 verwijderingen

Bestand weergeven

@@ -11216,7 +11216,7 @@ static int cam_ife_hw_mgr_debug_register(void)
rc = PTR_ERR(dbgfileptr);
}
end:
g_ife_hw_mgr.debug_cfg.enable_recovery = 1;
g_ife_hw_mgr.debug_cfg.enable_csid_recovery = 1;
return rc;
}

Bestand weergeven

@@ -2648,7 +2648,11 @@ static int cam_ife_csid_ver1_enable_hw(struct cam_ife_csid_ver1_hw *csid_hw)
rc = cam_soc_util_get_clk_level(soc_info, csid_hw->clk_rate,
soc_info->src_clk_idx, &clk_lvl);
CAM_DBG(CAM_ISP, "CSID clock lvl %u", clk_lvl);
CAM_DBG(CAM_ISP,
"CSID[%d] clk lvl %u received clk_rate %u applied clk_rate %lu",
csid_hw->hw_intf->hw_idx, clk_lvl, csid_hw->clk_rate,
soc_info->applied_src_clk_rate);
rc = cam_ife_csid_enable_soc_resources(soc_info, clk_lvl);
@@ -3528,7 +3532,6 @@ static int cam_ife_csid_ver1_set_csid_clock(
(struct cam_ife_csid_clock_update_args *)cmd_args;
csid_hw->clk_rate = clk_update->clk_rate;
CAM_INFO(CAM_ISP, "CSID clock rate %llu", csid_hw->clk_rate);
return 0;
}

Bestand weergeven

@@ -3314,9 +3314,10 @@ static int cam_ife_csid_ver2_enable_core(struct cam_ife_csid_ver2_hw *csid_hw)
csid_hw->clk_rate);
}
CAM_DBG(CAM_ISP, "CSID[%d] clock lvl %u rate %u",
csid_hw->hw_intf->hw_idx,
clk_lvl, csid_hw->clk_rate);
CAM_DBG(CAM_ISP,
"CSID[%d] clk lvl %u received clk_rate %u applied clk_rate %lu",
csid_hw->hw_intf->hw_idx, clk_lvl, csid_hw->clk_rate,
soc_info->applied_src_clk_rate);
rc = cam_ife_csid_enable_soc_resources(soc_info, clk_lvl);
@@ -4189,9 +4190,6 @@ static int cam_ife_csid_ver2_set_csid_clock(
(struct cam_ife_csid_clock_update_args *)cmd_args;
csid_hw->clk_rate = clk_update->clk_rate;
CAM_INFO(CAM_ISP, "CSID[%u] clock rate %llu",
csid_hw->hw_intf->hw_idx,
csid_hw->clk_rate);
return 0;
}

Bestand weergeven

@@ -1169,7 +1169,7 @@ int cam_vfe_top_ver4_init_hw(void *device_priv,
* Auto clock gating is enabled by default, but no harm
* in setting the value we expect.
*/
CAM_INFO(CAM_ISP, "Enabling clock gating at IFE top");
CAM_DBG(CAM_ISP, "Enabling clock gating at IFE top");
cam_soc_util_w_mb(common_data.soc_info, VFE_CORE_BASE_IDX,
common_data.common_reg->core_cgc_ovd_0, 0x0);