msm: camera: isp: Improve CSID debug infrastructure

Add provision to allow user to set vc-dt for rx pkt capture.
Allow user to decide if pkt strobes need to be reset to allow
for next packet capture. Change rx top half processing to only allow
set bits to be processed. Change rate limit log to info, if
user has enabled specific CSID IRQs, allow them to be logged
per frame.

[0:3]   = rst strobes
[4:11]  = vc for capture
[12:19] = dt for capture

echo <debug_val> > /sys/kernel/debug/camera_ife/ife_csid_rx_capture_debug.

CRs-Fixed: 3068993
Change-Id: I45d1db4fceba736fb03201786a8ae1e4af5b691f
Signed-off-by: Karthik Anantha Ram <[email protected]>

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.c

@@ -6458,6 +6458,76 @@ end:
 	return 0;
 }
 
+static void cam_ife_hw_mgr_set_hw_debug_config(
+	struct cam_ife_hw_mgr_ctx *ctx)
+{
+	int i, rc;
+	uint32_t hw_idx = 0;
+	struct cam_ife_hw_mgr *hw_mgr = ctx->hw_mgr;
+	struct cam_ife_csid_debug_cfg_args csid_debug_args;
+	struct cam_sfe_debug_cfg_params sfe_debug_args;
+	bool ife_bus_debug_args;
+
+	/* Set CSID debug args */
+	csid_debug_args.csid_debug = hw_mgr->debug_cfg.csid_debug;
+	csid_debug_args.csid_rx_capture_debug = hw_mgr->debug_cfg.rx_capture_debug;
+	csid_debug_args.rx_capture_debug_set = hw_mgr->debug_cfg.rx_capture_debug_set;
+
+	/* Set SFE debug args */
+	sfe_debug_args.cache_config = false;
+	sfe_debug_args.u.dbg_cfg.sfe_debug_cfg = hw_mgr->debug_cfg.sfe_debug;
+	sfe_debug_args.u.dbg_cfg.sfe_sensor_sel = hw_mgr->debug_cfg.sfe_sensor_diag_cfg;
+
+	/* Set IFE bus debug args */
+	ife_bus_debug_args = hw_mgr->debug_cfg.disable_ife_mmu_prefetch;
+
+	/* Iterate over HW acquired for this stream and update debug config */
+	for (i = 0; i < ctx->num_base; i++) {
+		hw_idx = ctx->base[i].idx;
+
+		switch (ctx->base[i].hw_type) {
+		case CAM_ISP_HW_TYPE_VFE:
+			if (hw_mgr->ife_devices[hw_idx]) {
+				rc = hw_mgr->ife_devices[hw_idx]->hw_intf->hw_ops.process_cmd(
+					hw_mgr->ife_devices[hw_idx]->hw_intf->hw_priv,
+					CAM_ISP_HW_CMD_IFE_BUS_DEBUG_CFG,
+					&ife_bus_debug_args, sizeof(ife_bus_debug_args));
+				if (rc)
+					CAM_DBG(CAM_ISP,
+						"Failed to set IFE_%u bus wr debug cfg rc: %d",
+						hw_idx, rc);
+			}
+			break;
+		case CAM_ISP_HW_TYPE_SFE:
+			if (hw_mgr->sfe_devices[hw_idx]) {
+				rc = hw_mgr->sfe_devices[hw_idx]->hw_intf->hw_ops.process_cmd(
+					hw_mgr->sfe_devices[hw_idx]->hw_intf->hw_priv,
+					CAM_ISP_HW_CMD_SET_SFE_DEBUG_CFG,
+					&sfe_debug_args, sizeof(sfe_debug_args));
+				if (rc)
+					CAM_DBG(CAM_ISP,
+						"Failed to set SFE_%u debug cfg rc: %d",
+						hw_idx, rc);
+			}
+			break;
+		case CAM_ISP_HW_TYPE_CSID:
+			if (hw_mgr->csid_devices[hw_idx]) {
+				rc = hw_mgr->csid_devices[hw_idx]->hw_ops.process_cmd(
+					hw_mgr->csid_devices[hw_idx]->hw_priv,
+					CAM_IFE_CSID_SET_CSID_DEBUG,
+					&csid_debug_args, sizeof(csid_debug_args));
+				if (rc)
+					CAM_DBG(CAM_ISP,
+						"Failed to set CSID_%u debug cfg rc: %d",
+						hw_idx, rc);
+			}
+			break;
+		default:
+			break;
+		}
+	}
+}
+
 static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
 {
 	int                                  rc = -1;
@@ -6518,46 +6588,8 @@ static int cam_ife_mgr_start_hw(void *hw_mgr_priv, void *start_hw_args)
 		goto start_only;
 	}
 
-	/* set current csid debug information to CSID HW */
-	for (i = 0; i < CAM_IFE_CSID_HW_NUM_MAX; i++) {
-		if (g_ife_hw_mgr.csid_devices[i]) {
-			rc = g_ife_hw_mgr.csid_devices[i]->hw_ops.process_cmd(
-				g_ife_hw_mgr.csid_devices[i]->hw_priv,
-				CAM_IFE_CSID_SET_CSID_DEBUG,
-				&g_ife_hw_mgr.debug_cfg.csid_debug,
-				sizeof(g_ife_hw_mgr.debug_cfg.csid_debug));
-		}
-	}
-
-	/* set current SFE debug information to SFE HW */
-	for (i = 0; i < CAM_SFE_HW_NUM_MAX; i++) {
-		struct cam_sfe_debug_cfg_params debug_cfg;
-
-		debug_cfg.cache_config = false;
-		debug_cfg.u.dbg_cfg.sfe_debug_cfg = g_ife_hw_mgr.debug_cfg.sfe_debug;
-		debug_cfg.u.dbg_cfg.sfe_sensor_sel = g_ife_hw_mgr.debug_cfg.sfe_sensor_diag_cfg;
-		if (g_ife_hw_mgr.sfe_devices[i]) {
-			rc = g_ife_hw_mgr.sfe_devices[i]->hw_intf->hw_ops.process_cmd(
-				g_ife_hw_mgr.sfe_devices[i]->hw_intf->hw_priv,
-				CAM_ISP_HW_CMD_SET_SFE_DEBUG_CFG,
-				&debug_cfg,
-				sizeof(debug_cfg));
-		}
-	}
-
-	/* set IFE bus WR MMU config */
-	for (i = 0; i < CAM_IFE_HW_NUM_MAX; i++) {
-		if (g_ife_hw_mgr.ife_devices[i]) {
-			rc = g_ife_hw_mgr.ife_devices[i]->hw_intf->hw_ops.process_cmd(
-				g_ife_hw_mgr.ife_devices[i]->hw_intf->hw_priv,
-				CAM_ISP_HW_CMD_IFE_BUS_DEBUG_CFG,
-				&g_ife_hw_mgr.debug_cfg.disable_ife_mmu_prefetch,
-				sizeof(g_ife_hw_mgr.debug_cfg.disable_ife_mmu_prefetch));
-			if (rc)
-				CAM_DBG(CAM_ISP,
-					"Failed to set IFE_%d bus wr debug cfg", i);
-		}
-	}
+	/* Update debug config for acquired HW */
+	cam_ife_hw_mgr_set_hw_debug_config(ctx);
 
 	if (ctx->flags.need_csid_top_cfg) {
 		list_for_each_entry(hw_mgr_res, &ctx->res_list_ife_csid,
@@ -13012,6 +13044,33 @@ DEFINE_DEBUGFS_ATTRIBUTE(cam_ife_sfe_sensor_diag_debug,
 	cam_ife_get_sfe_sensor_diag_debug,
 	cam_ife_set_sfe_sensor_diag_debug, "%16llu");
 
+static int cam_ife_set_csid_rx_pkt_capture_debug(void *data, u64 val)
+{
+	if (val >= 0xFFFFF) {
+		g_ife_hw_mgr.debug_cfg.rx_capture_debug_set = false;
+		g_ife_hw_mgr.debug_cfg.rx_capture_debug = 0;
+	} else {
+		g_ife_hw_mgr.debug_cfg.rx_capture_debug_set = true;
+		g_ife_hw_mgr.debug_cfg.rx_capture_debug = val;
+	}
+
+	CAM_DBG(CAM_ISP, "Set CSID RX capture Debug value :%lld", val);
+	return 0;
+}
+
+static int cam_ife_get_csid_rx_pkt_capture_debug(void *data, u64 *val)
+{
+	*val = g_ife_hw_mgr.debug_cfg.rx_capture_debug;
+	CAM_DBG(CAM_ISP, "Get CSID RX capture Debug value :%lld",
+		g_ife_hw_mgr.debug_cfg.rx_capture_debug);
+
+	return 0;
+}
+
+DEFINE_DEBUGFS_ATTRIBUTE(cam_ife_csid_rx_capture_debug,
+	cam_ife_get_csid_rx_pkt_capture_debug,
+	cam_ife_set_csid_rx_pkt_capture_debug, "%16llu");
+
 static int cam_ife_hw_mgr_debug_register(void)
 {
 	int rc = 0;
@@ -13028,6 +13087,8 @@ static int cam_ife_hw_mgr_debug_register(void)
 
 	debugfs_create_file("ife_csid_debug", 0644,
 		g_ife_hw_mgr.debug_cfg.dentry, NULL, &cam_ife_csid_debug);
+	dbgfileptr = debugfs_create_file("ife_csid_rx_capture_debug", 0644,
+		g_ife_hw_mgr.debug_cfg.dentry, NULL, &cam_ife_csid_rx_capture_debug);
 	debugfs_create_u32("enable_recovery", 0644, g_ife_hw_mgr.debug_cfg.dentry,
 		&g_ife_hw_mgr.debug_cfg.enable_recovery);
 	debugfs_create_bool("enable_req_dump", 0644,

drivers/cam_isp/isp_hw_mgr/cam_ife_hw_mgr.h

@@ -42,6 +42,7 @@ enum cam_ife_ctx_master_type {
  *
  * @dentry:                    Debugfs entry
  * @csid_debug:                csid debug information
+ * @rx_capture_debug:          rx capture debug info
  * @enable_recovery:           enable recovery
  * @camif_debug:               camif debug info
  * @enable_csid_recovery:      enable csid recovery
@@ -52,11 +53,13 @@ enum cam_ife_ctx_master_type {
  * @per_req_reg_dump:          Enable per request reg dump
  * @disable_ubwc_comp:         Disable UBWC compression
  * @disable_ife_mmu_prefetch:  Disable MMU prefetch for IFE bus WR
+ * @rx_capture_debug_set:      If rx capture debug is set by user
  *
  */
 struct cam_ife_hw_mgr_debug {
 	struct dentry  *dentry;
 	uint64_t       csid_debug;
+	uint32_t       rx_capture_debug;
 	uint32_t       enable_recovery;
 	uint32_t       camif_debug;
 	uint32_t       enable_csid_recovery;
@@ -67,6 +70,7 @@ struct cam_ife_hw_mgr_debug {
 	bool           per_req_reg_dump;
 	bool           disable_ubwc_comp;
 	bool           disable_ife_mmu_prefetch;
+	bool           rx_capture_debug_set;
 };
 
 /**

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid680.h

@@ -1060,8 +1060,12 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.vc_mask                         = 0x7C00000,
 		.dt_mask                         = 0x3f0000,
 		.wc_mask                         = 0xffff,
+		.vc_shift                        = 0x16,
+		.dt_shift                        = 0x10,
+		.wc_shift                        = 0,
 		.calc_crc_mask                   = 0xffff,
 		.expected_crc_mask               = 0xffff,
+		.calc_crc_shift                  = 0x10,
 		.ecc_correction_shift_en         = 0,
 		.lane_num_shift                  = 0,
 		.lane_cfg_shift                  = 4,
@@ -1073,6 +1077,10 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.epd_mode_shift_en               = 8,
 		.eotp_shift_en                   = 9,
 		.dyn_sensor_switch_shift_en      = 10,
+		.long_pkt_strobe_rst_shift       = 0,
+		.short_pkt_strobe_rst_shift      = 1,
+		.cphy_pkt_strobe_rst_shift       = 2,
+		.unmapped_pkt_strobe_rst_shift   = 3,
 		.fatal_err_mask                  = 0x097A000,
 		.part_fatal_err_mask             = 0x1081800,
 		.non_fatal_err_mask              = 0x0200000,

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid780.h

@@ -1122,8 +1122,12 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.vc_mask                         = 0x7C00000,
 		.dt_mask                         = 0x3f0000,
 		.wc_mask                         = 0xffff,
+		.vc_shift                        = 0x16,
+		.dt_shift                        = 0x10,
+		.wc_shift                        = 0,
 		.calc_crc_mask                   = 0xffff,
 		.expected_crc_mask               = 0xffff,
+		.calc_crc_shift                  = 0x10,
 		.ecc_correction_shift_en         = 0,
 		.lane_num_shift                  = 0,
 		.lane_cfg_shift                  = 4,
@@ -1135,6 +1139,10 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.epd_mode_shift_en               = 8,
 		.eotp_shift_en                   = 9,
 		.dyn_sensor_switch_shift_en      = 10,
+		.long_pkt_strobe_rst_shift       = 0,
+		.short_pkt_strobe_rst_shift      = 1,
+		.cphy_pkt_strobe_rst_shift       = 2,
+		.unmapped_pkt_strobe_rst_shift   = 3,
 		.fatal_err_mask                  = 0x097A000,
 		.part_fatal_err_mask             = 0x1081800,
 		.non_fatal_err_mask              = 0x0200000,

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_common.h

@@ -43,6 +43,14 @@
 #define CAM_IFE_CSID_CAP_LINE_SMOOTHING_IN_RDI            0x80
 #define CAM_IFE_CSID_CAP_SOF_RETIME_DIS                   0x100
 
+/*
+ * CSID RX debug vc-dt capture
+ */
+#define CAM_IFE_CSID_DEBUGFS_RST_STROBE_MASK              0xF
+#define CAM_IFE_CSID_DEBUGFS_VC_DT_MASK                   0xFF
+#define CAM_IFE_CSID_DEBUGFS_VC_SHIFT_MASK                0x4
+#define CAM_IFE_CSID_DEBUGFS_DT_SHIFT_MASK                0xC
+
 /*
  * Debug values enable the corresponding interrupts and debug logs provide
  * necessary information
@@ -226,14 +234,22 @@ struct cam_ife_csid_csi2_rx_reg_info {
 	uint32_t vc_mask;
 	uint32_t wc_mask;
 	uint32_t dt_mask;
+	uint32_t vc_shift;
+	uint32_t dt_shift;
+	uint32_t wc_shift;
 	uint32_t calc_crc_mask;
 	uint32_t expected_crc_mask;
+	uint32_t calc_crc_shift;
 	uint32_t lane_num_shift;
 	uint32_t lane_cfg_shift;
 	uint32_t phy_type_shift;
 	uint32_t phy_num_shift;
 	uint32_t tpg_mux_en_shift;
 	uint32_t tpg_num_sel_shift;
+	uint32_t long_pkt_strobe_rst_shift;
+	uint32_t short_pkt_strobe_rst_shift;
+	uint32_t cphy_pkt_strobe_rst_shift;
+	uint32_t unmapped_pkt_strobe_rst_shift;
 	uint32_t fatal_err_mask;
 	uint32_t part_fatal_err_mask;
 	uint32_t non_fatal_err_mask;
@@ -279,14 +295,22 @@ struct cam_ife_csid_hw_counters {
 /*
  * struct cam_ife_csid_debug_info: place holder for csid debug
  *
- * @debug_val:          Debug val for enabled features
- * @rx_mask:            Debug mask for rx irq
- * @path_mask:          Debug mask for path irq
+ * @debug_val:             Debug val for enabled features
+ * @rx_capture_vc:         rx packet vc capture
+ * @rx_capture_dt:         rx packet dt capture
+ * @rst_capture_strobes:   rx packet capture rst strobes
+ * @rx_mask:               Debug mask for rx irq
+ * @path_mask:             Debug mask for path irq
+ * @rx_capture_debug_set:  rx pkt capture debug set
  */
 struct cam_ife_csid_debug_info {
 	uint32_t                          debug_val;
+	uint32_t                          rx_capture_vc;
+	uint32_t                          rx_capture_dt;
+	uint32_t                          rst_capture_strobes;
 	uint32_t                          rx_mask;
 	uint32_t                          path_mask;
+	bool                              rx_capture_debug_set;
 };
 
 /*

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c

@@ -78,16 +78,30 @@ static bool cam_ife_csid_ver2_disable_sof_retime(
 }
 
 static int cam_ife_csid_ver2_set_debug(
-	struct cam_ife_csid_ver2_hw *csid_hw,
-	uint32_t debug_val)
+	struct cam_ife_csid_ver2_hw        *csid_hw,
+	struct cam_ife_csid_debug_cfg_args *debug_args)
 {
 	int bit_pos = 0;
-	uint32_t val;
+	uint32_t val, debug_val;
 
 	memset(&csid_hw->debug_info, 0,
 		sizeof(struct cam_ife_csid_debug_info));
-	csid_hw->debug_info.debug_val = debug_val;
-
+	csid_hw->debug_info.debug_val = debug_args->csid_debug;
+	/*
+	 * RX capture debug
+	 * [0:3]   = rst strobes
+	 * [4:11]  = vc for capture
+	 * [12:19] = dt for capture
+	 */
+	csid_hw->debug_info.rst_capture_strobes = (debug_args->csid_rx_capture_debug &
+		CAM_IFE_CSID_DEBUGFS_RST_STROBE_MASK);
+	csid_hw->debug_info.rx_capture_vc = ((debug_args->csid_rx_capture_debug >>
+		CAM_IFE_CSID_DEBUGFS_VC_SHIFT_MASK) & CAM_IFE_CSID_DEBUGFS_VC_DT_MASK);
+	csid_hw->debug_info.rx_capture_dt = ((debug_args->csid_rx_capture_debug >>
+		CAM_IFE_CSID_DEBUGFS_DT_SHIFT_MASK) & CAM_IFE_CSID_DEBUGFS_VC_DT_MASK);
+	csid_hw->debug_info.rx_capture_debug_set = debug_args->rx_capture_debug_set;
+
+	debug_val = csid_hw->debug_info.debug_val;
 	while (debug_val) {
 
 		if (!(debug_val & 0x1)) {
@@ -773,7 +787,7 @@ end:
 
 static int cam_ife_csid_ver2_handle_rx_debug_event(
 	struct cam_ife_csid_ver2_hw *csid_hw,
-	uint32_t bit_pos)
+	uint32_t bit_pos, uint32_t *rst_strobe_val)
 {
 	struct cam_hw_soc_info              *soc_info;
 	struct cam_ife_csid_ver2_reg_info *csid_reg;
@@ -791,73 +805,87 @@ static int cam_ife_csid_ver2_handle_rx_debug_event(
 
 		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 			csi2_reg->captured_long_pkt_0_addr);
-		CAM_INFO_RATE_LIMIT(CAM_ISP,
-			"Csid :%d Long pkt VC: %d DT: %d WC: %d",
+		CAM_INFO(CAM_ISP,
+			"CSID :%d Long pkt VC: %u DT: %u WC: %u",
 			csid_hw->hw_intf->hw_idx,
-			(val & csi2_reg->vc_mask) >> 22,
-			(val & csi2_reg->dt_mask) >> 16,
-			val & csi2_reg->wc_mask);
+			((val & csi2_reg->vc_mask) >> csi2_reg->vc_shift),
+			((val & csi2_reg->dt_mask) >> csi2_reg->dt_shift),
+			((val & csi2_reg->wc_mask) >> csi2_reg->wc_shift));
 
 		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 			csi2_reg->captured_long_pkt_1_addr);
-		CAM_INFO_RATE_LIMIT(CAM_ISP,
-			"Csid :%d Long pkt ECC: %d",
+		CAM_INFO(CAM_ISP,
+			"CSID :%d Long pkt ECC: %u",
 			csid_hw->hw_intf->hw_idx, val);
 
 		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 			csi2_reg->captured_long_pkt_ftr_addr);
-		CAM_INFO_RATE_LIMIT(CAM_ISP,
-			"Csid :%d Long pkt cal CRC: %d expected CRC: %d",
+		CAM_INFO(CAM_ISP,
+			"CSID :%d Long pkt cal CRC: %u expected CRC: %u",
 			csid_hw->hw_intf->hw_idx,
-			val & csi2_reg->calc_crc_mask,
-			val & csi2_reg->expected_crc_mask);
+			((val >> csi2_reg->calc_crc_shift) & csi2_reg->calc_crc_mask),
+			(val & csi2_reg->expected_crc_mask));
+
+		/* Update reset long pkt strobe */
+		*rst_strobe_val |= (1 << csi2_reg->long_pkt_strobe_rst_shift);
 		break;
 
 	case IFE_CSID_VER2_RX_SHORT_PKT_CAPTURED:
 
 		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 			csi2_reg->captured_short_pkt_0_addr);
-		CAM_INFO_RATE_LIMIT(CAM_ISP,
-			"Csid :%d Short pkt VC: %d DT: %d LC: %d",
+		CAM_INFO(CAM_ISP,
+			"CSID :%d Short pkt VC: %u DT: %u LC: %u",
 			csid_hw->hw_intf->hw_idx,
-			(val & csi2_reg->vc_mask) >> 22,
-			(val & csi2_reg->dt_mask) >> 16,
-			val & csi2_reg->wc_mask);
+			((val & csi2_reg->vc_mask) >> csi2_reg->vc_shift),
+			((val & csi2_reg->dt_mask) >> csi2_reg->dt_shift),
+			((val & csi2_reg->wc_mask) >> csi2_reg->wc_shift));
 
 		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 			csi2_reg->captured_short_pkt_1_addr);
-		CAM_INFO_RATE_LIMIT(CAM_ISP,
-			"Csid :%d Short pkt ECC: %d",
+		CAM_INFO(CAM_ISP,
+			"CSID :%d Short pkt ECC: %u",
 			csid_hw->hw_intf->hw_idx, val);
+
+		/* Update reset short pkt strobe */
+		*rst_strobe_val |= (1 << csi2_reg->short_pkt_strobe_rst_shift);
 		break;
 	case IFE_CSID_VER2_RX_CPHY_PKT_HDR_CAPTURED:
 
 		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 			csi2_reg->captured_cphy_pkt_hdr_addr);
-		CAM_INFO_RATE_LIMIT(CAM_ISP,
-			"Csid :%d CPHY pkt VC: %d DT: %d LC: %d",
+		CAM_INFO(CAM_ISP,
+			"CSID :%d CPHY pkt VC: %u DT: %u WC: %u",
 			csid_hw->hw_intf->hw_idx,
-			(val & csi2_reg->vc_mask) >> 22,
-			(val & csi2_reg->dt_mask) >> 16,
-			val & csi2_reg->wc_mask);
+			((val & csi2_reg->vc_mask) >> csi2_reg->vc_shift),
+			((val & csi2_reg->dt_mask) >> csi2_reg->dt_shift),
+			((val & csi2_reg->wc_mask) >> csi2_reg->wc_shift));
+
+		/* Update reset phy pkt strobe */
+		*rst_strobe_val |= (1 << csi2_reg->cphy_pkt_strobe_rst_shift);
 		break;
 	case IFE_CSID_VER2_RX_UNMAPPED_VC_DT:
 		val = cam_io_r_mb(soc_info->reg_map[0].mem_base +
 			csi2_reg->cap_unmap_long_pkt_hdr_0_addr);
 
-		CAM_ERR_RATE_LIMIT(CAM_ISP,
-			"CSID:%d UNMAPPED_VC_DT: VC:%d DT:%d WC:%d not mapped to any csid paths",
-			csid_hw->hw_intf->hw_idx, (val >> 22),
-			((val >> 16) & 0x3F), (val & 0xFFFF));
+		CAM_ERR(CAM_ISP,
+			"CSID:%d UNMAPPED_VC_DT: VC: %u DT: %u WC: %u not mapped to any csid paths",
+			csid_hw->hw_intf->hw_idx,
+			((val & csi2_reg->vc_mask) >> csi2_reg->vc_shift),
+			((val & csi2_reg->dt_mask) >> csi2_reg->dt_shift),
+			((val & csi2_reg->wc_mask) >> csi2_reg->wc_shift));
 
 		csid_hw->counters.error_irq_count++;
 
 		CAM_DBG(CAM_ISP, "CSID[%u] Recoverable Error Count:%u",
 			csid_hw->hw_intf->hw_idx,
 			csid_hw->counters.error_irq_count);
+
+		/* Update reset unmapped long pkt strobe */
+		*rst_strobe_val |= (1 << csi2_reg->unmapped_pkt_strobe_rst_shift);
 		break;
 	default:
-		CAM_INFO_RATE_LIMIT(CAM_ISP,
+		CAM_DBG(CAM_ISP,
 			"CSID[%d] RX_IRQ: %s",
 			csid_hw->hw_intf->hw_idx,
 			csid_reg->rx_irq_desc[bit_pos].desc);
@@ -875,7 +903,8 @@ static int cam_ife_csid_ver2_rx_top_half(
 	const struct cam_ife_csid_csi2_rx_reg_info *csi2_reg;
 	struct cam_ife_csid_ver2_reg_info          *csid_reg;
 	uint32_t                                    irq_status;
-	uint32_t                                    bit_pos = 0;
+	uint32_t                                    rst_strobe_val = 0;
+	uint32_t                                    bit_pos = 0, bit_set = 0;
 
 	csid_hw = th_payload->handler_priv;
 
@@ -891,15 +920,21 @@ static int cam_ife_csid_ver2_rx_top_half(
 	csi2_reg = csid_reg->csi2_reg;
 
 	while (irq_status) {
-
-		if ((BIT(bit_pos)) &
-				csid_hw->debug_info.rx_mask)
+		bit_set = irq_status & 1;
+		if ((bit_set) && (BIT(bit_pos) & csid_hw->debug_info.rx_mask))
 			cam_ife_csid_ver2_handle_rx_debug_event(csid_hw,
-				bit_pos);
+				bit_pos, &rst_strobe_val);
 		bit_pos++;
 		irq_status >>= 1;
 	}
 
+	/* Reset strobes for next set of pkts */
+	if (rst_strobe_val && csid_hw->debug_info.rst_capture_strobes) {
+		struct cam_hw_soc_info *soc_info = &csid_hw->hw_info->soc_info;
+
+		cam_io_w_mb(rst_strobe_val, soc_info->reg_map[0].mem_base +
+			csi2_reg->rst_strobes_addr);
+	}
 	return 0;
 }
 
@@ -1373,16 +1408,15 @@ static int cam_ife_csid_ver2_parse_path_irq_status(
 	}
 
 	if (len)
-		CAM_ERR_RATE_LIMIT(CAM_ISP, "CSID[%d] %s status: 0x%x Errors:%s",
+		CAM_ERR(CAM_ISP, "CSID[%d] %s status: 0x%x Errors:%s",
 			csid_hw->hw_intf->hw_idx, irq_reg_tag[index],
 			irq_status, log_buf);
 
 	status = irq_status & csid_hw->debug_info.path_mask;
 	bit_pos = 0;
 	while (status) {
-
 		if (status & 0x1)
-			CAM_INFO_RATE_LIMIT(CAM_ISP, "CSID[%d] IRQ %s %s ",
+			CAM_INFO(CAM_ISP, "CSID[%d] IRQ %s %s ",
 				csid_hw->hw_intf->hw_idx, irq_reg_tag[index],
 				csid_reg->path_irq_desc[bit_pos].desc);
 
@@ -1391,8 +1425,7 @@ static int cam_ife_csid_ver2_parse_path_irq_status(
 	}
 
 	if (csid_hw->flags.sof_irq_triggered) {
-
-		if (irq_status & IFE_CSID_VER2_PATH_INFO_INPUT_SOF)
+		if ((irq_status & IFE_CSID_VER2_PATH_INFO_INPUT_SOF))
 			csid_hw->counters.irq_debug_cnt++;
 
 		if (csid_hw->counters.irq_debug_cnt >=
@@ -2798,7 +2831,6 @@ static int cam_ife_csid_ver2_init_config_rdi_path(
 		cfg0 |= 1 << path_reg->sof_retiming_dis_shift;
 
 	cam_io_w_mb(cfg0, mem_base + path_reg->cfg0_addr);
-
 	CAM_DBG(CAM_ISP, "CSID[%d] %s cfg0_addr 0x%x",
 		csid_hw->hw_intf->hw_idx, res->res_name, cfg0);
 
@@ -2815,6 +2847,8 @@ static int cam_ife_csid_ver2_init_config_rdi_path(
 				csid_reg->cmn_reg->decode_format1_shift_val);
 
 		cam_io_w_mb(val, mem_base + path_reg->multi_vcdt_cfg0_addr);
+		CAM_DBG(CAM_ISP, "CSID:%u RDI:%u multi_vcdt_cfg0:0x%x",
+			csid_hw->hw_intf->hw_idx, res->res_id, val);
 	}
 
 	/*configure cfg1 addr
@@ -2857,6 +2891,9 @@ static int cam_ife_csid_ver2_init_config_rdi_path(
 
 	cam_io_w_mb(cfg1, mem_base + path_reg->cfg1_addr);
 
+	CAM_DBG(CAM_ISP, "CSID:%u RDI:%u cfg1:0x%x",
+		csid_hw->hw_intf->hw_idx, res->res_id, cfg1);
+
 	/* set frame drop pattern to 0 and period to 1 */
 	cam_io_w_mb(1, mem_base + path_reg->frm_drop_period_addr);
 	cam_io_w_mb(0, mem_base + path_reg->frm_drop_pattern_addr);
@@ -3619,9 +3656,13 @@ static int cam_ife_csid_ver2_rx_capture_config(
 	}
 
 	rx_cfg = &csid_hw->rx_cfg;
-
-	vc  = csid_hw->cid_data[i].vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_0].vc;
-	dt  = csid_hw->cid_data[i].vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_0].dt;
+	if (csid_hw->debug_info.rx_capture_debug_set) {
+		vc = csid_hw->debug_info.rx_capture_vc;
+		dt = csid_hw->debug_info.rx_capture_dt;
+	} else {
+		vc  = csid_hw->cid_data[i].vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_0].vc;
+		dt  = csid_hw->cid_data[i].vc_dt[CAM_IFE_CSID_MULTI_VC_DT_GRP_0].dt;
+	}
 
 	csid_reg = (struct cam_ife_csid_ver2_reg_info *) csid_hw->core_info->csid_reg;
 	soc_info = &csid_hw->hw_info->soc_info;
@@ -5095,7 +5136,7 @@ static int cam_ife_csid_ver2_process_cmd(void *hw_priv,
 		break;
 	case CAM_IFE_CSID_SET_CSID_DEBUG:
 		rc = cam_ife_csid_ver2_set_debug(csid_hw,
-			*((uint32_t *)cmd_args));
+			(struct cam_ife_csid_debug_cfg_args *)cmd_args);
 		break;
 	case CAM_IFE_CSID_SOF_IRQ_DEBUG:
 		rc = cam_ife_csid_ver2_sof_irq_debug(csid_hw, cmd_args);

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite680.h

@@ -432,8 +432,12 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.vc_mask                              = 0x7C00000,
 		.dt_mask                              = 0x3f0000,
 		.wc_mask                              = 0xffff,
+		.vc_shift                             = 0x16,
+		.dt_shift                             = 0x10,
+		.wc_shift                             = 0,
 		.calc_crc_mask                        = 0xffff,
 		.expected_crc_mask                    = 0xffff,
+		.calc_crc_shift                       = 0x10,
 		.ecc_correction_shift_en              = 0,
 		.lane_num_shift                       = 0,
 		.lane_cfg_shift                       = 4,
@@ -445,6 +449,10 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.epd_mode_shift_en                    = 8,
 		.eotp_shift_en                        = 9,
 		.dyn_sensor_switch_shift_en           = 10,
+		.long_pkt_strobe_rst_shift            = 0,
+		.short_pkt_strobe_rst_shift           = 1,
+		.cphy_pkt_strobe_rst_shift            = 2,
+		.unmapped_pkt_strobe_rst_shift        = 3,
 		.fatal_err_mask                       = 0x78000,
 		.part_fatal_err_mask                  = 0x1801800,
 		.non_fatal_err_mask                   = 0x380000,

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_lite780.h

@@ -469,8 +469,12 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.vc_mask                              = 0x7C00000,
 		.dt_mask                              = 0x3f0000,
 		.wc_mask                              = 0xffff,
+		.vc_shift                             = 0x16,
+		.dt_shift                             = 0x10,
+		.wc_shift                             = 0,
 		.calc_crc_mask                        = 0xffff,
 		.expected_crc_mask                    = 0xffff,
+		.calc_crc_shift                       = 0x10,
 		.ecc_correction_shift_en              = 0,
 		.lane_num_shift                       = 0,
 		.lane_cfg_shift                       = 4,
@@ -482,6 +486,10 @@ static struct cam_ife_csid_csi2_rx_reg_info
 		.epd_mode_shift_en                    = 8,
 		.eotp_shift_en                        = 9,
 		.dyn_sensor_switch_shift_en           = 10,
+		.long_pkt_strobe_rst_shift            = 0,
+		.short_pkt_strobe_rst_shift           = 1,
+		.cphy_pkt_strobe_rst_shift            = 2,
+		.unmapped_pkt_strobe_rst_shift        = 3,
 		.fatal_err_mask                       = 0x78000,
 		.part_fatal_err_mask                  = 0x1801800,
 		.non_fatal_err_mask                   = 0x380000,

drivers/cam_isp/isp_hw_mgr/isp_hw/include/cam_ife_csid_hw_intf.h

@@ -460,4 +460,17 @@ struct cam_ife_csid_discard_init_frame_args {
 	struct cam_isp_resource_node     *res;
 };
 
+/*
+ * struct cam_ife_csid_debug_cfg_args:
+ *
+ * @csid_debug: CSID debug val
+ * @csid_rx_capture_debug: CSID rx capture debug val
+ * @rx_capture_debug_set: CSID rx capture debug set;
+ */
+struct cam_ife_csid_debug_cfg_args {
+	uint64_t                          csid_debug;
+	uint32_t                          csid_rx_capture_debug;
+	bool                              rx_capture_debug_set;
+};
+
 #endif /* _CAM_CSID_HW_INTF_H_ */