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@@ -126,6 +126,38 @@ static void _sde_hw_dcwb_ctrl_init(struct sde_mdss_cfg *m,
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}
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}
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+static void _sde_hw_dcwb_pp_ctrl_init(struct sde_mdss_cfg *m,
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+ void __iomem *addr, struct sde_hw_wb *hw_wb)
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+{
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+ int i = 0, dcwb_pp_count = 0;
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+ struct sde_pingpong_cfg *pp_blk = NULL;
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+
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+ if (!hw_wb) {
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+ DRM_ERROR("hw_wb is null\n");
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+ return;
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+ }
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+
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+ for (i = 0; i < m->pingpong_count; i++) {
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+ pp_blk = &m->pingpong[i];
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+ if (test_bit(SDE_PINGPONG_CWB_DITHER, &pp_blk->features)) {
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+ if (dcwb_pp_count < DCWB_MAX - DCWB_0) {
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+ hw_wb->dcwb_pp_hw[dcwb_pp_count].caps = pp_blk;
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+ hw_wb->dcwb_pp_hw[dcwb_pp_count].idx = pp_blk->id;
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+ hw_wb->dcwb_pp_hw[dcwb_pp_count].hw.base_off = addr;
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+ hw_wb->dcwb_pp_hw[dcwb_pp_count].hw.blk_off = pp_blk->base;
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+ hw_wb->dcwb_pp_hw[dcwb_pp_count].hw.length = pp_blk->len;
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+ hw_wb->dcwb_pp_hw[dcwb_pp_count].hw.hwversion = m->hwversion;
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+ hw_wb->dcwb_pp_hw[dcwb_pp_count].hw.log_mask = SDE_DBG_MASK_WB;
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+ } else {
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+ DRM_ERROR("Invalid dcwb pp count %d more than %d",
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+ dcwb_pp_count, DCWB_MAX - DCWB_0);
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+ return;
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+ }
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+ ++dcwb_pp_count;
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+ }
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+ }
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+}
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+
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static void sde_hw_wb_setup_outaddress(struct sde_hw_wb *ctx,
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struct sde_hw_wb_cfg *data)
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{
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@@ -374,6 +406,102 @@ static void sde_hw_wb_program_cwb_ctrl(struct sde_hw_wb *ctx,
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}
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}
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+static void sde_hw_wb_program_cwb_dither_ctrl(struct sde_hw_wb *ctx,
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+ const enum sde_dcwb dcwb_idx, void *cfg, size_t len, bool enable)
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+{
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+ struct sde_hw_pingpong *pp = NULL;
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+ struct sde_hw_blk_reg_map *c = NULL;
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+ struct drm_msm_dither *dither_data = NULL;
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+ enum sde_pingpong pp_id = PINGPONG_MAX;
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+ u32 dither_base = 0, offset = 0, data = 0, idx = 0;
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+ bool found = false;
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+
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+ if (!ctx) {
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+ DRM_ERROR("Invalid pointer ctx is null\n");
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+ return;
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+ }
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+
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+ /* map to pp_id from dcwb id */
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+ if (dcwb_idx == DCWB_0) {
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+ pp_id = PINGPONG_CWB_0;
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+ } else if (dcwb_idx == DCWB_1) {
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+ pp_id = PINGPONG_CWB_1;
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+ } else {
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+ DRM_ERROR("Invalid dcwb_idx %d\n", dcwb_idx);
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+ return;
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+ }
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+
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+ /* find pp blk with pp_id */
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+ for (idx = 0; idx < DCWB_MAX - DCWB_0; ++idx) {
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+ pp = &ctx->dcwb_pp_hw[idx];
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+ if (pp && pp->idx == pp_id) {
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+ found = true;
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+ break;
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+ }
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+ }
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+
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+ if (!found) {
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+ DRM_ERROR("Not found pp id %d\n", pp_id);
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+ return;
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+ }
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+
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+ if (!test_bit(SDE_PINGPONG_CWB_DITHER, &pp->caps->features)) {
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+ DRM_ERROR("Invalid ping-pong cwb config dcwb idx %d pp id %d\n",
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+ dcwb_idx, pp_id);
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+ return;
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+ }
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+
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+ c = &pp->hw;
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+ dither_base = pp->caps->sblk->dither.base;
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+ dither_data = (struct drm_msm_dither *)cfg;
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+ if (!dither_data || !enable) {
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+ SDE_REG_WRITE(c, dither_base, 0);
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+ SDE_DEBUG("cwb dither disabled, dcwb_idx %u pp_id %u\n", dcwb_idx, pp_id);
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+ return;
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+ }
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+
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+ if (len != sizeof(struct drm_msm_dither)) {
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+ SDE_ERROR("input len %zu, expected len %zu\n", len,
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+ sizeof(struct drm_msm_dither));
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+ return;
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+ }
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+
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+ if (dither_data->c0_bitdepth >= DITHER_DEPTH_MAP_INDEX ||
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+ dither_data->c1_bitdepth >= DITHER_DEPTH_MAP_INDEX ||
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+ dither_data->c2_bitdepth >= DITHER_DEPTH_MAP_INDEX ||
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+ dither_data->c3_bitdepth >= DITHER_DEPTH_MAP_INDEX) {
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+ SDE_ERROR("Invalid bitdepth [c0, c1, c2, c3] = [%u, %u, %u, %u]\n",
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+ dither_data->c0_bitdepth, dither_data->c1_bitdepth,
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+ dither_data->c2_bitdepth, dither_data->c3_bitdepth);
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+ return;
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+ }
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+
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+ offset += 4;
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+ data = dither_depth_map[dither_data->c0_bitdepth] & REG_MASK(2);
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+ data |= (dither_depth_map[dither_data->c1_bitdepth] & REG_MASK(2)) << 2;
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+ data |= (dither_depth_map[dither_data->c2_bitdepth] & REG_MASK(2)) << 4;
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+ data |= (dither_depth_map[dither_data->c3_bitdepth] & REG_MASK(2)) << 6;
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+ data |= (dither_data->temporal_en) ? (1 << 8) : 0;
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+ SDE_REG_WRITE(c, dither_base + offset, data);
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+
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+ for (idx = 0; idx < DITHER_MATRIX_SZ - 3; idx += 4) {
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+ offset += 4;
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+ data = (dither_data->matrix[idx] & REG_MASK(4)) |
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+ ((dither_data->matrix[idx + 1] & REG_MASK(4)) << 4) |
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+ ((dither_data->matrix[idx + 2] & REG_MASK(4)) << 8) |
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+ ((dither_data->matrix[idx + 3] & REG_MASK(4)) << 12);
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+ SDE_REG_WRITE(c, dither_base + offset, data);
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+ }
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+
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+ /* Enable dither */
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+ if (test_bit(SDE_PINGPONG_DITHER_LUMA, &pp->caps->features)
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+ && (dither_data->flags & DITHER_LUMA_MODE))
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+ SDE_REG_WRITE(c, dither_base, 0x11);
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+ else
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+ SDE_REG_WRITE(c, dither_base, 1);
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+ SDE_DEBUG("cwb dither enabled, dcwb_idx %u pp_id %u\n", dcwb_idx, pp_id);
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+}
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+
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static void _setup_wb_ops(struct sde_hw_wb_ops *ops,
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unsigned long features)
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{
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@@ -402,6 +530,9 @@ static void _setup_wb_ops(struct sde_hw_wb_ops *ops,
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ops->program_dcwb_ctrl = sde_hw_wb_program_dcwb_ctrl;
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ops->bind_dcwb_pp_blk = sde_hw_wb_bind_dcwb_pp_blk;
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}
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+
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+ if (test_bit(SDE_WB_CWB_DITHER_CTRL, &features))
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+ ops->program_cwb_dither_ctrl = sde_hw_wb_program_cwb_dither_ctrl;
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}
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static struct sde_hw_blk_ops sde_hw_ops = {
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@@ -452,8 +583,10 @@ struct sde_hw_wb *sde_hw_wb_init(enum sde_wb idx,
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if (test_bit(SDE_WB_CWB_CTRL, &cfg->features))
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_sde_hw_cwb_ctrl_init(m, addr, &c->cwb_hw);
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- if (test_bit(SDE_WB_DCWB_CTRL, &cfg->features))
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+ if (test_bit(SDE_WB_DCWB_CTRL, &cfg->features)) {
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_sde_hw_dcwb_ctrl_init(m, addr, &c->dcwb_hw);
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+ _sde_hw_dcwb_pp_ctrl_init(m, addr, c);
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+ }
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return c;
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qctecmdr