qcacmn: Add configurable option for MSI interrupts
Provide multiple combinations to configure the msi interrupts of DP and CE based on the number of MSIs available in the platform. Number of MSIs used for CE and DP can be changed by modifying the MSI assignment table in platform driver. Best possible mask for that MSI is automatically chosen based on predetermined settings. Change-Id: I02b44fb033631d69d97f2d8d2d3f698541d37aad
This commit is contained in:
Nandha Kishore Easwaran
committed by
Madan Koyyalamudi
Madan Koyyalamudi
parent
2359af8cea
commit
718d6aeece
@@ -1203,10 +1203,10 @@ static QDF_STATUS dp_peer_ast_entry_del_by_pdev(struct cdp_soc_t *soc_handle,
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* Return: the index in the grp_mask array with the ring number.
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* Return: the index in the grp_mask array with the ring number.
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* -QDF_STATUS_E_NOENT if no entry is found
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* -QDF_STATUS_E_NOENT if no entry is found
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*/
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*/
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static int dp_srng_find_ring_in_mask(int ring_num, int *grp_mask)
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static int dp_srng_find_ring_in_mask(int ring_num, uint8_t *grp_mask)
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{
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{
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int ext_group_num;
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int ext_group_num;
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int mask = 1 << ring_num;
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uint8_t mask = 1 << ring_num;
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for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
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for (ext_group_num = 0; ext_group_num < WLAN_CFG_INT_NUM_CONTEXTS;
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ext_group_num++) {
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ext_group_num++) {
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@@ -1221,7 +1221,7 @@ static int dp_srng_calculate_msi_group(struct dp_soc *soc,
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enum hal_ring_type ring_type,
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enum hal_ring_type ring_type,
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int ring_num)
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int ring_num)
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{
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{
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int *grp_mask;
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uint8_t *grp_mask;
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switch (ring_type) {
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switch (ring_type) {
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case WBM2SW_RELEASE:
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case WBM2SW_RELEASE:
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@@ -1304,6 +1304,53 @@ static int dp_srng_calculate_msi_group(struct dp_soc *soc,
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return dp_srng_find_ring_in_mask(ring_num, grp_mask);
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return dp_srng_find_ring_in_mask(ring_num, grp_mask);
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}
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}
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/*
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* dp_get_num_msi_available()- API to get number of MSIs available
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* @dp_soc: DP soc Handle
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* @interrupt_mode: Mode of interrupts
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*
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* Return: Number of MSIs available or 0 in case of integrated
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*/
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#if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
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static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
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{
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return 0;
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}
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#else
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/*
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* dp_get_num_msi_available()- API to get number of MSIs available
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* @dp_soc: DP soc Handle
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* @interrupt_mode: Mode of interrupts
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*
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* Return: Number of MSIs available or 0 in case of integrated
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*/
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static int dp_get_num_msi_available(struct dp_soc *soc, int interrupt_mode)
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{
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int msi_data_count;
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int msi_data_start;
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int msi_irq_start;
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int ret;
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if (interrupt_mode == DP_INTR_INTEGRATED) {
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return 0;
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} else if (interrupt_mode == DP_INTR_MSI || interrupt_mode ==
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DP_INTR_POLL) {
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ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
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&msi_data_count,
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&msi_data_start,
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&msi_irq_start);
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if (ret) {
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qdf_err("Unable to get DP MSI assignment %d",
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interrupt_mode);
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return -EINVAL;
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}
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return msi_data_count;
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}
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qdf_err("Interrupt mode invalid %d", interrupt_mode);
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return -EINVAL;
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}
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#endif
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/**
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/**
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* dp_is_msi_group_number_invalid() - check msi_group_number valid or not
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* dp_is_msi_group_number_invalid() - check msi_group_number valid or not
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* @msi_group_number: MSI group number.
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* @msi_group_number: MSI group number.
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@@ -3470,7 +3517,7 @@ static uint8_t dp_soc_ring_if_nss_offloaded(struct dp_soc *soc, enum hal_ring_ty
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static void dp_soc_disable_unused_mac_intr_mask(struct dp_soc *soc,
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static void dp_soc_disable_unused_mac_intr_mask(struct dp_soc *soc,
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int mac_num)
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int mac_num)
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{
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{
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int *grp_mask = NULL;
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uint8_t *grp_mask = NULL;
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int group_number;
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int group_number;
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grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
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grp_mask = &soc->wlan_cfg_ctx->int_host2rxdma_ring_mask[0];
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@@ -3503,7 +3550,7 @@ static void dp_soc_disable_unused_mac_intr_mask(struct dp_soc *soc,
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static void dp_soc_reset_intr_mask(struct dp_soc *soc)
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static void dp_soc_reset_intr_mask(struct dp_soc *soc)
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{
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{
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uint8_t j;
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uint8_t j;
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int *grp_mask = NULL;
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uint8_t *grp_mask = NULL;
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int group_number, mask, num_ring;
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int group_number, mask, num_ring;
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/* number of tx ring */
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/* number of tx ring */
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@@ -12906,6 +12953,7 @@ void *dp_soc_init(struct dp_soc *soc, HTC_HANDLE htc_handle,
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bool is_monitor_mode = false;
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bool is_monitor_mode = false;
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struct hal_reo_params reo_params;
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struct hal_reo_params reo_params;
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uint8_t i;
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uint8_t i;
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int num_dp_msi;
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wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
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wlan_minidump_log(soc, sizeof(*soc), soc->ctrl_psoc,
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WLAN_MD_DP_SOC, "dp_soc");
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WLAN_MD_DP_SOC, "dp_soc");
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@@ -12941,8 +12989,13 @@ void *dp_soc_init(struct dp_soc *soc, HTC_HANDLE htc_handle,
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QDF_GLOBAL_MONITOR_MODE)
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QDF_GLOBAL_MONITOR_MODE)
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is_monitor_mode = true;
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is_monitor_mode = true;
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wlan_cfg_fill_interrupt_mask(soc->wlan_cfg_ctx, soc->intr_mode,
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num_dp_msi = dp_get_num_msi_available(soc, soc->intr_mode);
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is_monitor_mode);
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if (num_dp_msi < 0) {
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dp_init_err("%pK: dp_interrupt assignment failed", soc);
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goto fail3;
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}
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wlan_cfg_fill_interrupt_mask(soc->wlan_cfg_ctx, num_dp_msi,
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soc->intr_mode, is_monitor_mode);
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/* initialize WBM_IDLE_LINK ring */
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/* initialize WBM_IDLE_LINK ring */
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if (dp_hw_link_desc_ring_init(soc)) {
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if (dp_hw_link_desc_ring_init(soc)) {
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@@ -103,6 +103,195 @@ static void hif_target_access_log_dump(void)
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}
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}
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#endif
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#endif
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/*
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* This structure contains the interrupt index for each Copy engine
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* for various number of MSIs available in the system.
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*/
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static struct ce_int_assignment ce_int_context[NUM_CE_CONTEXT] = {
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/* Default configuration */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(6),
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CE_INTERRUPT_IDX(7),
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CE_INTERRUPT_IDX(8),
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CE_INTERRUPT_IDX(9),
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CE_INTERRUPT_IDX(10),
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CE_INTERRUPT_IDX(11),
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} },
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/* Interrupt assignment for 1 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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} },
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/* Interrupt assignment for 2 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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} },
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/* Interrupt assignment for 3 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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} },
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/* Interrupt assignment for 4 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 5 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 6 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 7 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(6),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 8 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(6),
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CE_INTERRUPT_IDX(7),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 9 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(6),
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CE_INTERRUPT_IDX(7),
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CE_INTERRUPT_IDX(8),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 10 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(6),
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CE_INTERRUPT_IDX(7),
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CE_INTERRUPT_IDX(8),
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CE_INTERRUPT_IDX(9),
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CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 11 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(6),
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CE_INTERRUPT_IDX(7),
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CE_INTERRUPT_IDX(8),
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CE_INTERRUPT_IDX(9),
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CE_INTERRUPT_IDX(10),
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CE_INTERRUPT_IDX(0)
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} },
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/* Interrupt assignment for 12 MSI combination */
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{{ CE_INTERRUPT_IDX(0),
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CE_INTERRUPT_IDX(1),
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CE_INTERRUPT_IDX(2),
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CE_INTERRUPT_IDX(3),
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CE_INTERRUPT_IDX(4),
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CE_INTERRUPT_IDX(5),
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CE_INTERRUPT_IDX(6),
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CE_INTERRUPT_IDX(7),
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CE_INTERRUPT_IDX(8),
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CE_INTERRUPT_IDX(9),
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CE_INTERRUPT_IDX(10),
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CE_INTERRUPT_IDX(11)
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} },
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};
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void hif_trigger_dump(struct hif_opaque_softc *hif_ctx,
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void hif_trigger_dump(struct hif_opaque_softc *hif_ctx,
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uint8_t cmd_id, bool start)
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uint8_t cmd_id, bool start)
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@@ -3376,11 +3565,20 @@ void hif_ce_prepare_config(struct hif_softc *scn)
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struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
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struct hif_opaque_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
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struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl);
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struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl);
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struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
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struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
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int ret;
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int msi_data_count = 0;
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int msi_data_start = 0;
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int msi_irq_start = 0;
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hif_ce_service_init();
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hif_ce_service_init();
|
||||||
hif_state->ce_services = ce_services_attach(scn);
|
hif_state->ce_services = ce_services_attach(scn);
|
||||||
|
|
||||||
|
ret = pld_get_user_msi_assignment(scn->qdf_dev->dev, "CE",
|
||||||
|
&msi_data_count, &msi_data_start,
|
||||||
|
&msi_irq_start);
|
||||||
|
|
||||||
scn->ce_count = HOST_CE_COUNT;
|
scn->ce_count = HOST_CE_COUNT;
|
||||||
|
scn->int_assignment = &ce_int_context[msi_data_count];
|
||||||
/* if epping is enabled we need to use the epping configuration. */
|
/* if epping is enabled we need to use the epping configuration. */
|
||||||
if (QDF_IS_EPPING_ENABLED(mode)) {
|
if (QDF_IS_EPPING_ENABLED(mode)) {
|
||||||
hif_ce_prepare_epping_config(scn, hif_state);
|
hif_ce_prepare_epping_config(scn, hif_state);
|
||||||
|
|||||||
@@ -1,5 +1,5 @@
|
|||||||
/*
|
/*
|
||||||
* Copyright (c) 2016-2020 The Linux Foundation. All rights reserved.
|
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
|
||||||
*
|
*
|
||||||
* Permission to use, copy, modify, and/or distribute this software for
|
* Permission to use, copy, modify, and/or distribute this software for
|
||||||
* any purpose with or without fee is hereby granted, provided that the
|
* any purpose with or without fee is hereby granted, provided that the
|
||||||
@@ -719,6 +719,7 @@ static void ce_srng_msi_ring_params_setup(struct hif_softc *scn, uint32_t ce_id,
|
|||||||
uint32_t msi_data_count;
|
uint32_t msi_data_count;
|
||||||
uint32_t msi_irq_start;
|
uint32_t msi_irq_start;
|
||||||
int ret;
|
int ret;
|
||||||
|
int irq_id;
|
||||||
|
|
||||||
ret = pld_get_user_msi_assignment(scn->qdf_dev->dev, "CE",
|
ret = pld_get_user_msi_assignment(scn->qdf_dev->dev, "CE",
|
||||||
&msi_data_count, &msi_data_start,
|
&msi_data_count, &msi_data_start,
|
||||||
@@ -728,15 +729,16 @@ static void ce_srng_msi_ring_params_setup(struct hif_softc *scn, uint32_t ce_id,
|
|||||||
if (ret)
|
if (ret)
|
||||||
return;
|
return;
|
||||||
|
|
||||||
|
irq_id = scn->int_assignment->msi_idx[ce_id];
|
||||||
pld_get_msi_address(scn->qdf_dev->dev, &addr_low, &addr_high);
|
pld_get_msi_address(scn->qdf_dev->dev, &addr_low, &addr_high);
|
||||||
|
|
||||||
ring_params->msi_addr = addr_low;
|
ring_params->msi_addr = addr_low;
|
||||||
ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
|
ring_params->msi_addr |= (qdf_dma_addr_t)(((uint64_t)addr_high) << 32);
|
||||||
ring_params->msi_data = (ce_id % msi_data_count) + msi_data_start;
|
ring_params->msi_data = irq_id + msi_data_start;
|
||||||
ring_params->flags |= HAL_SRNG_MSI_INTR;
|
ring_params->flags |= HAL_SRNG_MSI_INTR;
|
||||||
|
|
||||||
hif_debug("ce_id %d, msi_addr %pK, msi_data %d", ce_id,
|
hif_debug("ce_id %d irq_id %d, msi_addr %pK, msi_data %d", ce_id,
|
||||||
(void *)ring_params->msi_addr, ring_params->msi_data);
|
irq_id, (void *)ring_params->msi_addr, ring_params->msi_data);
|
||||||
}
|
}
|
||||||
|
|
||||||
static void ce_srng_src_ring_setup(struct hif_softc *scn, uint32_t ce_id,
|
static void ce_srng_src_ring_setup(struct hif_softc *scn, uint32_t ce_id,
|
||||||
|
|||||||
@@ -143,6 +143,16 @@
|
|||||||
#define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn)
|
#define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn)
|
||||||
#define GET_HIF_OPAQUE_HDL(scn) ((struct hif_opaque_softc *)scn)
|
#define GET_HIF_OPAQUE_HDL(scn) ((struct hif_opaque_softc *)scn)
|
||||||
|
|
||||||
|
#define NUM_CE_AVAILABLE 12
|
||||||
|
/* Add 1 here to store default configuration in index 0 */
|
||||||
|
#define NUM_CE_CONTEXT (NUM_CE_AVAILABLE + 1)
|
||||||
|
|
||||||
|
#define CE_INTERRUPT_IDX(x) x
|
||||||
|
|
||||||
|
struct ce_int_assignment {
|
||||||
|
uint8_t msi_idx[NUM_CE_AVAILABLE];
|
||||||
|
};
|
||||||
|
|
||||||
struct hif_ce_stats {
|
struct hif_ce_stats {
|
||||||
int hif_pipe_no_resrc_count;
|
int hif_pipe_no_resrc_count;
|
||||||
int ce_ring_delta_fail_count;
|
int ce_ring_delta_fail_count;
|
||||||
@@ -220,6 +230,7 @@ struct hif_softc {
|
|||||||
uint32_t ce_irq_summary;
|
uint32_t ce_irq_summary;
|
||||||
/* No of copy engines supported */
|
/* No of copy engines supported */
|
||||||
unsigned int ce_count;
|
unsigned int ce_count;
|
||||||
|
struct ce_int_assignment *int_assignment;
|
||||||
atomic_t active_tasklet_cnt;
|
atomic_t active_tasklet_cnt;
|
||||||
atomic_t active_grp_tasklet_cnt;
|
atomic_t active_grp_tasklet_cnt;
|
||||||
atomic_t link_suspended;
|
atomic_t link_suspended;
|
||||||
|
|||||||
@@ -2058,7 +2058,7 @@ end:
|
|||||||
static int hif_ce_srng_msi_free_irq(struct hif_softc *scn)
|
static int hif_ce_srng_msi_free_irq(struct hif_softc *scn)
|
||||||
{
|
{
|
||||||
int ret;
|
int ret;
|
||||||
int ce_id, irq;
|
int ce_id, irq, irq_id;
|
||||||
uint32_t msi_data_start;
|
uint32_t msi_data_start;
|
||||||
uint32_t msi_data_count;
|
uint32_t msi_data_count;
|
||||||
uint32_t msi_irq_start;
|
uint32_t msi_irq_start;
|
||||||
@@ -2083,13 +2083,14 @@ static int hif_ce_srng_msi_free_irq(struct hif_softc *scn)
|
|||||||
if (!ce_sc->tasklets[ce_id].inited)
|
if (!ce_sc->tasklets[ce_id].inited)
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
msi_data = (ce_id % msi_data_count) + msi_irq_start;
|
irq_id = scn->int_assignment->msi_idx[ce_id];
|
||||||
|
msi_data = irq_id + msi_irq_start;
|
||||||
irq = pld_get_msi_irq(scn->qdf_dev->dev, msi_data);
|
irq = pld_get_msi_irq(scn->qdf_dev->dev, msi_data);
|
||||||
|
|
||||||
hif_pci_ce_irq_remove_affinity_hint(irq);
|
hif_pci_ce_irq_remove_affinity_hint(irq);
|
||||||
|
|
||||||
hif_debug("%s: (ce_id %d, msi_data %d, irq %d)", __func__,
|
hif_debug("%s: (ce_id %d, irq_id %d, msi_data %d, irq %d)",
|
||||||
ce_id, msi_data, irq);
|
__func__, irq_id, ce_id, msi_data, irq);
|
||||||
|
|
||||||
pfrm_free_irq(scn->qdf_dev->dev, irq, &ce_sc->tasklets[ce_id]);
|
pfrm_free_irq(scn->qdf_dev->dev, irq, &ce_sc->tasklets[ce_id]);
|
||||||
}
|
}
|
||||||
@@ -2875,6 +2876,7 @@ int hif_ce_msi_configure_irq_by_ceid(struct hif_softc *scn, int ce_id)
|
|||||||
uint32_t msi_data_start;
|
uint32_t msi_data_start;
|
||||||
uint32_t msi_data_count;
|
uint32_t msi_data_count;
|
||||||
unsigned int msi_data;
|
unsigned int msi_data;
|
||||||
|
int irq_id;
|
||||||
uint32_t msi_irq_start;
|
uint32_t msi_irq_start;
|
||||||
struct HIF_CE_state *ce_sc = HIF_GET_CE_STATE(scn);
|
struct HIF_CE_state *ce_sc = HIF_GET_CE_STATE(scn);
|
||||||
struct hif_pci_softc *pci_sc = HIF_GET_PCI_SOFTC(scn);
|
struct hif_pci_softc *pci_sc = HIF_GET_PCI_SOFTC(scn);
|
||||||
@@ -2888,15 +2890,21 @@ int hif_ce_msi_configure_irq_by_ceid(struct hif_softc *scn, int ce_id)
|
|||||||
&msi_data_count, &msi_data_start,
|
&msi_data_count, &msi_data_start,
|
||||||
&msi_irq_start);
|
&msi_irq_start);
|
||||||
|
|
||||||
|
if (ret) {
|
||||||
|
hif_err("Failed to get CE msi config");
|
||||||
|
return -EINVAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
irq_id = scn->int_assignment->msi_idx[ce_id];
|
||||||
/* needs to match the ce_id -> irq data mapping
|
/* needs to match the ce_id -> irq data mapping
|
||||||
* used in the srng parameter configuration
|
* used in the srng parameter configuration
|
||||||
*/
|
*/
|
||||||
pci_slot = hif_get_pci_slot(scn);
|
pci_slot = hif_get_pci_slot(scn);
|
||||||
msi_data = (ce_id % msi_data_count) + msi_irq_start;
|
msi_data = irq_id + msi_irq_start;
|
||||||
irq = pld_get_msi_irq(scn->qdf_dev->dev, msi_data);
|
irq = pld_get_msi_irq(scn->qdf_dev->dev, msi_data);
|
||||||
hif_debug("%s: (ce_id %d, msi_data %d, irq %d tasklet %pK)",
|
hif_debug("%s: (ce_id %d, irq_id %d, msi_data %d, irq %d tasklet %pK)",
|
||||||
__func__, ce_id, msi_data, irq,
|
__func__, ce_id, irq_id, msi_data, irq,
|
||||||
&ce_sc->tasklets[ce_id]);
|
&ce_sc->tasklets[ce_id]);
|
||||||
|
|
||||||
/* implies the ce is also initialized */
|
/* implies the ce is also initialized */
|
||||||
if (!ce_sc->tasklets[ce_id].inited)
|
if (!ce_sc->tasklets[ce_id].inited)
|
||||||
|
|||||||
@@ -91,235 +91,661 @@
|
|||||||
#define WLAN_CFG_HOST2RXDMA_RING_MASK_2 0x4
|
#define WLAN_CFG_HOST2RXDMA_RING_MASK_2 0x4
|
||||||
#define WLAN_CFG_HOST2RXDMA_RING_MASK_3 0x0
|
#define WLAN_CFG_HOST2RXDMA_RING_MASK_3 0x0
|
||||||
|
|
||||||
|
struct dp_int_mask_assignment {
|
||||||
|
uint8_t tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t host2rxdma_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t rxdma2host_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
uint8_t reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
|
};
|
||||||
|
|
||||||
#if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
|
#if defined(WLAN_MAX_PDEVS) && (WLAN_MAX_PDEVS == 1)
|
||||||
static const int tx_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
#define NUM_INTERRUPT_COMBINATIONS 1
|
||||||
WLAN_CFG_TX_RING_MASK_0, 0, 0, 0, 0, 0, 0};
|
/*
|
||||||
|
* This structure contains the best possible mask assignment for a given
|
||||||
|
* number of MSIs available in the system.
|
||||||
|
*/
|
||||||
|
static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIONS] = {
|
||||||
|
/*Default configuration */
|
||||||
|
{
|
||||||
|
/* tx ring masks */
|
||||||
|
{ WLAN_CFG_TX_RING_MASK_0,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx ring masks */
|
||||||
#ifndef IPA_OFFLOAD
|
#ifndef IPA_OFFLOAD
|
||||||
static const int rx_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ 0,
|
||||||
0, WLAN_CFG_RX_RING_MASK_0, WLAN_CFG_RX_RING_MASK_1, WLAN_CFG_RX_RING_MASK_2, WLAN_CFG_RX_RING_MASK_3, 0, 0};
|
WLAN_CFG_RX_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0},
|
||||||
#else
|
#else
|
||||||
static const int rx_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ 0,
|
||||||
0, WLAN_CFG_RX_RING_MASK_0, WLAN_CFG_RX_RING_MASK_1, WLAN_CFG_RX_RING_MASK_2, 0, 0, 0};
|
WLAN_CFG_RX_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
|
0, 0, 0},
|
||||||
#endif
|
#endif
|
||||||
|
/* rx mon ring masks */
|
||||||
static const int rx_mon_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ 0,
|
||||||
0, WLAN_CFG_RX_MON_RING_MASK_0, WLAN_CFG_RX_MON_RING_MASK_1, 0, 0, 0, 0};
|
WLAN_CFG_RX_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1,
|
||||||
static const int host2rxdma_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
0, 0, 0, 0},
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
/* host2rxdma ring masks */
|
||||||
|
{ 0, 0, 0, 0, 0, 0, 0},
|
||||||
static const int rxdma2host_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
/* rxdma2host ring masks */
|
||||||
0, 0, 0, 0, 0, WLAN_CFG_RXDMA2HOST_RING_MASK_0, WLAN_CFG_RXDMA2HOST_RING_MASK_1};
|
{ 0, 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
||||||
static const int host2rxdma_mon_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1 },
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
/* host2rxdma mon ring masks */
|
||||||
|
{ 0, 0, 0, 0, 0, 0, 0},
|
||||||
static const int rxdma2host_mon_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
/* rxdma2host mon ring masks */
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
{ 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
static const int rx_err_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, WLAN_CFG_RX_ERR_RING_MASK_0};
|
WLAN_CFG_RX_ERR_RING_MASK_0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
static const int rx_wbm_rel_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, WLAN_CFG_RX_WBM_REL_RING_MASK_0};
|
WLAN_CFG_RX_WBM_REL_RING_MASK_0},
|
||||||
|
/* reo status ring masks */
|
||||||
static const int reo_status_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ 0, 0, 0, 0, 0, 0,
|
||||||
0, 0, 0, 0, 0, 0, WLAN_CFG_REO_STATUS_RING_MASK_0};
|
WLAN_CFG_REO_STATUS_RING_MASK_0},
|
||||||
|
},
|
||||||
static const int tx_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
};
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int rx_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int rx_mon_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int host2rxdma_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int rxdma2host_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int host2rxdma_mon_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int rxdma2host_mon_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int rx_err_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int rx_wbm_rel_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
static const int reo_status_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
|
||||||
0, 0, 0, 0, 0, 0, 0};
|
|
||||||
|
|
||||||
#else
|
#else
|
||||||
|
/* Integrated configuration + 8 possible MSI configurations */
|
||||||
static const int tx_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
#define NUM_INTERRUPT_COMBINATIONS 9
|
||||||
WLAN_CFG_TX_RING_MASK_0,
|
/*
|
||||||
WLAN_CFG_TX_RING_MASK_1,
|
* This structure contains the best possible mask assignment for a given
|
||||||
WLAN_CFG_TX_RING_MASK_2,
|
* number of MSIs available in the system.
|
||||||
WLAN_CFG_TX_RING_MASK_3};
|
*/
|
||||||
|
static struct dp_int_mask_assignment dp_mask_assignment[NUM_INTERRUPT_COMBINATIONS] = {
|
||||||
static const int rx_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
/* Interrupt assignment for integrated configuration */
|
||||||
0,
|
{
|
||||||
0,
|
/* tx ring masks */
|
||||||
0,
|
{ WLAN_CFG_TX_RING_MASK_0,
|
||||||
0,
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
WLAN_CFG_RX_RING_MASK_0,
|
WLAN_CFG_TX_RING_MASK_2,
|
||||||
WLAN_CFG_RX_RING_MASK_1,
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
WLAN_CFG_RX_RING_MASK_2,
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_RX_RING_MASK_3};
|
/* rx ring masks */
|
||||||
|
{ 0, 0, 0, 0, 0, 0, 0,
|
||||||
static const int rx_mon_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_RX_RING_MASK_0,
|
||||||
0,
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
0,
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
0,
|
WLAN_CFG_RX_RING_MASK_3},
|
||||||
WLAN_CFG_RX_MON_RING_MASK_0,
|
/* rx mon ring masks */
|
||||||
WLAN_CFG_RX_MON_RING_MASK_1,
|
{ 0, 0, 0, 0,
|
||||||
WLAN_CFG_RX_MON_RING_MASK_2};
|
WLAN_CFG_RX_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1,
|
||||||
static const int host2rxdma_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
0,
|
0, 0, 0, 0},
|
||||||
0,
|
/* host2rxdma ring masks */
|
||||||
0,
|
{ WLAN_CFG_HOST2RXDMA_RING_MASK_0,
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_0,
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_3};
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
static const int rxdma2host_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
/* host2rxdma mon ring masks */
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
|
{ 0, 0, 0, 0,
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_3};
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
||||||
static const int host2rxdma_mon_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
0,
|
0, 0, 0, 0},
|
||||||
0,
|
/* rxdma2host mon ring masks */
|
||||||
0,
|
{ 0, 0, 0, 0,
|
||||||
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
|
||||||
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
||||||
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2};
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0},
|
||||||
static const int rxdma2host_mon_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
/* rx err ring masks */
|
||||||
0,
|
{ WLAN_CFG_RX_ERR_RING_MASK_0,
|
||||||
0,
|
WLAN_CFG_RX_ERR_RING_MASK_1,
|
||||||
0,
|
WLAN_CFG_RX_ERR_RING_MASK_2,
|
||||||
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2};
|
/* rx wbm rel ring masks */
|
||||||
|
{ WLAN_CFG_RX_WBM_REL_RING_MASK_0,
|
||||||
static const int rx_err_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
||||||
0,
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
|
||||||
0,
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
0,
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_0,
|
/* reo status ring masks */
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_1,
|
{ WLAN_CFG_REO_STATUS_RING_MASK_0,
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_2,
|
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_3};
|
WLAN_CFG_REO_STATUS_RING_MASK_2,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
static const int rx_wbm_rel_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
0,
|
},
|
||||||
0,
|
/* Interrupt assignment for 1 MSI combination */
|
||||||
0,
|
{
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_0,
|
/* tx ring masks */
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
{ WLAN_CFG_TX_RING_MASK_0 |
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
|
WLAN_CFG_TX_RING_MASK_1 |
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_3};
|
WLAN_CFG_TX_RING_MASK_2 |
|
||||||
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
static const int reo_status_ring_mask_msi[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
0,
|
/* rx ring masks */
|
||||||
0,
|
{ WLAN_CFG_RX_RING_MASK_0 |
|
||||||
0,
|
WLAN_CFG_RX_RING_MASK_1 |
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_0,
|
WLAN_CFG_RX_RING_MASK_2 |
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_2,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_3};
|
/* rx mon ring masks */
|
||||||
|
{ WLAN_CFG_RX_MON_RING_MASK_0 |
|
||||||
static const int tx_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_RX_MON_RING_MASK_1 |
|
||||||
WLAN_CFG_TX_RING_MASK_0,
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
WLAN_CFG_TX_RING_MASK_1,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_TX_RING_MASK_2,
|
/* host2rxdma ring masks */
|
||||||
WLAN_CFG_TX_RING_MASK_3};
|
{ WLAN_CFG_HOST2RXDMA_RING_MASK_0 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1 |
|
||||||
static const int rx_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2 |
|
||||||
0,
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
0,
|
/* rxdma2host ring masks */
|
||||||
0,
|
{ WLAN_CFG_RXDMA2HOST_RING_MASK_0 |
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1 |
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2 |
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
WLAN_CFG_RX_RING_MASK_0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_RX_RING_MASK_1,
|
/* host2rxdma mon ring masks */
|
||||||
WLAN_CFG_RX_RING_MASK_2,
|
{ WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0 |
|
||||||
WLAN_CFG_RX_RING_MASK_3};
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
static const int rx_mon_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
0,
|
/* rxdma2host mon ring masks */
|
||||||
0,
|
{ WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0 |
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1 |
|
||||||
0,
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
WLAN_CFG_RX_MON_RING_MASK_0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_RX_MON_RING_MASK_1,
|
/* rx err ring masks */
|
||||||
WLAN_CFG_RX_MON_RING_MASK_2};
|
{ WLAN_CFG_RX_ERR_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1 |
|
||||||
static const int host2rxdma_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_RX_ERR_RING_MASK_2 |
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_0,
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
|
/* rx wbm rel ring masks */
|
||||||
WLAN_CFG_HOST2RXDMA_RING_MASK_3};
|
{ WLAN_CFG_RX_WBM_REL_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1 |
|
||||||
static const int rxdma2host_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2 |
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
|
/* reo status ring masks */
|
||||||
WLAN_CFG_RXDMA2HOST_RING_MASK_3};
|
{ WLAN_CFG_REO_STATUS_RING_MASK_0 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1 |
|
||||||
static const int host2rxdma_mon_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_REO_STATUS_RING_MASK_2 |
|
||||||
0,
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
0,
|
},
|
||||||
0,
|
/* Interrupt assignment for 2 MSI combination */
|
||||||
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
|
{
|
||||||
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
/* tx ring masks */
|
||||||
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2};
|
{ WLAN_CFG_TX_RING_MASK_0 |
|
||||||
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
static const int rxdma2host_mon_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
WLAN_CFG_TX_RING_MASK_2 |
|
||||||
0,
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
0,
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
0,
|
/* rx ring masks */
|
||||||
0,
|
{ WLAN_CFG_RX_RING_MASK_0 |
|
||||||
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
WLAN_CFG_RX_RING_MASK_2 |
|
||||||
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2};
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
static const int rx_err_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
/* rx mon ring masks */
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_0,
|
{ WLAN_CFG_RX_MON_RING_MASK_0 |
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_1,
|
WLAN_CFG_RX_MON_RING_MASK_1,
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_2,
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
WLAN_CFG_RX_ERR_RING_MASK_3};
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma ring masks */
|
||||||
static const int rx_wbm_rel_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ WLAN_CFG_HOST2RXDMA_RING_MASK_0 |
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_0,
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2 |
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
WLAN_CFG_RX_WBM_REL_RING_MASK_3};
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
static const int reo_status_ring_mask_integrated[WLAN_CFG_INT_NUM_CONTEXTS] = {
|
{ WLAN_CFG_RXDMA2HOST_RING_MASK_0 |
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_0,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2 |
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_2,
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
WLAN_CFG_REO_STATUS_RING_MASK_3};
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
#endif /* MAX_PDEV_CNT == 1 */
|
/* host2rxdma mon ring masks */
|
||||||
|
{ WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host mon ring masks */
|
||||||
|
{ WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
|
{ WLAN_CFG_RX_ERR_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
|
{ WLAN_CFG_RX_WBM_REL_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* reo status ring masks */
|
||||||
|
{ WLAN_CFG_REO_STATUS_RING_MASK_0 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_2 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
},
|
||||||
|
/* Interrupt assignment for 3 MSI combination */
|
||||||
|
{
|
||||||
|
/* tx ring masks */
|
||||||
|
{ WLAN_CFG_TX_RING_MASK_0 |
|
||||||
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
|
WLAN_CFG_TX_RING_MASK_2 |
|
||||||
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx ring masks */
|
||||||
|
{ WLAN_CFG_RX_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx mon ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_0 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma mon ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host mon ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* reo status ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_0 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_2 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
},
|
||||||
|
/* Interrupt assignment for 4 MSI combination */
|
||||||
|
{
|
||||||
|
/* tx ring masks */
|
||||||
|
{ WLAN_CFG_TX_RING_MASK_0,
|
||||||
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
|
WLAN_CFG_TX_RING_MASK_2,
|
||||||
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx ring masks */
|
||||||
|
{ WLAN_CFG_RX_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx mon ring masks */
|
||||||
|
{ WLAN_CFG_RX_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma ring masks */
|
||||||
|
{ WLAN_CFG_HOST2RXDMA_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
|
{ WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma mon ring masks */
|
||||||
|
{ WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host mon ring masks */
|
||||||
|
{ WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
|
{ WLAN_CFG_RX_ERR_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
|
{ WLAN_CFG_RX_WBM_REL_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* reo status ring masks */
|
||||||
|
{ WLAN_CFG_REO_STATUS_RING_MASK_0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_2,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
},
|
||||||
|
/* Interrupt assignment for 5 MSI combination */
|
||||||
|
{
|
||||||
|
/* tx ring masks */
|
||||||
|
{ WLAN_CFG_TX_RING_MASK_0,
|
||||||
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
|
WLAN_CFG_TX_RING_MASK_2,
|
||||||
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx ring masks */
|
||||||
|
{ WLAN_CFG_RX_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx mon ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_0 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma mon ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1 |
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host mon ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_0 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2 |
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
/* reo status ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_0 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_2 |
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0},
|
||||||
|
},
|
||||||
|
/* Interrupt assignment for 6 MSI combination */
|
||||||
|
{
|
||||||
|
/* tx ring masks */
|
||||||
|
{ WLAN_CFG_TX_RING_MASK_0,
|
||||||
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
|
WLAN_CFG_TX_RING_MASK_2,
|
||||||
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx ring masks */
|
||||||
|
{ 0, 0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0},
|
||||||
|
/* rx mon ring masks */
|
||||||
|
{ WLAN_CFG_RX_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma ring masks */
|
||||||
|
{ WLAN_CFG_HOST2RXDMA_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
|
{ WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma mon ring masks */
|
||||||
|
{ WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host mon ring masks */
|
||||||
|
{ WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
|
{ WLAN_CFG_RX_ERR_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
|
{ WLAN_CFG_RX_WBM_REL_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* reo status ring masks */
|
||||||
|
{ WLAN_CFG_REO_STATUS_RING_MASK_0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_2,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
},
|
||||||
|
/* Interrupt assignment for 7 MSI combination */
|
||||||
|
{
|
||||||
|
/* tx ring masks */
|
||||||
|
{ WLAN_CFG_TX_RING_MASK_0,
|
||||||
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
|
WLAN_CFG_TX_RING_MASK_2,
|
||||||
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0, 0},
|
||||||
|
/* rx mon ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* host2rxdma mon ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host mon ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* reo status ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_2,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
},
|
||||||
|
/* Interrupt assignment for 8 MSI combination */
|
||||||
|
{
|
||||||
|
/* tx ring masks */
|
||||||
|
{ WLAN_CFG_TX_RING_MASK_0,
|
||||||
|
WLAN_CFG_TX_RING_MASK_1,
|
||||||
|
WLAN_CFG_TX_RING_MASK_2,
|
||||||
|
WLAN_CFG_TX_RING_MASK_3,
|
||||||
|
0, 0, 0, 0, 0, 0, 0},
|
||||||
|
/* rx ring masks */
|
||||||
|
{ 0, 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_RING_MASK_3,
|
||||||
|
0, 0, 0},
|
||||||
|
/* rx mon ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0},
|
||||||
|
/* host2rxdma ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_2,
|
||||||
|
WLAN_CFG_HOST2RXDMA_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* rxdma2host ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_2,
|
||||||
|
WLAN_CFG_RXDMA2HOST_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* host2rxdma mon ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_HOST2RXDMA_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0},
|
||||||
|
/* rxdma2host mon ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_0,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_1,
|
||||||
|
WLAN_CFG_RXDMA2HOST_MON_RING_MASK_2,
|
||||||
|
0, 0, 0, 0, 0},
|
||||||
|
/* rx err ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_ERR_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* rx wbm rel ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_0,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_1,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_2,
|
||||||
|
WLAN_CFG_RX_WBM_REL_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
/* reo status ring masks */
|
||||||
|
{ 0, 0, 0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_0,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_1,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_2,
|
||||||
|
WLAN_CFG_REO_STATUS_RING_MASK_3,
|
||||||
|
0, 0, 0, 0},
|
||||||
|
},
|
||||||
|
};
|
||||||
|
#endif
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* g_wlan_srng_cfg[] - Per ring_type specific configuration
|
* g_wlan_srng_cfg[] - Per ring_type specific configuration
|
||||||
@@ -405,65 +831,60 @@ static const uint8_t rx_fst_toeplitz_key[WLAN_CFG_RX_FST_TOEPLITZ_KEYLEN] = {
|
|||||||
0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa
|
0x6a, 0x42, 0xb7, 0x3b, 0xbe, 0xac, 0x01, 0xfa
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* wlan_cfg_fill_interrupt_mask() - set interrupt mask
|
||||||
|
*
|
||||||
|
* @wlan_cfg_dp_soc_ctxt: soc configuration context
|
||||||
|
* @num_dp_msi: Number of DP interrupts available (0 for integrated)
|
||||||
|
* @interrupt_mode: Type of interrupt
|
||||||
|
* @is_monitor_mode: is monitor mode enabled
|
||||||
|
*
|
||||||
|
* Return: void
|
||||||
|
*/
|
||||||
void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
|
void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
|
||||||
|
int num_dp_msi,
|
||||||
int interrupt_mode,
|
int interrupt_mode,
|
||||||
bool is_monitor_mode) {
|
bool is_monitor_mode) {
|
||||||
int i = 0;
|
int i = 0;
|
||||||
|
int interrupt_index = 0;
|
||||||
|
|
||||||
if (interrupt_mode == DP_INTR_INTEGRATED) {
|
if(interrupt_mode == DP_INTR_INTEGRATED) {
|
||||||
for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
|
interrupt_index = 0;
|
||||||
wlan_cfg_ctx->int_tx_ring_mask[i] =
|
|
||||||
tx_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_rx_ring_mask[i] =
|
|
||||||
rx_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_rx_mon_ring_mask[i] =
|
|
||||||
rx_mon_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_rx_err_ring_mask[i] =
|
|
||||||
rx_err_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] =
|
|
||||||
rx_wbm_rel_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_reo_status_ring_mask[i] =
|
|
||||||
reo_status_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_rxdma2host_ring_mask[i] =
|
|
||||||
rxdma2host_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_host2rxdma_ring_mask[i] =
|
|
||||||
host2rxdma_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[i] =
|
|
||||||
host2rxdma_mon_ring_mask_integrated[i];
|
|
||||||
wlan_cfg_ctx->int_rxdma2host_mon_ring_mask[i] =
|
|
||||||
rxdma2host_mon_ring_mask_integrated[i];
|
|
||||||
}
|
|
||||||
} else if (interrupt_mode == DP_INTR_MSI || interrupt_mode ==
|
} else if (interrupt_mode == DP_INTR_MSI || interrupt_mode ==
|
||||||
DP_INTR_POLL) {
|
DP_INTR_POLL) {
|
||||||
for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
|
interrupt_index = num_dp_msi;
|
||||||
wlan_cfg_ctx->int_tx_ring_mask[i] = tx_ring_mask_msi[i];
|
} else {
|
||||||
|
qdf_err("Interrupt mode %d", interrupt_mode);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
for (i = 0; i < WLAN_CFG_INT_NUM_CONTEXTS; i++) {
|
||||||
|
wlan_cfg_ctx->int_tx_ring_mask[i] =
|
||||||
|
dp_mask_assignment[interrupt_index].tx_ring_mask[i];
|
||||||
wlan_cfg_ctx->int_rx_mon_ring_mask[i] =
|
wlan_cfg_ctx->int_rx_mon_ring_mask[i] =
|
||||||
rx_mon_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].rx_mon_ring_mask[i];
|
||||||
wlan_cfg_ctx->int_rx_err_ring_mask[i] =
|
wlan_cfg_ctx->int_rx_err_ring_mask[i] =
|
||||||
rx_err_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].rx_err_ring_mask[i];
|
||||||
wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] =
|
wlan_cfg_ctx->int_rx_wbm_rel_ring_mask[i] =
|
||||||
rx_wbm_rel_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].rx_wbm_rel_ring_mask[i];
|
||||||
wlan_cfg_ctx->int_reo_status_ring_mask[i] =
|
wlan_cfg_ctx->int_reo_status_ring_mask[i] =
|
||||||
reo_status_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].reo_status_ring_mask[i];
|
||||||
if (is_monitor_mode) {
|
if (is_monitor_mode) {
|
||||||
wlan_cfg_ctx->int_rx_ring_mask[i] = 0;
|
wlan_cfg_ctx->int_rx_ring_mask[i] = 0;
|
||||||
wlan_cfg_ctx->int_rxdma2host_ring_mask[i] = 0;
|
wlan_cfg_ctx->int_rxdma2host_ring_mask[i] = 0;
|
||||||
} else {
|
} else {
|
||||||
wlan_cfg_ctx->int_rx_ring_mask[i] =
|
wlan_cfg_ctx->int_rx_ring_mask[i] =
|
||||||
rx_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].rx_ring_mask[i];
|
||||||
wlan_cfg_ctx->int_rxdma2host_ring_mask[i] =
|
wlan_cfg_ctx->int_rxdma2host_ring_mask[i] =
|
||||||
rxdma2host_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].rxdma2host_ring_mask[i];
|
||||||
}
|
}
|
||||||
wlan_cfg_ctx->int_host2rxdma_ring_mask[i] =
|
wlan_cfg_ctx->int_host2rxdma_ring_mask[i] =
|
||||||
host2rxdma_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].host2rxdma_ring_mask[i];
|
||||||
wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[i] =
|
wlan_cfg_ctx->int_host2rxdma_mon_ring_mask[i] =
|
||||||
host2rxdma_mon_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].host2rxdma_mon_ring_mask[i];
|
||||||
wlan_cfg_ctx->int_rxdma2host_mon_ring_mask[i] =
|
wlan_cfg_ctx->int_rxdma2host_mon_ring_mask[i] =
|
||||||
rxdma2host_mon_ring_mask_msi[i];
|
dp_mask_assignment[interrupt_index].rxdma2host_mon_ring_mask[i];
|
||||||
}
|
}
|
||||||
} else {
|
|
||||||
qdf_err("Interrupt mode %d", interrupt_mode);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|||||||
@@ -225,17 +225,17 @@ struct wlan_cfg_dp_soc_ctxt {
|
|||||||
int tx_ring_size;
|
int tx_ring_size;
|
||||||
int tx_comp_ring_size;
|
int tx_comp_ring_size;
|
||||||
int tx_comp_ring_size_nss;
|
int tx_comp_ring_size_nss;
|
||||||
int int_tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_tx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_rx_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_rx_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_host2rxdma_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_host2rxdma_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_rxdma2host_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_rxdma2host_mon_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_ce_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_ce_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_rx_err_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_rx_wbm_rel_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_reo_status_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_rxdma2host_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int int_host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
uint8_t int_host2rxdma_ring_mask[WLAN_CFG_INT_NUM_CONTEXTS];
|
||||||
int hw_macid[MAX_PDEV_CNT];
|
int hw_macid[MAX_PDEV_CNT];
|
||||||
int hw_macid_pdev_id_map[MAX_NUM_LMAC_HW];
|
int hw_macid_pdev_id_map[MAX_NUM_LMAC_HW];
|
||||||
int base_hw_macid;
|
int base_hw_macid;
|
||||||
@@ -1412,13 +1412,15 @@ wlan_cfg_is_tx_per_pkt_vdev_id_check_enabled(struct wlan_cfg_dp_soc_ctxt *cfg);
|
|||||||
* wlan_cfg_fill_interrupt_mask() - set interrupt mask
|
* wlan_cfg_fill_interrupt_mask() - set interrupt mask
|
||||||
*
|
*
|
||||||
* @wlan_cfg_dp_soc_ctxt: soc configuration context
|
* @wlan_cfg_dp_soc_ctxt: soc configuration context
|
||||||
* @interrupt_mode: interrupt_mode: MSI/LEGACY
|
* @num_dp_msi: Number of DP interrupts available (0 for integrated)
|
||||||
|
* @interrupt_mode: Type of interrupt
|
||||||
* @is_monitor_mode: is monitor mode enabled
|
* @is_monitor_mode: is monitor mode enabled
|
||||||
*
|
*
|
||||||
* Return: void
|
* Return: void
|
||||||
*/
|
*/
|
||||||
void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
|
void wlan_cfg_fill_interrupt_mask(struct wlan_cfg_dp_soc_ctxt *wlan_cfg_ctx,
|
||||||
int interrupt_mode, bool is_monitor_mode);
|
int num_dp_msi, int interrupt_mode,
|
||||||
|
bool is_monitor_mode);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* wlan_cfg_is_rx_fisa_enabled() - Get Rx FISA enabled flag
|
* wlan_cfg_is_rx_fisa_enabled() - Get Rx FISA enabled flag
|
||||||
|
|||||||
Reference in New Issue
Block a user