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@@ -60,14 +60,22 @@ static struct port_params tx_frame_params_shima[SWR_MSTR_PORT_LEN] = {
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/* 4.8 MHz clock */
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static struct port_params tx_frame_params_4p8MHz[SWR_MSTR_PORT_LEN] = {
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- {3, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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+ {7, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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{3, 0, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 1, 0x00, 0x00}, /* TX2 */
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{3, 2, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
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};
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+/* 0.6 MHz clock */
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+static struct port_params tx_frame_params_0p6MHz[SWR_MSTR_PORT_LEN] = {
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+ {1, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX1 */
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+ {1, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX2 */
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+ {1, 1, 0, 0xFF, 0xFF, 0xFF, 0xFF, 0xFF, 0, 0x00, 0x00}, /* TX3 */
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+};
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+
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static struct swr_mstr_port_map sm_port_map[] = {
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{TX_MACRO, SWR_UC0, tx_frame_params_default},
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{TX_MACRO, SWR_UC1, tx_frame_params_4p8MHz},
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+ {TX_MACRO, SWR_UC2, tx_frame_params_0p6MHz},
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{RX_MACRO, SWR_UC0, rx_frame_params_default},
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{RX_MACRO, SWR_UC1, rx_frame_params_dsd},
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{WSA_MACRO, SWR_UC0, wsa_frame_params_default},
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