qcacmn: Changes needed for MLO soc attach

Changes needed for MLO soc attach to pass chip_id,
dp_ml_context from upper layer.

This change also takes care of assigning appropriate
RBM id for IDLE link descriptors based on chip_id.

Change-Id: I8f5f08c524d91942e6e458f048700b7bdd900107
This commit is contained in:
Chaithanya Garrepalli
2021-11-19 14:40:36 +05:30
gecommit door Madan Koyyalamudi
bovenliggende 1faab04393
commit 70398a0ccd
17 gewijzigde bestanden met toevoegingen van 182 en 57 verwijderingen

Bestand weergeven

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -72,10 +73,12 @@ void *hal_rx_msdu_ext_desc_info_get_ptr_be(void *msdu_details_ptr);
* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
* @cookie: SW cookie for the buffer/descriptor
* @link_desc_paddr: Physical address of link descriptor entry
* @bm_id: idle link BM id
*
*/
void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr);
qdf_dma_addr_t link_desc_paddr,
uint8_t bm_id);
/**
* hal_hw_txrx_default_ops_attach_be(): Add default ops for BE chips

Bestand weergeven

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -142,7 +143,8 @@ void hal_reo_setup_generic_be(struct hal_soc *soc, void *reoparams)
}
void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr)
qdf_dma_addr_t link_desc_paddr,
uint8_t bm_id)
{
uint32_t *buf_addr = (uint32_t *)desc;
@@ -151,7 +153,7 @@ void hal_set_link_desc_addr_be(void *desc, uint32_t cookie,
HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO, BUFFER_ADDR_39_32,
(uint64_t)link_desc_paddr >> 32);
HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO, RETURN_BUFFER_MANAGER,
WBM_IDLE_DESC_LIST);
bm_id);
HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO, SW_BUFFER_COOKIE,
cookie);
}

Bestand weergeven

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -342,7 +343,8 @@
*/
static inline void hal_set_link_desc_addr(hal_soc_handle_t hal_soc_hdl,
void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr)
qdf_dma_addr_t link_desc_paddr,
uint8_t bm_id)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
@@ -353,7 +355,8 @@ static inline void hal_set_link_desc_addr(hal_soc_handle_t hal_soc_hdl,
if (hal_soc->ops->hal_set_link_desc_addr)
hal_soc->ops->hal_set_link_desc_addr(desc, cookie,
link_desc_paddr);
link_desc_paddr,
bm_id);
}
/**
@@ -393,4 +396,21 @@ uint32_t hal_get_reo_qdesc_size(hal_soc_handle_t hal_soc_hdl,
(3 * sizeof(struct rx_reo_queue_ext));
}
/**
* hal_get_idle_link_bm_id() - Get idle link BM id from chid_id
* @chip_id: mlo chip_id
*
* Returns: RBM ID
*/
static inline
uint8_t hal_get_idle_link_bm_id(hal_soc_handle_t hal_soc_hdl,
uint8_t chip_id)
{
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
if (hal_soc->ops->hal_get_idle_link_bm_id)
return hal_soc->ops->hal_get_idle_link_bm_id(chip_id);
return WBM_IDLE_DESC_LIST;
}
#endif /* _HAL_HW_INTERNAL_H_ */

Bestand weergeven

@@ -912,7 +912,8 @@ struct hal_hw_txrx_ops {
uint32_t (*hal_get_reo_qdesc_size)(uint32_t ba_window_size, int tid);
void (*hal_set_link_desc_addr)(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr);
qdf_dma_addr_t link_desc_paddr,
uint8_t bm_id);
void (*hal_tx_init_data_ring)(hal_soc_handle_t hal_soc_hdl,
hal_ring_handle_t hal_ring_hdl);
void* (*hal_rx_msdu_ext_desc_info_get_ptr)(void *msdu_details_ptr);
@@ -1012,6 +1013,7 @@ struct hal_hw_txrx_ops {
void *st_handle,
uint32_t tlv, int *num_ref);
uint8_t (*hal_get_tlv_hdr_size)(void);
uint8_t (*hal_get_idle_link_bm_id)(uint8_t chip_id);
};
/**

Bestand weergeven

@@ -1,5 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -29,10 +30,11 @@
* @desc: Descriptor entry (from WBM_IDLE_LINK ring)
* @cookie: SW cookie for the buffer/descriptor
* @link_desc_paddr: Physical address of link descriptor entry
*
* @bm_id: idle link BM id
*/
void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr);
qdf_dma_addr_t link_desc_paddr,
uint8_t bm_id);
/**
* hal_tx_init_data_ring_li() - Initialize all the TCL Descriptors in SRNG

Bestand weergeven

@@ -54,7 +54,8 @@ static uint32_t hal_get_reo_qdesc_size_li(uint32_t ba_window_size, int tid)
}
void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
qdf_dma_addr_t link_desc_paddr)
qdf_dma_addr_t link_desc_paddr,
uint8_t bm_id)
{
uint32_t *buf_addr = (uint32_t *)desc;
@@ -63,7 +64,7 @@ void hal_set_link_desc_addr_li(void *desc, uint32_t cookie,
HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, BUFFER_ADDR_39_32,
(uint64_t)link_desc_paddr >> 32);
HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, RETURN_BUFFER_MANAGER,
WBM_IDLE_DESC_LIST);
bm_id);
HAL_DESC_SET_FIELD(buf_addr, BUFFER_ADDR_INFO_1, SW_BUFFER_COOKIE,
cookie);
}
@@ -1134,6 +1135,17 @@ static QDF_STATUS hal_reo_status_update_li(hal_soc_handle_t hal_soc_hdl,
return QDF_STATUS_SUCCESS;
}
/**
* hal_get_idle_link_bm_id_li() - Get idle link BM id from chid_id
* @chip_id: mlo chip_id
*
* Returns: RBM ID
*/
static uint8_t hal_get_idle_link_bm_id_li(uint8_t chip_id)
{
return WBM_IDLE_DESC_LIST;
}
/**
* hal_hw_txrx_default_ops_attach_li() - Attach the default hal ops for
* lithium chipsets.
@@ -1230,4 +1242,5 @@ void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
hal_soc->ops->hal_rx_get_qdesc_addr = hal_rx_get_qdesc_addr_li;
hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
hal_set_reo_ent_desc_reo_dest_ind_li;
hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_li;
}

Bestand weergeven

@@ -1537,6 +1537,17 @@ static uint8_t hal_tx_get_num_tcl_banks_9224(void)
return HAL_NUM_TCL_BANKS_9224;
}
/**
* hal_get_idle_link_bm_id_9224() - Get idle link BM id from chid_id
* @chip_id: mlo chip_id
*
* Returns: RBM ID
*/
static uint8_t hal_get_idle_link_bm_id_9224(uint8_t chip_id)
{
return (WBM_IDLE_DESC_LIST + chip_id);
}
static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
{
/* init and setup */
@@ -1731,6 +1742,7 @@ static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
hal_soc->ops->hal_rx_priv_info_get_from_tlv =
hal_rx_priv_info_get_from_tlv_be;
hal_soc->ops->hal_rx_pkt_hdr_get = hal_rx_pkt_hdr_get_be;
hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_9224;
};
struct hal_hw_srng_config hw_srng_table_9224[] = {

Bestand weergeven

@@ -1283,6 +1283,17 @@ static inline void hal_cmem_write_7850(hal_soc_handle_t hal_soc_hdl,
hal_write32_mb(hal, offset, value);
}
/**
* hal_get_idle_link_bm_id_7850() - Get idle link BM id from chid_id
* @chip_id: mlo chip_id
*
* Returns: RBM ID
*/
static uint8_t hal_get_idle_link_bm_id_7850(uint8_t chip_id)
{
return WBM_IDLE_DESC_LIST;
}
static void hal_hw_txrx_ops_attach_wcn7850(struct hal_soc *hal_soc)
{
/* init and setup */
@@ -1503,6 +1514,7 @@ static void hal_hw_txrx_ops_attach_wcn7850(struct hal_soc *hal_soc)
hal_rx_get_qdesc_addr_be;
hal_soc->ops->hal_set_reo_ent_desc_reo_dest_ind =
hal_set_reo_ent_desc_reo_dest_ind_be;
hal_soc->ops->hal_get_idle_link_bm_id = hal_get_idle_link_bm_id_7850;
};
struct hal_hw_srng_config hw_srng_table_7850[] = {