qcacmn: Force wake PCIe for hsp register write

make sure both PCIe and device are force woken for the register
writes for hsp, or write may fail.
Earlier WAR is not required as we have root caused it.

Change-Id: I350b810a6cef8eec46428e57f5b779f888552c1b
CRs-Fixed: 2677342
This commit is contained in:
Jianmin Zhu
2020-05-12 22:45:03 +08:00
committed by nshrivas
parent 0307ee6023
commit 6f95b4aadb
2 changed files with 7 additions and 31 deletions

View File

@@ -1787,29 +1787,6 @@ void hal_get_hw_hptp_generic(struct hal_soc *hal_soc,
}
}
#if defined(WBM_IDLE_LSB_WRITE_CONFIRM_WAR)
/**
* hal_wbm_idle_lsb_write_confirm() - Check and update WBM_IDLE_LINK ring LSB
* @srng: srng handle
*
* Return: None
*/
static void hal_wbm_idle_lsb_write_confirm(struct hal_srng *srng)
{
if (srng->ring_id == HAL_SRNG_WBM_IDLE_LINK) {
while (SRNG_SRC_REG_READ(srng, BASE_LSB) !=
((unsigned int)srng->ring_base_paddr & 0xffffffff))
SRNG_SRC_REG_WRITE(srng, BASE_LSB,
srng->ring_base_paddr &
0xffffffff);
}
}
#else
static void hal_wbm_idle_lsb_write_confirm(struct hal_srng *srng)
{
}
#endif
/**
* hal_srng_src_hw_init - Private function to initialize SRNG
* source ring HW
@@ -1837,8 +1814,6 @@ void hal_srng_src_hw_init_generic(struct hal_soc *hal,
}
SRNG_SRC_REG_WRITE(srng, BASE_LSB, srng->ring_base_paddr & 0xffffffff);
hal_wbm_idle_lsb_write_confirm(srng);
reg_val = SRNG_SM(SRNG_SRC_FLD(BASE_MSB, RING_BASE_ADDR_MSB),
((uint64_t)(srng->ring_base_paddr) >> 32)) |
SRNG_SM(SRNG_SRC_FLD(BASE_MSB, RING_SIZE),