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@@ -151,6 +151,7 @@ struct wsa_macro_swr_ctrl_platform_data {
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int (*write)(void *handle, int reg, int val);
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int (*bulk_write)(void *handle, u32 *reg, u32 *val, size_t len);
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int (*clk)(void *handle, bool enable);
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+ int (*core_vote)(void *handle, bool enable);
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int (*handle_irq)(void *handle,
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irqreturn_t (*swrm_irq_handler)(int irq,
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void *data),
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@@ -2770,6 +2771,24 @@ static void wsa_macro_init_reg(struct snd_soc_component *component)
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wsa_macro_init_bcl_pmic_reg(component);
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}
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+static int wsa_macro_core_vote(void *handle, bool enable)
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+{
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+ struct wsa_macro_priv *wsa_priv = (struct wsa_macro_priv *) handle;
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+ int ret = 0;
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+
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+ if (wsa_priv == NULL) {
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+ pr_err("%s: wsa priv data is NULL\n", __func__);
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+ return -EINVAL;
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+ }
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+ if (enable) {
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+ pm_runtime_get_sync(wsa_priv->dev);
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+ pm_runtime_put_autosuspend(wsa_priv->dev);
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+ pm_runtime_mark_last_busy(wsa_priv->dev);
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+ }
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+
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+ return ret;
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+}
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+
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static int wsa_swrm_clock(void *handle, bool enable)
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{
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struct wsa_macro_priv *wsa_priv = (struct wsa_macro_priv *) handle;
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@@ -2788,8 +2807,16 @@ static int wsa_swrm_clock(void *handle, bool enable)
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if (enable) {
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pm_runtime_get_sync(wsa_priv->dev);
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if (wsa_priv->swr_clk_users == 0) {
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- msm_cdc_pinctrl_select_active_state(
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+ ret = msm_cdc_pinctrl_select_active_state(
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wsa_priv->wsa_swr_gpio_p);
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+ if (ret < 0) {
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+ dev_err_ratelimited(wsa_priv->dev,
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+ "%s: wsa swr pinctrl enable failed\n",
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+ __func__);
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+ pm_runtime_mark_last_busy(wsa_priv->dev);
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+ pm_runtime_put_autosuspend(wsa_priv->dev);
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+ goto exit;
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+ }
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ret = wsa_macro_mclk_enable(wsa_priv, 1, true);
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if (ret < 0) {
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msm_cdc_pinctrl_select_sleep_state(
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@@ -2797,6 +2824,8 @@ static int wsa_swrm_clock(void *handle, bool enable)
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dev_err_ratelimited(wsa_priv->dev,
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"%s: wsa request clock enable failed\n",
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__func__);
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+ pm_runtime_mark_last_busy(wsa_priv->dev);
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+ pm_runtime_put_autosuspend(wsa_priv->dev);
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goto exit;
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}
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if (wsa_priv->reset_swr)
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@@ -2812,9 +2841,9 @@ static int wsa_swrm_clock(void *handle, bool enable)
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0x02, 0x00);
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wsa_priv->reset_swr = false;
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}
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+ wsa_priv->swr_clk_users++;
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pm_runtime_mark_last_busy(wsa_priv->dev);
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pm_runtime_put_autosuspend(wsa_priv->dev);
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- wsa_priv->swr_clk_users++;
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} else {
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if (wsa_priv->swr_clk_users <= 0) {
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dev_err(wsa_priv->dev, "%s: clock already disabled\n",
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@@ -2828,8 +2857,14 @@ static int wsa_swrm_clock(void *handle, bool enable)
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BOLERO_CDC_WSA_CLK_RST_CTRL_SWR_CONTROL,
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0x01, 0x00);
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wsa_macro_mclk_enable(wsa_priv, 0, true);
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- msm_cdc_pinctrl_select_sleep_state(
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+ ret = msm_cdc_pinctrl_select_sleep_state(
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wsa_priv->wsa_swr_gpio_p);
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+ if (ret < 0) {
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+ dev_err_ratelimited(wsa_priv->dev,
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+ "%s: wsa swr pinctrl disable failed\n",
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+ __func__);
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+ goto exit;
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+ }
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}
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}
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dev_dbg(wsa_priv->dev, "%s: swrm clock users %d\n",
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@@ -3096,6 +3131,7 @@ static int wsa_macro_probe(struct platform_device *pdev)
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wsa_priv->swr_plat_data.write = NULL;
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wsa_priv->swr_plat_data.bulk_write = NULL;
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wsa_priv->swr_plat_data.clk = wsa_swrm_clock;
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+ wsa_priv->swr_plat_data.core_vote = wsa_macro_core_vote;
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wsa_priv->swr_plat_data.handle_irq = NULL;
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ret = of_property_read_u32(pdev->dev.of_node, "qcom,default-clk-id",
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