disp: msm: dp: update mode validation logic for widebus
Update the mode validation logic by halving the mode clock when widebus is enabled. Change-Id: I8f060d8b60403aa5020496983bec0b3e2878b08b Signed-off-by: Tatenda Chipeperekwa <tatendac@codeaurora.org>
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@@ -2059,6 +2059,7 @@ static enum drm_mode_status dp_display_validate_mode(
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bool dsc_en;
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u32 num_lm = 0;
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int rc = 0;
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u32 pclk_khz = 0;
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if (!dp_display || !mode || !panel ||
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!avail_res || !avail_res->max_mixer_width) {
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@@ -2099,8 +2100,12 @@ static enum drm_mode_status dp_display_validate_mode(
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goto end;
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}
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if (mode->clock > dp_display->max_pclk_khz) {
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DP_MST_DEBUG("clk:%d, max:%d\n", mode->clock,
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pclk_khz = dp_mode.timing.widebus_en ?
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(dp_mode.timing.pixel_clk_khz >> 1) :
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(dp_mode.timing.pixel_clk_khz);
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if (pclk_khz > dp_display->max_pclk_khz) {
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DP_MST_DEBUG("clk:%d, max:%d\n", pclk_khz,
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dp_display->max_pclk_khz);
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goto end;
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}
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