video: driver: Align buffer interface file with CL: 30395412
Align driver buffer macro interface file with firmware file. Change-Id: I5f3d2a581150452f9becb2dec871040ced6803c5 Signed-off-by: Akshata Sahukar <asahukar@codeaurora.org>
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@@ -973,7 +973,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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HFI_U32 num_ref = 1; \
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if (n_bframe) \
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num_ref = 2; \
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if (_total_hp_layers > 1) { \
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if (_total_hp_layers > 1) \
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{ \
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if (hybrid_hp) \
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num_ref = (_total_hp_layers + 1) >> 1; \
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else if (codec_standard == HFI_CODEC_ENCODE_HEVC) \
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@@ -986,7 +987,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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} \
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if (ltr_count) \
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num_ref = num_ref + ltr_count; \
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if (_total_hb_layers > 1) { \
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if (_total_hb_layers > 1) \
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{ \
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if (codec_standard == HFI_CODEC_ENCODE_HEVC) \
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num_ref = (_total_hb_layers); \
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else if (codec_standard == HFI_CODEC_ENCODE_AVC) \
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@@ -997,12 +999,14 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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#define SIZE_BIN_BITSTREAM_ENC(_size, rc_type, frame_width, frame_height, \
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work_mode, lcu_size) \
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do { \
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do \
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{ \
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HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \
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HFI_U32 bitstream_size_eval = 0; \
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size_aligned_width = HFI_ALIGN((frame_width), lcu_size); \
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size_aligned_height = HFI_ALIGN((frame_height), lcu_size); \
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if (work_mode == HFI_WORKMODE_2) { \
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if (work_mode == HFI_WORKMODE_2) \
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{ \
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if ((rc_type == HFI_RC_CQ) || (rc_type == HFI_RC_OFF)) \
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{ \
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bitstream_size_eval = (((size_aligned_width) * \
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@@ -1041,7 +1045,8 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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#define SIZE_ENC_SINGLE_PIPE(size, rc_type, bitbin_size, num_vpp_pipes, \
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frame_width, frame_height, lcu_size) \
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do { \
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do \
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{ \
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HFI_U32 size_single_pipe_eval = 0, sao_bin_buffer_size = 0, \
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_padded_bin_sz = 0; \
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HFI_U32 size_aligned_width = 0, size_aligned_height = 0; \
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@@ -1537,32 +1542,23 @@ _yuv_bufcount_min, is_opb, num_vpp_pipes) \
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HFI_BUFFER_DPB_ENC(_size, frame_width, frame_height, is_ten_bit); \
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} while (0)
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#define HFI_BUFFER_VPSS_ENC(vpss_size, frame_width, frame_height, ds_enable, \
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rot_enable, flip_enable, is_ten_bit) \
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#define HFI_BUFFER_VPSS_ENC(vpss_size, bitstream_framewidth, bitstream_frameheight, ds_enable, \
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rotation, is_ten_bit) \
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do \
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{ \
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HFI_U32 vpss_size = 0; \
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vpss_size = 0; \
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if (ds_enable) \
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{ \
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if (rot_enable) \
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if (rotation == HFI_ROTATION_90 || rotation == HFI_ROTATION_270 ) \
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{ \
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HFI_BUFFER_DPB_ENC(vpss_size, frame_height, \
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frame_width, is_ten_bit); \
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} \
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else if (flip_enable) \
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{ \
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HFI_BUFFER_DPB_ENC(vpss_size, frame_width, \
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frame_height, is_ten_bit); \
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HFI_BUFFER_DPB_ENC(vpss_size, bitstream_frameheight, \
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bitstream_framewidth, is_ten_bit); \
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} \
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else \
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{ \
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vpss_size = 0; \
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HFI_BUFFER_DPB_ENC(vpss_size, bitstream_framewidth, \
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bitstream_frameheight, is_ten_bit); \
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} \
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vpss_size = vpss_size; \
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} \
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else \
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{ \
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vpss_size = vpss_size; \
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} \
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} while (0)
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@@ -443,7 +443,6 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst)
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u32 size = 0;
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bool ds_enable = false, is_tenbit = false;
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u32 rotation_val = HFI_ROTATION_NONE;
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u32 flip_val = HFI_DISABLE_FLIP;
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u32 width, height, driver_colorfmt;
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struct v4l2_format* f;
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@@ -454,10 +453,6 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst)
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ds_enable = is_scaling_enabled(inst);
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msm_vidc_v4l2_to_hfi_enum(inst, ROTATION, &rotation_val);
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if (inst->capabilities->cap[HFLIP].value)
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flip_val |= HFI_HORIZONTAL_FLIP;
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if (inst->capabilities->cap[VFLIP].value)
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flip_val = HFI_VERTICAL_FLIP;
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width = inst->compose.width;
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height = inst->compose.height;
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@@ -468,7 +463,7 @@ static u32 msm_vidc_encoder_vpss_size_iris2(struct msm_vidc_inst* inst)
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is_tenbit = is_10bit_colorformat(driver_colorfmt);
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HFI_BUFFER_VPSS_ENC(size, width, height, ds_enable,
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rotation_val, flip_val, is_tenbit);
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rotation_val, is_tenbit);
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i_vpr_l(inst, "%s: size %d\n", __func__, size);
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return size;
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}
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