disp: msm: sde: reset ctl during wr_ptr_irq timeout
wr_ptr_irq timeout signifies that the MDP is stuck on either the current or previous frame. Handle ctl reset and fence signalling as part of this timeout handling. This logic would help to recover the HW faster in case of posted-start. Change-Id: I09b3d21772df431f9fc4a58b2fd9b4fcac4a7de7 Signed-off-by: Veera Sundaram Sankaran <veeras@codeaurora.org>
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@@ -510,6 +510,12 @@ void sde_encoder_phys_setup_cdm(struct sde_encoder_phys *phys_enc,
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void sde_encoder_helper_get_pp_line_count(struct drm_encoder *drm_enc,
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struct sde_hw_pp_vsync_info *info);
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/**
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* sde_encoder_helper_needs_hw_reset - hw reset helper function
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* @drm_enc: Pointer to drm encoder structure
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*/
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void sde_encoder_helper_needs_hw_reset(struct drm_encoder *drm_enc);
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/**
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* sde_encoder_helper_trigger_flush - control flush helper function
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* This helper function may be optionally specified by physical
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