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msm: camera: icp: support OFE functionality in hw mgr

Add OFE device allocation and initialization. Verify number
of DT listed devices with cpas capability. Create common
sets of command types for IPE/BPS/OFE. Refactor the current usage
of IPE/BPS device interfaces to scale to n number of devices
including OFE. Add support for OFE functionality: acquire/
release, init/deinit, PC/Resume, get gdsc, clock update,
OFE HFI commands and message handlers.

CRs-Fixed: 3337784
Change-Id: I94c9bd21cf21dead6733c7cd6b86e343e86169de
Signed-off-by: Sokchetra Eung <[email protected]>
Sokchetra Eung 2 жил өмнө
parent
commit
6d7e9d97ae

+ 3 - 1
drivers/cam_icp/cam_icp_context.c

@@ -196,7 +196,9 @@ static int __cam_icp_config_dev_in_ready(struct cam_context *ctx,
 	if (((packet->header.op_code & 0xff) ==
 		CAM_ICP_OPCODE_IPE_SETTINGS) ||
 		((packet->header.op_code & 0xff) ==
-		CAM_ICP_OPCODE_BPS_SETTINGS))
+		CAM_ICP_OPCODE_BPS_SETTINGS) ||
+		((packet->header.op_code & 0xff) ==
+		CAM_ICP_OPCODE_OFE_SETTINGS))
 		rc = cam_context_config_dev_to_hw(ctx, cmd);
 	else
 		rc = cam_context_prepare_dev_to_hw(ctx, cmd);

+ 1 - 1
drivers/cam_icp/fw_inc/hfi_reg.h

@@ -11,7 +11,7 @@
 #include "hfi_intf.h"
 
 /* general purpose registers */
-#define GEN_PURPOSE_REG(n)              (n * 4)
+#define GEN_PURPOSE_REG(n)              (n << 2)
 
 #define HFI_REG_FW_VERSION                   GEN_PURPOSE_REG(1)
 #define HFI_REG_HOST_ICP_INIT_REQUEST        GEN_PURPOSE_REG(2)

+ 30 - 11
drivers/cam_icp/fw_inc/hfi_session_defs.h

@@ -19,6 +19,11 @@
 #define HFI_IPEBPS_CMD_OPCODE_IPE_ABORT                 0x7
 #define HFI_IPEBPS_CMD_OPCODE_IPE_DESTROY               0x8
 
+#define HFI_OFE_CMD_OPCODE_CONFIG_IO                    0x1
+#define HFI_OFE_CMD_OPCODE_FRAME_PROCESS                0x2
+#define HFI_OFE_CMD_OPCODE_ABORT                        0x3
+#define HFI_OFE_CMD_OPCODE_DESTROY                      0x4
+
 #define HFI_IPEBPS_CMD_OPCODE_BPS_WAIT_FOR_IPE          0x9
 #define HFI_IPEBPS_CMD_OPCODE_BPS_WAIT_FOR_BPS          0xa
 #define HFI_IPEBPS_CMD_OPCODE_IPE_WAIT_FOR_BPS          0xb
@@ -27,9 +32,16 @@
 #define HFI_IPEBPS_CMD_OPCODE_MEM_MAP                   0xe
 #define HFI_IPEBPS_CMD_OPCODE_MEM_UNMAP                 0xf
 
-#define HFI_IPEBPS_HANDLE_TYPE_BPS                      0x1
+#define HFI_IPEBPS_HANDLE_TYPE_BPS_NON_RT               0x1
 #define HFI_IPEBPS_HANDLE_TYPE_IPE_RT                   0x2
 #define HFI_IPEBPS_HANDLE_TYPE_IPE_NON_RT               0x3
+#define HFI_IPEBPS_HANDLE_TYPE_IPE_SEMI_RT              0x4
+#define HFI_IPEBPS_HANDLE_TYPE_BPS_RT                   0x5
+#define HFI_IPEBPS_HANDLE_TYPE_BPS_SEMI_RT              0x6
+
+#define HFI_OFE_HANDLE_TYPE_OFE_RT                      0x1
+#define HFI_OFE_HANDLE_TYPE_OFE_NON_RT                  0x2
+#define HFI_OFE_HANDLE_TYPE_OFE_SEMI_RT                 0x3
 
 /**
  * struct mem_map_region_data
@@ -94,16 +106,15 @@ struct hfi_cmd_abort {
 } __packed;
 
 /**
- * struct hfi_cmd_abort_destroy
+ * struct hfi_cmd_destroy
  * @user_data: user supplied data
  *
- * Device destroy/abort command
- * @HFI_IPEBPS_CMD_OPCODE_IPE_ABORT
- * @HFI_IPEBPS_CMD_OPCODE_BPS_ABORT
+ * IPE/BPS/OFE destroy command
  * @HFI_IPEBPS_CMD_OPCODE_IPE_DESTROY
  * @HFI_IPEBPS_CMD_OPCODE_BPS_DESTROY
+ * @HFI_OFE_CMD_OPCODE_OFE_DESTROY
  */
-struct hfi_cmd_abort_destroy {
+struct hfi_cmd_destroy {
 	uint64_t user_data;
 } __packed;
 
@@ -127,7 +138,7 @@ struct hfi_cmd_chaining_ops {
  * struct hfi_cmd_create_handle
  * @size: packet size in bytes
  * @pkt_type: opcode of a packet
- * @handle_type: device firmware session handle type
+ * @handle_type: IPE/BPS/OFE firmware session handle type
  * @user_data1: caller provided data1
  * @user_data2: caller provided data2
  *
@@ -145,7 +156,7 @@ struct hfi_cmd_create_handle {
  * struct hfi_cmd_dev_async
  * @size: packet size in bytes
  * @pkt_type: opcode of a packet
- * @opcode: opcode for devices' async operation
+ * @opcode: opcode for devices I/O async operation
  *          CONFIG_IO: configures I/O for device handle
  *          FRAME_PROCESS: image frame to be processed by device
  *          ABORT: abort all processing frames of device handle
@@ -547,15 +558,23 @@ struct hfi_msg_ipe_config {
 } __packed;
 
 /**
- * struct hfi_msg_bps_common
- * @rc: result of ipe config command
+ * struct hfi_msg_bps_config
+ * @rc: result of bps config command
  * @user_data: user data
  */
-struct hfi_msg_bps_common {
+struct hfi_msg_bps_config {
 	uint32_t rc;
 	uint64_t user_data;
 } __packed;
 
+/**
+ * struct hfi_msg_ofe_config
+ * @rc: result of ofe config command
+ */
+struct hfi_msg_ofe_config {
+	uint32_t rc;
+} __packed;
+
 /**
  * struct icp_dev_destroy
  * @user_data: user data

+ 53 - 10
drivers/cam_icp/fw_inc/hfi_sys_defs.h

@@ -22,6 +22,7 @@
 #define HFI_DOMAIN_BASE_IPE_BPS         (0x1 << HFI_DOMAIN_SHFT)
 #define HFI_DOMAIN_BASE_CDM             (0x2 << HFI_DOMAIN_SHFT)
 #define HFI_DOMAIN_BASE_DBG             (0x3 << HFI_DOMAIN_SHFT)
+#define HFI_DOMAIN_BASE_OFE             (0x4 << HFI_DOMAIN_SHFT)
 
 /* Command base offset for commands */
 #define HFI_CMD_START_OFFSET            0x10000
@@ -44,12 +45,14 @@
 #define HFI_EVENT_IPE_BPS_ERROR         (HFI_COMMON_BASE + 0x3)
 #define HFI_EVENT_CDM_ERROR             (HFI_COMMON_BASE + 0x4)
 #define HFI_EVENT_DBG_ERROR             (HFI_COMMON_BASE + 0x5)
+#define HFI_EVENT_OFE_ERROR             (HFI_COMMON_BASE + 0x6)
 
 /* Core level start Ranges for errors */
-#define HFI_ERR_ICP_START               (HFI_COMMON_BASE + 0x64)
-#define HFI_ERR_IPE_BPS_START           (HFI_ERR_ICP_START + 0x64)
+#define HFI_ERR_ICP_START               (HFI_COMMON_BASE       + 0x64)
+#define HFI_ERR_IPE_BPS_START           (HFI_ERR_ICP_START     + 0x64)
 #define HFI_ERR_CDM_START               (HFI_ERR_IPE_BPS_START + 0x64)
-#define HFI_ERR_DBG_START               (HFI_ERR_CDM_START + 0x64)
+#define HFI_ERR_DBG_START               (HFI_ERR_CDM_START     + 0x64)
+#define HFI_ERR_OFE_START               (HFI_ERR_DBG_START     + 0x64)
 
 /*ICP Core level  error messages */
 #define HFI_ERR_NO_RES                  (HFI_ERR_ICP_START + 0x1)
@@ -100,6 +103,15 @@
 #define HFI_CMD_IPEBPS_ASYNC_COMMAND_INDIRECT \
 		(HFI_CMD_IPE_BPS_COMMON_START + 0xe)
 
+/* Core level commands */
+/* OFE core Commands */
+#define HFI_CMD_OFE_COMMON_START \
+		(HFI_DOMAIN_BASE_OFE + HFI_CMD_START_OFFSET + 0x0)
+#define HFI_CMD_OFE_CREATE_HANDLE \
+		(HFI_CMD_OFE_COMMON_START + 0x08)
+#define HFI_CMD_OFE_ASYNC_COMMAND \
+		(HFI_CMD_OFE_COMMON_START + 0x0e)
+
 /* CDM core Commands */
 #define HFI_CMD_CDM_COMMON_START \
 		(HFI_DOMAIN_BASE_CDM + HFI_CMD_START_OFFSET + 0x0)
@@ -134,11 +146,24 @@
 		(HFI_MSG_IPE_BPS_COMMON_START + 0x0a)
 #define HFI_MSG_IPEBPS_ASYNC_COMMAND_INDIRECT_ACK \
 		(HFI_MSG_IPE_BPS_COMMON_START + 0x0e)
-#define HFI_MSG_IPE_BPS_TEST_START	\
+#define HFI_MSG_IPE_BPS_TEST_START \
 		(HFI_MSG_IPE_BPS_COMMON_START + 0x800)
 #define HFI_MSG_IPE_BPS_END \
 		(HFI_MSG_IPE_BPS_COMMON_START + 0xFFF)
 
+/* Core level Messages */
+/* OFE core Messages */
+#define HFI_MSG_OFE_COMMON_START \
+		(HFI_DOMAIN_BASE_OFE + HFI_MSG_START_OFFSET + 0x0)
+#define HFI_MSG_OFE_CREATE_HANDLE_ACK \
+		(HFI_MSG_OFE_COMMON_START + 0X08)
+#define HFI_MSG_OFE_ASYNC_COMMAND_ACK \
+		(HFI_MSG_OFE_COMMON_START + 0x0e)
+#define HFI_MSG_OFE_TEST_START \
+		(HFI_MSG_OFE_COMMON_START + 0x0800)
+#define HFI_MSG_OFE_END \
+		(HFI_MSG_OFE_COMMON_START + 0x0FFF)
+
 /* CDM core Messages */
 #define HFI_MSG_CDM_COMMON_START \
 		(HFI_DOMAIN_BASE_CDM + HFI_MSG_START_OFFSET + 0x0)
@@ -157,6 +182,10 @@
 		(HFI_CMD_IPE_BPS_COMMON_START + 0x800)
 #define HFI_CMD_IPE_BPS_END (HFI_CMD_IPE_BPS_COMMON_START + 0xFFF)
 
+/* OFE core level test command range */
+#define HFI_CMD_OFE_TEST_START         (HFI_CMD_OFE_COMMON_START + 0x0800)
+#define HFI_CMD_OFE_END                (HFI_CMD_OFE_COMMON_START + 0x0FFF)
+
 /* ICP core level test message range */
 #define HFI_MSG_ICP_TEST_START  (HFI_MSG_ICP_COMMON_START + 0x800)
 #define HFI_MSG_ICP_END         (HFI_MSG_ICP_COMMON_START + 0xFFF)
@@ -176,9 +205,10 @@
 #define HFI_PROP_SYS_SUPPORTED             (HFI_PROPERTY_ICP_COMMON_START + 0x4)
 #define HFI_PROP_SYS_IPEBPS_PC             (HFI_PROPERTY_ICP_COMMON_START + 0x5)
 #define HFI_PROP_SYS_FW_DUMP_CFG           (HFI_PROPERTY_ICP_COMMON_START + 0x8)
-#define HFI_PROPERTY_SYS_UBWC_CONFIG_EX    (HFI_PROPERTY_ICP_COMMON_START + 0x9)
-#define HFI_PROPERTY_SYS_ICP_HW_FREQUENCY  (HFI_PROPERTY_ICP_COMMON_START + 0xa)
-#define HFI_PROPERTY_SYS_RAMDUMP_MODE      (HFI_PROPERTY_ICP_COMMON_START + 0xb)
+#define HFI_PROP_SYS_UBWC_CONFIG_EX        (HFI_PROPERTY_ICP_COMMON_START + 0x9)
+#define HFI_PROP_SYS_ICP_HW_FREQUENCY      (HFI_PROPERTY_ICP_COMMON_START + 0xa)
+#define HFI_PROP_SYS_ICP_RAMDUMP_MODE      (HFI_PROPERTY_ICP_COMMON_START + 0xb)
+#define HFI_PROP_SYS_OFE_PC                (HFI_PROPERTY_ICP_COMMON_START + 0xc)
 
 /* Capabilities reported at sys init */
 #define HFI_CAPS_PLACEHOLDER_1         (HFI_COMMON_BASE + 0x1)
@@ -238,7 +268,7 @@
 #define HFI_DEBUG_CFG_WFI        0x01000000
 #define HFI_DEBUG_CFG_ARM9WD     0x10000000
 
-#define HFI_DEV_VERSION_MAX      0x5
+#define HFI_DEV_VERSION_MAX      0x6
 
 /**
  * start of sys command packet types
@@ -277,7 +307,7 @@ struct hfi_caps_support_info {
  * payload structure to configure HFI_PROPERTY_SYS_DEBUG_CONFIG
  * @debug_config: it is a result of HFI_DEBUG_MSG_X values that
  *                are OR-ed together to specify the debug message types
- *                to otput
+ *                to output
  * @debug_mode: debug message output through debug queue/qdss
  * @HFI_PROPERTY_SYS_DEBUG_CONFIG
  */
@@ -313,10 +343,12 @@ struct hfi_cmd_ubwc_cfg {
  * Payload structure to configure HFI_UBWC_CFG_TYPE_EXT
  * @bps: UBWC configuration for bps
  * @ipe: UBWC configuration for ipe
+ * @ofe: UBWC configuration for ofe
  */
 struct hfi_cmd_ubwc_cfg_ext {
 	struct hfi_cmd_ubwc_cfg bps;
 	struct hfi_cmd_ubwc_cfg ipe;
+	struct hfi_cmd_ubwc_cfg ofe;
 } __packed;
 
 /**
@@ -401,9 +433,20 @@ struct hfi_cmd_sys_reset_pkt {
 /**
  * struct hfi_prop
  * structure to report maximum supported features of firmware.
+ * @api_ver:    Firmware API version
+ * @dev_ver:    Device version
+ * @num_icp_hw: Number of ICP hardware information
+ * @dev_hw_ver: Supported hardware version information
+ * @force_ipe_8bpp: flag to indicate if 8bpp ipe fuse is blown
+ * @reserved:   Reserved field
  */
 struct hfi_sys_support {
-	uint32_t place_holder;
+	uint32_t api_ver;
+	uint32_t dev_ver;
+	uint32_t num_icp_hw;
+	uint32_t dev_hw_ver[HFI_DEV_VERSION_MAX];
+	uint32_t force_ipe_8bpp;
+	uint32_t reserved;
 } __packed;
 
 /**

+ 3 - 3
drivers/cam_icp/hfi.c

@@ -408,7 +408,7 @@ int hfi_cmd_ubwc_config_ext(uint32_t *ubwc_ipe_cfg,
 	dbg_prop->size = size;
 	dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
 	dbg_prop->num_prop = 1;
-	dbg_prop->prop_data[0] = HFI_PROPERTY_SYS_UBWC_CONFIG_EX;
+	dbg_prop->prop_data[0] = HFI_PROP_SYS_UBWC_CONFIG_EX;
 	dbg_prop->prop_data[1] = ubwc_bps_cfg[0];
 	dbg_prop->prop_data[2] = ubwc_bps_cfg[1];
 	dbg_prop->prop_data[3] = ubwc_ipe_cfg[0];
@@ -515,7 +515,7 @@ int hfi_set_fw_dump_levels(uint32_t hang_dump_lvl,
 	hfi_write_cmd(prop);
 
 	/* Update and write ramdump level */
-	fw_dump_level_switch_prop->prop_data[0] = HFI_PROPERTY_SYS_RAMDUMP_MODE;
+	fw_dump_level_switch_prop->prop_data[0] = HFI_PROP_SYS_ICP_RAMDUMP_MODE;
 	fw_dump_level_switch_prop->prop_data[1] = ram_dump_lvl;
 
 	hfi_write_cmd(prop);
@@ -553,7 +553,7 @@ int hfi_send_freq_info(int32_t freq)
 	dbg_prop->size = size;
 	dbg_prop->pkt_type = HFI_CMD_SYS_SET_PROPERTY;
 	dbg_prop->num_prop = 1;
-	dbg_prop->prop_data[0] = HFI_PROPERTY_SYS_ICP_HW_FREQUENCY;
+	dbg_prop->prop_data[0] = HFI_PROP_SYS_ICP_HW_FREQUENCY;
 	dbg_prop->prop_data[1] = freq;
 
 	CAM_DBG(CAM_HFI, "prop->size = %d\n"

+ 9 - 9
drivers/cam_icp/icp_hw/bps_hw/bps_core.c

@@ -370,7 +370,7 @@ int cam_bps_process_cmd(void *device_priv, uint32_t cmd_type,
 		return -EINVAL;
 	}
 
-	if (cmd_type >= CAM_ICP_BPS_CMD_MAX) {
+	if (cmd_type >= CAM_ICP_DEV_CMD_MAX) {
 		CAM_ERR(CAM_ICP, "Invalid command : %x", cmd_type);
 		return -EINVAL;
 	}
@@ -380,7 +380,7 @@ int cam_bps_process_cmd(void *device_priv, uint32_t cmd_type,
 	hw_info = core_info->bps_hw_info;
 
 	switch (cmd_type) {
-	case CAM_ICP_BPS_CMD_VOTE_CPAS: {
+	case CAM_ICP_DEV_CMD_VOTE_CPAS: {
 		struct cam_icp_cpas_vote *cpas_vote = cmd_args;
 
 		if (!cmd_args) {
@@ -392,7 +392,7 @@ int cam_bps_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	}
 
-	case CAM_ICP_BPS_CMD_CPAS_START: {
+	case CAM_ICP_DEV_CMD_CPAS_START: {
 		struct cam_icp_cpas_vote *cpas_vote = cmd_args;
 
 		if (!cmd_args) {
@@ -409,19 +409,19 @@ int cam_bps_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	}
 
-	case CAM_ICP_BPS_CMD_CPAS_STOP:
+	case CAM_ICP_DEV_CMD_CPAS_STOP:
 		if (core_info->cpas_start) {
 			cam_cpas_stop(core_info->cpas_handle);
 			core_info->cpas_start = false;
 		}
 		break;
-	case CAM_ICP_BPS_CMD_POWER_COLLAPSE:
+	case CAM_ICP_DEV_CMD_POWER_COLLAPSE:
 		rc = cam_bps_handle_pc(bps_dev);
 		break;
-	case CAM_ICP_BPS_CMD_POWER_RESUME:
+	case CAM_ICP_DEV_CMD_POWER_RESUME:
 		rc = cam_bps_handle_resume(bps_dev);
 		break;
-	case CAM_ICP_BPS_CMD_UPDATE_CLK: {
+	case CAM_ICP_DEV_CMD_UPDATE_CLK: {
 		struct cam_icp_clk_update_cmd *clk_upd_cmd = cmd_args;
 		struct cam_ahb_vote ahb_vote;
 		uint32_t clk_rate = clk_upd_cmd->curr_clk_rate;
@@ -465,12 +465,12 @@ int cam_bps_process_cmd(void *device_priv, uint32_t cmd_type,
 		}
 		break;
 	}
-	case CAM_ICP_BPS_CMD_DISABLE_CLK:
+	case CAM_ICP_DEV_CMD_DISABLE_CLK:
 		if (core_info->clk_enable == true)
 			cam_bps_toggle_clk(soc_info, false);
 		core_info->clk_enable = false;
 		break;
-	case CAM_ICP_BPS_CMD_RESET:
+	case CAM_ICP_DEV_CMD_RESET:
 		rc = cam_bps_cmd_reset(soc_info, core_info);
 		break;
 	default:

Файлын зөрүү хэтэрхий том тул дарагдсан байна
+ 340 - 351
drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.c


+ 51 - 39
drivers/cam_icp/icp_hw/icp_hw_mgr/cam_icp_hw_mgr.h

@@ -46,13 +46,16 @@
 
 #define ICP_CLK_HW_IPE          0x0
 #define ICP_CLK_HW_BPS          0x1
-#define ICP_CLK_HW_MAX          0x2
+#define ICP_CLK_HW_OFE          0x2
+#define ICP_DEV_CLK_MAX         0x3
 
 #define ICP_OVER_CLK_THRESHOLD  5
+#define ICP_TWO_DEV_BW_SHARE_RATIO 2
 
 #define CPAS_IPE0_BIT           0x1000
 #define CPAS_IPE1_BIT           0x2000
 #define CPAS_BPS_BIT            0x400
+#define CPAS_ICP_BIT            0x1
 
 /* Used for targets >= 480 and its variants */
 #define CPAS_TITAN_IPE0_CAP_BIT 0x800
@@ -60,6 +63,7 @@
 #define ICP_PWR_CLP_BPS         0x00000001
 #define ICP_PWR_CLP_IPE0        0x00010000
 #define ICP_PWR_CLP_IPE1        0x00020000
+#define ICP_PWR_CLP_OFE         0x00000001
 
 #define CAM_ICP_CTX_STATE_FREE      0x0
 #define CAM_ICP_CTX_STATE_IN_USE    0x1
@@ -73,6 +77,22 @@
 
 #define CAM_ICP_HW_MGR_NAME_SIZE  32
 
+#define CAM_ICP_GET_HW_DEV_TYPE_FROM_HW_CLK_TYPE(hw_clk_type) \
+({                                                            \
+	(hw_clk_type) + (CAM_ICP_DEV_START_IDX);              \
+})
+
+#define CAM_ICP_GET_HW_CLK_TYPE_FROM_HW_DEV_TYPE(hw_dev_type) \
+({                                                            \
+	(hw_dev_type) - (CAM_ICP_DEV_START_IDX);              \
+})
+
+#define CAM_ICP_GET_DEV_INFO_IDX(hw_dev_type) ((hw_dev_type) - (CAM_ICP_DEV_START_IDX))
+#define CAM_ICP_IS_DEV_HW_EXIST(hw_cap_mask, hw_dev_type)  \
+({                                                         \
+	(hw_cap_mask) & BIT((hw_dev_type));                \
+})
+
 struct hfi_mini_dump_info;
 
 /**
@@ -205,6 +225,18 @@ struct cam_icp_ctx_perf_stats {
 	uint64_t total_requests;
 };
 
+/**
+ * struct cam_icp_hw_ctx_dev_info -
+ *        Info of ICP devices (IPE/BPS/OFE) that can be attached to a context
+ *
+ * @dev_ctxt_cnt : device context count
+ * @dev_clk_state: device clock state
+ */
+struct cam_icp_hw_ctx_dev_info {
+	uint32_t dev_ctxt_cnt;
+	bool dev_clk_state;
+};
+
 /**
  * struct hfi_frame_process_info
  * @hfi_frame_cmd: Frame process command info
@@ -290,8 +322,8 @@ struct cam_ctx_clk_info {
  * @last_flush_req: last flush req for this ctx
  * @perf_stats: performance statistics info
  * @evt_inject_params: Event injection data for hw_mgr_ctx
- * @unified_dev_type: Unified dev type which does not hold any priority info.
- *                    It's either IPE/BPS
+ * @hw_dev_type: hardware device type of this context
+ * @hw_clk_type: hardware clock type for this context
  * @abort_timed_out: Indicates if abort timed out
  */
 struct cam_icp_hw_ctx_data {
@@ -308,7 +340,7 @@ struct cam_icp_hw_ctx_data {
 	struct cam_icp_hw_ctx_data *chain_ctx;
 	struct hfi_frame_process_info hfi_frame_process;
 	struct completion wait_complete;
-	struct icp_dev_destroy temp_payload;
+	struct hfi_cmd_destroy temp_payload;
 	uint32_t ctx_id;
 	uint32_t bw_config_version;
 	struct cam_ctx_clk_info clk_info;
@@ -319,7 +351,8 @@ struct cam_icp_hw_ctx_data {
 	char ctx_id_string[128];
 	struct cam_icp_ctx_perf_stats perf_stats;
 	struct cam_hw_inject_evt_param evt_inject_params;
-	uint32_t unified_dev_type;
+	uint32_t hw_dev_type;
+	uint32_t hw_clk_type;
 	bool abort_timed_out;
 };
 
@@ -372,6 +405,8 @@ struct cam_icp_clk_info {
  * @hw_mgr_mutex: Mutex for ICP hardware manager
  * @hw_mgr_lock: Spinlock for ICP hardware manager
  * @devices: Devices of ICP hardware manager
+ * @icp_dev_intf: ICP device interface
+ * @hw_dev_cnt: count number of each hw type
  * @ctx_data: Context data
  * @icp_caps: ICP capabilities
  * @mini_dump_cb: Mini dump cb
@@ -392,8 +427,6 @@ struct cam_icp_clk_info {
  * @msg_work_data: Pointer to message work queue task
  * @timer_work_data: Pointer to timer work queue task
  * @ctxt_cnt: Active context count
- * @ipe_ctxt_cnt: IPE Active context count
- * @bps_ctxt_cnt: BPS Active context count
  * @dentry: Debugfs entry
  * @icp_pc_flag: Flag to enable/disable power collapse
  * @dev_pc_flag: Flag to enable/disable
@@ -408,15 +441,7 @@ struct cam_icp_clk_info {
  * @icp_dbg_lvl : debug level set to FW.
  * @icp_fw_dump_lvl : level set for dumping the FW data
  * @icp_fw_ramdump_lvl : level set for FW ram dumps
- * @ipe0_enable: Flag for IPE0
- * @ipe1_enable: Flag for IPE1
- * @bps_enable: Flag for BPS
- * @icp_dev_intf : Device interface for ICP
- * @ipe0_dev_intf: Device interface for IPE0
- * @ipe1_dev_intf: Device interface for IPE1
- * @bps_dev_intf: Device interface for BPS
- * @ipe_clk_state: IPE clock state flag
- * @bps_clk_state: BPS clock state flag
+ * @dev_info: book keeping info relevant to devices
  * @disable_ubwc_comp: Disable UBWC compression
  * @recovery: Flag to validate if in previous session FW
  *            reported a fatal error or wdt. If set FW is
@@ -425,12 +450,16 @@ struct cam_icp_clk_info {
  * @frame_in_process_ctx_id: Contxt id processing frame
  * @synx_signaling_en: core to core fencing is enabled
  *                     using synx
+ * @hw_cap_mask: device capability mask to indicate which devices type
+ *               are available in this hw mgr
  */
 struct cam_icp_hw_mgr {
 	struct mutex hw_mgr_mutex;
 	spinlock_t hw_mgr_lock;
 
-	struct cam_hw_intf **devices[CAM_ICP_DEV_MAX];
+	struct cam_hw_intf **devices[CAM_ICP_HW_MAX];
+	struct cam_hw_intf *icp_dev_intf;
+	uint32_t hw_dev_cnt[CAM_ICP_HW_MAX];
 	struct cam_icp_hw_ctx_data ctx_data[CAM_ICP_CTX_MAX];
 	struct cam_icp_query_cap_cmd icp_caps;
 	cam_icp_mini_dump_cb mini_dump_cb;
@@ -452,36 +481,27 @@ struct cam_icp_hw_mgr {
 	struct hfi_msg_work_data *msg_work_data;
 	struct hfi_msg_work_data *timer_work_data;
 	uint32_t ctxt_cnt;
-	uint32_t ipe_ctxt_cnt;
-	uint32_t bps_ctxt_cnt;
 	struct dentry *dentry;
 	bool icp_pc_flag;
 	bool dev_pc_flag;
 	bool icp_use_pil;
 	uint64_t icp_debug_clk;
 	uint64_t icp_default_clk;
-	struct cam_icp_clk_info clk_info[ICP_CLK_HW_MAX];
+	struct cam_icp_clk_info clk_info[ICP_DEV_CLK_MAX];
 	uint32_t secure_mode;
 	bool icp_jtag_debug;
 	u64 icp_debug_type;
 	u64 icp_dbg_lvl;
 	u64 icp_fw_dump_lvl;
 	u32 icp_fw_ramdump_lvl;
-	bool ipe0_enable;
-	bool ipe1_enable;
-	bool bps_enable;
-	struct cam_hw_intf *icp_dev_intf;
-	struct cam_hw_intf *ipe0_dev_intf;
-	struct cam_hw_intf *ipe1_dev_intf;
-	struct cam_hw_intf *bps_dev_intf;
-	bool ipe_clk_state;
-	bool bps_clk_state;
+	struct cam_icp_hw_ctx_dev_info dev_info[CAM_ICP_DEV_NUM];
 	bool disable_ubwc_comp;
 	atomic_t recovery;
 	uint64_t icp_svs_clk;
 	atomic_t frame_in_process;
 	int frame_in_process_ctx_id;
 	bool synx_signaling_en;
+	uint32_t hw_cap_mask;
 };
 
 /**
@@ -543,16 +563,12 @@ struct cam_icp_hw_ctx_mini_dump {
  * @ctx: Context for minidump
  * @hfi_info: hfi info
  * @hfi_mem_info: hfi mem info
+ * @dev_info: book keeping info relevant to devices
  * @fw_img: FW image
  * @recovery: To indicate if recovery is on
  * @icp_booted: Indicate if ICP is booted
  * @icp_resumed: Indicate if ICP is resumed
- * @ipe_clk_state: IPE Clk state
- * @bps_clk_state: BPS clk state
  * @disable_ubwc_comp: Indicate if ubws comp is disabled
- * @ipe0_enable: Is IPE0 enabled
- * @ipe1_enable: Is IPE1 enabled
- * @bps_enable:  Is BPS enabled
  * @icp_pc_flag: Is ICP PC enabled
  * @dev_pc_flag: Is IPE BPS PC enabled
  * @icp_use_pil: Is PIL used
@@ -561,17 +577,13 @@ struct cam_icp_hw_mini_dump_info {
 	struct cam_icp_hw_ctx_mini_dump   *ctx[CAM_ICP_CTX_MAX];
 	struct hfi_mini_dump_info          hfi_info;
 	struct icp_hfi_mem_info            hfi_mem_info;
+	struct cam_icp_hw_ctx_dev_info     dev_info[CAM_ICP_DEV_NUM];
 	void                              *fw_img;
 	uint32_t                           recovery;
 	uint32_t                           num_context;
 	bool                               icp_booted;
 	bool                               icp_resumed;
-	bool                               ipe_clk_state;
-	bool                               bps_clk_state;
 	bool                               disable_ubwc_comp;
-	bool                               ipe0_enable;
-	bool                               ipe1_enable;
-	bool                               bps_enable;
 	bool                               icp_pc_flag;
 	bool                               dev_pc_flag;
 	bool                               icp_use_pil;

+ 1 - 13
drivers/cam_icp/icp_hw/icp_hw_mgr/include/cam_bps_hw_intf.h

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef CAM_BPS_HW_INTF_H
@@ -11,18 +12,5 @@
 #include "cam_hw_mgr_intf.h"
 #include "cam_icp_hw_intf.h"
 
-enum cam_icp_bps_cmd_type {
-	CAM_ICP_BPS_CMD_FW_DOWNLOAD,
-	CAM_ICP_BPS_CMD_POWER_COLLAPSE,
-	CAM_ICP_BPS_CMD_POWER_RESUME,
-	CAM_ICP_BPS_CMD_SET_FW_BUF,
-	CAM_ICP_BPS_CMD_VOTE_CPAS,
-	CAM_ICP_BPS_CMD_CPAS_START,
-	CAM_ICP_BPS_CMD_CPAS_STOP,
-	CAM_ICP_BPS_CMD_UPDATE_CLK,
-	CAM_ICP_BPS_CMD_DISABLE_CLK,
-	CAM_ICP_BPS_CMD_RESET,
-	CAM_ICP_BPS_CMD_MAX,
-};
 
 #endif /* CAM_BPS_HW_INTF_H */

+ 20 - 4
drivers/cam_icp/icp_hw/icp_hw_mgr/include/cam_icp_hw_intf.h

@@ -23,15 +23,31 @@
 #define CAM_ICP_DUMP_STATUS_REGISTERS BIT(0)
 #define CAM_ICP_DUMP_CSR_REGISTERS    BIT(1)
 
-#define CAM_ICP_MAX_ICP_DEV_TYPE 2
+#define CAM_ICP_MAX_ICP_HW_TYPE 2
+#define CAM_ICP_DEV_START_IDX CAM_ICP_MAX_ICP_HW_TYPE
 
 enum cam_icp_hw_type {
-	CAM_ICP_DEV_ICP_V1,
-	CAM_ICP_DEV_ICP_V2,
+	CAM_ICP_HW_ICP_V1,
+	CAM_ICP_HW_ICP_V2,
 	CAM_ICP_DEV_IPE,
 	CAM_ICP_DEV_BPS,
 	CAM_ICP_DEV_OFE,
-	CAM_ICP_DEV_MAX,
+	CAM_ICP_HW_MAX,
+};
+
+#define CAM_ICP_DEV_NUM          (CAM_ICP_HW_MAX - CAM_ICP_DEV_START_IDX)
+
+enum cam_icp_dev_cmd_type {
+	CAM_ICP_DEV_CMD_POWER_COLLAPSE,
+	CAM_ICP_DEV_CMD_POWER_RESUME,
+	CAM_ICP_DEV_CMD_SET_FW_BUF,
+	CAM_ICP_DEV_CMD_VOTE_CPAS,
+	CAM_ICP_DEV_CMD_CPAS_START,
+	CAM_ICP_DEV_CMD_CPAS_STOP,
+	CAM_ICP_DEV_CMD_UPDATE_CLK,
+	CAM_ICP_DEV_CMD_DISABLE_CLK,
+	CAM_ICP_DEV_CMD_RESET,
+	CAM_ICP_DEV_CMD_MAX
 };
 
 enum cam_icp_cmd_type {

+ 1 - 13
drivers/cam_icp/icp_hw/icp_hw_mgr/include/cam_ipe_hw_intf.h

@@ -1,6 +1,7 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
  * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #ifndef CAM_IPE_HW_INTF_H
@@ -11,18 +12,5 @@
 #include "cam_hw_mgr_intf.h"
 #include "cam_icp_hw_intf.h"
 
-enum cam_icp_ipe_cmd_type {
-	CAM_ICP_IPE_CMD_FW_DOWNLOAD,
-	CAM_ICP_IPE_CMD_POWER_COLLAPSE,
-	CAM_ICP_IPE_CMD_POWER_RESUME,
-	CAM_ICP_IPE_CMD_SET_FW_BUF,
-	CAM_ICP_IPE_CMD_VOTE_CPAS,
-	CAM_ICP_IPE_CMD_CPAS_START,
-	CAM_ICP_IPE_CMD_CPAS_STOP,
-	CAM_ICP_IPE_CMD_UPDATE_CLK,
-	CAM_ICP_IPE_CMD_DISABLE_CLK,
-	CAM_ICP_IPE_CMD_RESET,
-	CAM_ICP_IPE_CMD_MAX,
-};
 
 #endif /* CAM_IPE_HW_INTF_H */

+ 0 - 13
drivers/cam_icp/icp_hw/icp_hw_mgr/include/cam_ofe_hw_intf.h

@@ -12,18 +12,5 @@
 #include "cam_hw_mgr_intf.h"
 #include "cam_icp_hw_intf.h"
 
-enum cam_icp_ofe_cmd_type {
-	CAM_ICP_OFE_CMD_FW_DOWNLOAD,
-	CAM_ICP_OFE_CMD_POWER_COLLAPSE,
-	CAM_ICP_OFE_CMD_POWER_RESUME,
-	CAM_ICP_OFE_CMD_SET_FW_BUF,
-	CAM_ICP_OFE_CMD_VOTE_CPAS,
-	CAM_ICP_OFE_CMD_CPAS_START,
-	CAM_ICP_OFE_CMD_CPAS_STOP,
-	CAM_ICP_OFE_CMD_UPDATE_CLK,
-	CAM_ICP_OFE_CMD_DISABLE_CLK,
-	CAM_ICP_OFE_CMD_RESET,
-	CAM_ICP_OFE_CMD_MAX,
-};
 
 #endif /* CAM_OFE_HW_INTF_H */

+ 25 - 11
drivers/cam_icp/icp_hw/icp_proc/cam_icp_proc.c

@@ -6,15 +6,17 @@
 #include "cam_debug_util.h"
 #include "cam_icp_proc.h"
 
+uint32_t icp_request_cnt[CAM_ICP_MAX_ICP_HW_TYPE];
+
 static int cam_icp_get_device_num(uint32_t dev_type, uint32_t *num_dev)
 {
 	int rc = 0;
 
 	switch (dev_type) {
-	case CAM_ICP_DEV_ICP_V1:
+	case CAM_ICP_HW_ICP_V1:
 		*num_dev = cam_icp_v1_get_device_num();
 		break;
-	case CAM_ICP_DEV_ICP_V2:
+	case CAM_ICP_HW_ICP_V2:
 		*num_dev = cam_icp_v2_get_device_num();
 		break;
 	default:
@@ -26,7 +28,7 @@ static int cam_icp_get_device_num(uint32_t dev_type, uint32_t *num_dev)
 }
 
 int cam_icp_alloc_processor_devs(struct device_node *np, int *icp_hw_type,
-	struct cam_hw_intf ***devices)
+	struct cam_hw_intf ***devices, uint32_t *hw_dev_cnt, uint32_t *dev_cap_cnt)
 {
 	uint32_t num_icp_found = 0, num_icp_listed;
 	int rc, i;
@@ -47,7 +49,8 @@ int cam_icp_alloc_processor_devs(struct device_node *np, int *icp_hw_type,
 		return -EINVAL;
 	}
 
-	for (i = 0; i < CAM_ICP_MAX_ICP_DEV_TYPE; i++) {
+	/* Only one version of ICP processor supported per ICP subdevice */
+	for (i = 0; i < CAM_ICP_MAX_ICP_HW_TYPE; i++) {
 		rc = cam_icp_get_device_num(i, &num_icp_found);
 		if (rc)
 			return rc;
@@ -58,15 +61,24 @@ int cam_icp_alloc_processor_devs(struct device_node *np, int *icp_hw_type,
 		}
 	}
 
-	if (i == CAM_ICP_MAX_ICP_DEV_TYPE) {
+	if (i == CAM_ICP_MAX_ICP_HW_TYPE) {
 		CAM_ERR(CAM_ICP, "No ICP device probed");
 		return -ENODEV;
 	}
 
-	if (num_icp_listed != num_icp_found) {
+	if (num_icp_found != dev_cap_cnt[i]) {
 		CAM_ERR(CAM_ICP,
-			"number of ICP devices do not match num_icp_listed: %d num_icp_found: %d",
-			num_icp_listed, num_icp_found);
+			"Number of ICP core probed: %u is not equal to CPAS supported devices: %u",
+			num_icp_found, dev_cap_cnt[i]);
+		return -EINVAL;
+	}
+
+	icp_request_cnt[i] += num_icp_listed;
+
+	if (icp_request_cnt[i] > num_icp_found) {
+		CAM_ERR(CAM_ICP,
+			"number of ICP_V%u total requested: %u exceeds number of icp hw available: %u",
+			i+1, icp_request_cnt[i], num_icp_found);
 		return -EINVAL;
 	}
 
@@ -78,8 +90,10 @@ int cam_icp_alloc_processor_devs(struct device_node *np, int *icp_hw_type,
 		return -ENOMEM;
 	}
 
+	hw_dev_cnt[i] = num_icp_listed;
+
 	CAM_DBG(CAM_ICP, "allocated device iface for %s",
-		*icp_hw_type == CAM_ICP_DEV_ICP_V1 ? "ICP_V1" : "ICP_V2");
+		i == CAM_ICP_HW_ICP_V1 ? "ICP_V1" : "ICP_V2");
 
 	return rc;
 }
@@ -89,10 +103,10 @@ int cam_icp_get_hfi_device_ops(uint32_t hw_type, const struct hfi_ops **hfi_proc
 	int rc = 0;
 
 	switch (hw_type) {
-	case CAM_ICP_DEV_ICP_V1:
+	case CAM_ICP_HW_ICP_V1:
 		cam_icp_v1_populate_hfi_ops(hfi_proc_ops);
 		break;
-	case CAM_ICP_DEV_ICP_V2:
+	case CAM_ICP_HW_ICP_V2:
 		cam_icp_v2_populate_hfi_ops(hfi_proc_ops);
 		break;
 	default:

+ 4 - 4
drivers/cam_icp/icp_hw/icp_proc/cam_icp_proc.h

@@ -7,15 +7,15 @@
 #include "cam_icp_v2_core.h"
 #include "hfi_intf.h"
 
-#define CAM_ICP_GET_PROC_DEV_INTF(devices) \
-(devices[CAM_ICP_DEV_ICP_V1] ? devices[CAM_ICP_DEV_ICP_V1][0] : \
-	devices[CAM_ICP_DEV_ICP_V2][0])
+#define CAM_ICP_GET_PROC_DEV_INTF(devices)                              \
+	(devices[CAM_ICP_HW_ICP_V1] ? devices[CAM_ICP_HW_ICP_V1][0] : \
+	devices[CAM_ICP_HW_ICP_V2][0])
 
 /**
  * @brief : Get ICP device type (ICP_V1/ICP_V2/...)
  */
 int cam_icp_alloc_processor_devs(struct device_node *np, int *icp_hw_type,
-	struct cam_hw_intf ***devices);
+	struct cam_hw_intf ***devices, uint32_t *hw_dev_cnt, uint32_t *dev_cap_cnt);
 
 /**
  * @brief : Get device operations per device type

+ 1 - 1
drivers/cam_icp/icp_hw/icp_proc/icp_common/cam_icp_soc_common.c

@@ -49,7 +49,7 @@ static int cam_icp_soc_ubwc_config_get(struct device_node *np,
 
 	rc = __ubwc_config_get(np, "ubwc-ipe-fetch-cfg", ubwc_cfg_ext->ipe_fetch);
 	if (rc) {
-		if (dev_type == CAM_ICP_DEV_ICP_V1) {
+		if (dev_type == CAM_ICP_HW_ICP_V1) {
 			rc = __ubwc_config_get(np, "ubwc-cfg", icp_soc_info->uconfig.ubwc_cfg);
 			if (rc)
 				return rc;

+ 2 - 2
drivers/cam_icp/icp_hw/icp_proc/icp_v1_hw/cam_icp_v1_dev.c

@@ -102,7 +102,7 @@ static int cam_icp_v1_soc_info_init(struct cam_hw_soc_info *soc_info,
 	soc_info->dev_name = pdev->name;
 	soc_info->soc_private = icp_soc_info;
 
-	icp_soc_info->dev_type = CAM_ICP_DEV_ICP_V1;
+	icp_soc_info->dev_type = CAM_ICP_HW_ICP_V1;
 
 	return 0;
 }
@@ -134,7 +134,7 @@ static int cam_icp_v1_component_bind(struct device *dev,
 	icp_v1_dev_intf->hw_ops.init = cam_icp_v1_init_hw;
 	icp_v1_dev_intf->hw_ops.deinit = cam_icp_v1_deinit_hw;
 	icp_v1_dev_intf->hw_ops.process_cmd = cam_icp_v1_process_cmd;
-	icp_v1_dev_intf->hw_type = CAM_ICP_DEV_ICP_V1;
+	icp_v1_dev_intf->hw_type = CAM_ICP_HW_ICP_V1;
 
 	CAM_DBG(CAM_ICP, "type %d index %d",
 		icp_v1_dev_intf->hw_type,

+ 2 - 2
drivers/cam_icp/icp_hw/icp_proc/icp_v2_hw/cam_icp_v2_dev.c

@@ -61,7 +61,7 @@ static int cam_icp_v2_soc_info_init(struct cam_hw_soc_info *soc_info,
 	soc_info->dev_name = pdev->name;
 	soc_info->soc_private = icp_soc_info;
 
-	icp_soc_info->dev_type = CAM_ICP_DEV_ICP_V2;
+	icp_soc_info->dev_type = CAM_ICP_HW_ICP_V2;
 
 	return 0;
 }
@@ -127,7 +127,7 @@ static int cam_icp_v2_component_bind(struct device *dev,
 		goto free_soc_info;
 
 	icp_v2_intf->hw_priv = icp_v2_info;
-	icp_v2_intf->hw_type = CAM_ICP_DEV_ICP_V2;
+	icp_v2_intf->hw_type = CAM_ICP_HW_ICP_V2;
 	icp_v2_intf->hw_idx = icp_v2_info->soc_info.index;
 	icp_v2_intf->hw_ops.init = cam_icp_v2_hw_init;
 	icp_v2_intf->hw_ops.deinit = cam_icp_v2_hw_deinit;

+ 9 - 9
drivers/cam_icp/icp_hw/ipe_hw/ipe_core.c

@@ -366,7 +366,7 @@ int cam_ipe_process_cmd(void *device_priv, uint32_t cmd_type,
 		return -EINVAL;
 	}
 
-	if (cmd_type >= CAM_ICP_IPE_CMD_MAX) {
+	if (cmd_type >= CAM_ICP_DEV_CMD_MAX) {
 		CAM_ERR(CAM_ICP, "Invalid command : %x", cmd_type);
 		return -EINVAL;
 	}
@@ -376,7 +376,7 @@ int cam_ipe_process_cmd(void *device_priv, uint32_t cmd_type,
 	hw_info = core_info->ipe_hw_info;
 
 	switch (cmd_type) {
-	case CAM_ICP_IPE_CMD_VOTE_CPAS: {
+	case CAM_ICP_DEV_CMD_VOTE_CPAS: {
 		struct cam_icp_cpas_vote *cpas_vote = cmd_args;
 
 		if (!cmd_args)
@@ -386,7 +386,7 @@ int cam_ipe_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	}
 
-	case CAM_ICP_IPE_CMD_CPAS_START: {
+	case CAM_ICP_DEV_CMD_CPAS_START: {
 		struct cam_icp_cpas_vote *cpas_vote = cmd_args;
 
 		if (!cmd_args)
@@ -400,19 +400,19 @@ int cam_ipe_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	}
 
-	case CAM_ICP_IPE_CMD_CPAS_STOP:
+	case CAM_ICP_DEV_CMD_CPAS_STOP:
 		if (core_info->cpas_start) {
 			cam_cpas_stop(core_info->cpas_handle);
 			core_info->cpas_start = false;
 		}
 		break;
-	case CAM_ICP_IPE_CMD_POWER_COLLAPSE:
+	case CAM_ICP_DEV_CMD_POWER_COLLAPSE:
 		rc = cam_ipe_handle_pc(ipe_dev);
 		break;
-	case CAM_ICP_IPE_CMD_POWER_RESUME:
+	case CAM_ICP_DEV_CMD_POWER_RESUME:
 		rc = cam_ipe_handle_resume(ipe_dev);
 		break;
-	case CAM_ICP_IPE_CMD_UPDATE_CLK: {
+	case CAM_ICP_DEV_CMD_UPDATE_CLK: {
 		struct cam_icp_clk_update_cmd *clk_upd_cmd = cmd_args;
 		struct cam_ahb_vote ahb_vote;
 		uint32_t clk_rate = clk_upd_cmd->curr_clk_rate;
@@ -457,12 +457,12 @@ int cam_ipe_process_cmd(void *device_priv, uint32_t cmd_type,
 		}
 		break;
 	}
-	case CAM_ICP_IPE_CMD_DISABLE_CLK:
+	case CAM_ICP_DEV_CMD_DISABLE_CLK:
 		if (core_info->clk_enable == true)
 			cam_ipe_toggle_clk(soc_info, false);
 		core_info->clk_enable = false;
 		break;
-	case CAM_ICP_IPE_CMD_RESET:
+	case CAM_ICP_DEV_CMD_RESET:
 		rc = cam_ipe_cmd_reset(soc_info, core_info);
 		break;
 	default:

+ 9 - 9
drivers/cam_icp/icp_hw/ofe_hw/ofe_core.c

@@ -365,7 +365,7 @@ int cam_ofe_process_cmd(void *device_priv, uint32_t cmd_type,
 		return -EINVAL;
 	}
 
-	if (cmd_type >= CAM_ICP_OFE_CMD_MAX) {
+	if (cmd_type >= CAM_ICP_DEV_CMD_MAX) {
 		CAM_ERR(CAM_ICP, "Invalid command : %x", cmd_type);
 		return -EINVAL;
 	}
@@ -375,7 +375,7 @@ int cam_ofe_process_cmd(void *device_priv, uint32_t cmd_type,
 	hw_info = core_info->ofe_hw_info;
 
 	switch (cmd_type) {
-	case CAM_ICP_OFE_CMD_VOTE_CPAS: {
+	case CAM_ICP_DEV_CMD_VOTE_CPAS: {
 		struct cam_icp_cpas_vote *cpas_vote = cmd_args;
 
 		if (!cmd_args) {
@@ -387,7 +387,7 @@ int cam_ofe_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	}
 
-	case CAM_ICP_OFE_CMD_CPAS_START: {
+	case CAM_ICP_DEV_CMD_CPAS_START: {
 		struct cam_icp_cpas_vote *cpas_vote = cmd_args;
 
 		if (!cmd_args) {
@@ -404,19 +404,19 @@ int cam_ofe_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	}
 
-	case CAM_ICP_OFE_CMD_CPAS_STOP:
+	case CAM_ICP_DEV_CMD_CPAS_STOP:
 		if (core_info->cpas_start) {
 			cam_cpas_stop(core_info->cpas_handle);
 			core_info->cpas_start = false;
 		}
 		break;
-	case CAM_ICP_OFE_CMD_POWER_COLLAPSE:
+	case CAM_ICP_DEV_CMD_POWER_COLLAPSE:
 		rc = cam_ofe_handle_pc(ofe_dev);
 		break;
-	case CAM_ICP_OFE_CMD_POWER_RESUME:
+	case CAM_ICP_DEV_CMD_POWER_RESUME:
 		rc = cam_ofe_handle_resume(ofe_dev);
 		break;
-	case CAM_ICP_OFE_CMD_UPDATE_CLK: {
+	case CAM_ICP_DEV_CMD_UPDATE_CLK: {
 		struct cam_icp_clk_update_cmd *clk_upd_cmd = cmd_args;
 		struct cam_ahb_vote ahb_vote;
 		uint32_t clk_rate = clk_upd_cmd->curr_clk_rate;
@@ -460,12 +460,12 @@ int cam_ofe_process_cmd(void *device_priv, uint32_t cmd_type,
 		}
 		break;
 	}
-	case CAM_ICP_OFE_CMD_DISABLE_CLK:
+	case CAM_ICP_DEV_CMD_DISABLE_CLK:
 		if (core_info->clk_enable)
 			cam_ofe_toggle_clk(soc_info, false);
 		core_info->clk_enable = false;
 		break;
-	case CAM_ICP_OFE_CMD_RESET:
+	case CAM_ICP_DEV_CMD_RESET:
 		rc = cam_ofe_cmd_reset(soc_info, core_info);
 		break;
 	default:

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