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video: driver: keep all platform common api in a single file

Kaynağa Gözat 
update msm_vidc_platform.c to keep all common API's
and macro's in a single file to avoid redundancy.

Change-Id: I43869f54514ab8c531b6e27b84ce0a6c1f1806ce
Signed-off-by: Ankush Mitra <quic_ankumitr@quicinc.com>
Bu işleme şunda yer alıyor:
Ankush Mitra
2022-02-18 11:13:33 +05:30
işlemeyi yapan: Gerrit - the friendly Code Review server
ebeveyn 0abd877e95
işleme 6d48bb4854
5 değiştirilmiş dosya ile 156 ekleme ve 74 silme
Yama Dosyasını İndir Diff Dosyasını İndir Tüm dosyaları genişlet Tüm dosyaları daralt

5
Kbuild
Dosyayı Görüntüle

@@ -16,6 +16,7 @@ endif
LINUXINCLUDE += -I$(VIDEO_ROOT)/driver/vidc/inc \
-I$(VIDEO_ROOT)/driver/platform/common/inc \
-I$(VIDEO_ROOT)/include/uapi/vidc
USERINCLUDE += -I$(VIDEO_ROOT)/include/uapi/vidc/media \
@@ -56,10 +57,10 @@ msm_video-objs += driver/vidc/src/msm_vidc_v4l2.o \
driver/vidc/src/msm_vidc_power.o \
driver/vidc/src/msm_vidc_probe.o \
driver/vidc/src/msm_vidc_dt.o \
driver/vidc/src/msm_vidc_platform.o \
driver/vidc/src/msm_vidc_debug.o \
driver/vidc/src/msm_vidc_memory.o \
driver/vidc/src/msm_vidc_fence.o \
driver/vidc/src/venus_hfi.o \
driver/vidc/src/hfi_packet.o \
driver/vidc/src/venus_hfi_response.o
driver/vidc/src/venus_hfi_response.o \
driver/platform/common/src/msm_vidc_platform.o

36
driver/vidc/inc/msm_vidc_platform.h → driver/platform/common/inc/msm_vidc_platform.h
Dosyayı Görüntüle

@@ -7,9 +7,39 @@
#define _MSM_VIDC_PLATFORM_H_
#include <linux/platform_device.h>
#include <media/v4l2-ctrls.h>
#include "msm_vidc_internal.h"
#include <media/v4l2-ctrls.h>
#include "msm_vidc_core.h"
#define DDR_TYPE_LPDDR4 0x6
#define DDR_TYPE_LPDDR4X 0x7
#define DDR_TYPE_LPDDR5 0x8
#define DDR_TYPE_LPDDR5X 0x9
#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \
{ \
.max_channels = mc, \
.mal_length = ml, \
.highest_bank_bit = hbb, \
.bank_swzl_level = bs1, \
.bank_swz2_level = bs2, \
.bank_swz3_level = bs3, \
.bank_spreading = bsp, \
}
#define EFUSE_ENTRY(sa, s, m, sh, p) \
{ \
.start_address = sa, \
.size = s, \
.mask = m, \
.shift = sh, \
.purpose = p \
}
extern u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS];
extern u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS];
extern u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS];
struct msm_platform_core_capability {
enum msm_vidc_core_capability_type type;
@@ -79,5 +109,9 @@ struct msm_vidc_platform {
int msm_vidc_init_platform(struct platform_device *pdev);
int msm_vidc_deinit_platform(struct platform_device *pdev);
int msm_vidc_read_efuse(struct msm_vidc_core *core);
void msm_vidc_sort_table(struct msm_vidc_core *core);
void msm_vidc_ddr_ubwc_config(
struct msm_vidc_platform_data *platform_data, u32 hbb_override_val);
#endif // _MSM_VIDC_PLATFORM_H_

118
driver/vidc/src/msm_vidc_platform.c → driver/platform/common/src/msm_vidc_platform.c
Dosyayı Görüntüle

@@ -1,16 +1,22 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/of_platform.h>
#include <soc/qcom/of_common.h>
#include <linux/io.h>
#include <linux/sort.h>
#include "msm_vidc_platform.h"
#include "msm_vidc_debug.h"
#include "msm_vidc_v4l2.h"
#include "msm_vidc_vb2.h"
#include "msm_vidc_control.h"
#include "msm_vidc_core.h"
#include "msm_vidc_dt.h"
#include "msm_vidc_debug.h"
#include "msm_vidc_internal.h"
#if defined(CONFIG_MSM_VIDC_WAIPIO)
#include "msm_vidc_waipio.h"
#endif
@@ -24,6 +30,26 @@
#include "msm_vidc_iris3.h"
#endif
/*
* Custom conversion coefficients for resolution: 176x144 negative
* coeffs are converted to s4.9 format
* (e.g. -22 converted to ((1 << 13) - 22)
* 3x3 transformation matrix coefficients in s4.9 fixed point format
*/
u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = {
440, 8140, 8098, 0, 460, 52, 0, 34, 463
};
/* offset coefficients in s9 fixed point format */
u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = {
53, 0, 4
};
/* clamping value for Y/U/V([min,max] for Y/U/V) */
u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = {
16, 235, 16, 240, 16, 240
};
static struct v4l2_file_operations msm_v4l2_file_operations = {
.owner = THIS_MODULE,
.open = msm_v4l2_open,
@@ -364,3 +390,91 @@ int msm_vidc_init_platform(struct platform_device *pdev)
return rc;
}
int msm_vidc_read_efuse(struct msm_vidc_core *core)
{
int rc = 0;
void __iomem *base;
u32 i = 0, efuse = 0, efuse_data_count = 0;
struct msm_vidc_efuse_data *efuse_data = NULL;
struct msm_vidc_platform_data *platform_data;
if (!core || !core->platform || !core->pdev) {
d_vpr_e("%s: invalid params\n", __func__);
return -EINVAL;
}
platform_data = &core->platform->data;
efuse_data = platform_data->efuse_data;
efuse_data_count = platform_data->efuse_data_size;
if (!efuse_data)
return 0;
for (i = 0; i < efuse_data_count; i++) {
switch (efuse_data[i].purpose) {
case SKU_VERSION:
base = devm_ioremap(&core->pdev->dev, efuse_data[i].start_address,
efuse_data[i].size);
if (!base) {
d_vpr_e("failed efuse: start %#x, size %d\n",
efuse_data[i].start_address,
efuse_data[i].size);
return -EINVAL;
}
efuse = readl_relaxed(base);
platform_data->sku_version =
(efuse & efuse_data[i].mask) >>
efuse_data[i].shift;
break;
default:
break;
}
if (platform_data->sku_version) {
d_vpr_h("efuse 0x%x, platform version 0x%x\n",
efuse, platform_data->sku_version);
break;
}
}
return rc;
}
void msm_vidc_ddr_ubwc_config(
struct msm_vidc_platform_data *platform_data, u32 hbb_override_val)
{
uint32_t ddr_type = DDR_TYPE_LPDDR5;
if (!platform_data || !platform_data->ubwc_config) {
d_vpr_e("%s: invalid params\n", __func__);
return;
}
ddr_type = of_fdt_get_ddrtype();
if (ddr_type == -ENOENT)
d_vpr_e("Failed to get ddr type, use LPDDR5\n");
if (platform_data->ubwc_config &&
(ddr_type == DDR_TYPE_LPDDR4 ||
ddr_type == DDR_TYPE_LPDDR4X))
platform_data->ubwc_config->highest_bank_bit = hbb_override_val;
d_vpr_h("DDR Type 0x%x hbb 0x%x\n",
ddr_type, platform_data->ubwc_config ?
platform_data->ubwc_config->highest_bank_bit : -1);
}
void msm_vidc_sort_table(struct msm_vidc_core *core)
{
u32 i = 0;
if (!core || !core->dt || !core->dt->allowed_clks_tbl) {
d_vpr_e("%s: invalid params\n", __func__);
return;
}
sort(core->dt->allowed_clks_tbl, core->dt->allowed_clks_tbl_size,
sizeof(*core->dt->allowed_clks_tbl), cmp, NULL);
d_vpr_h("Updated allowed clock rates\n");
for (i = 0; i < core->dt->allowed_clks_tbl_size; i++)
d_vpr_h(" %d\n", core->dt->allowed_clks_tbl[i]);
}

36
driver/platform/kalama/src/msm_vidc_kalama.c
Dosyayı Görüntüle

@@ -10,7 +10,6 @@
#include "msm_vidc_platform.h"
#include "msm_vidc_debug.h"
#include "msm_vidc_internal.h"
#include "msm_vidc_core.h"
#include "msm_vidc_control.h"
#include "hfi_property.h"
#include "msm_vidc_iris3.h"
@@ -34,17 +33,6 @@
#define MAX_SLICE_MB_SIZE \
(((4096 + 15) >> 4) * ((2304 + 15) >> 4))
#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \
{ \
.max_channels = mc, \
.mal_length = ml, \
.highest_bank_bit = hbb, \
.bank_swzl_level = bs1, \
.bank_swz2_level = bs2, \
.bank_swz3_level = bs3, \
.bank_spreading = bsp, \
}
#define ENC MSM_VIDC_ENCODER
#define DEC MSM_VIDC_DECODER
#define H264 MSM_VIDC_H264
@@ -55,10 +43,6 @@
#define CODECS_ALL (H264 | HEVC | VP9 | HEIC | AV1)
#define MAXIMUM_OVERRIDE_VP9_FPS 120
/* from of.h */
#define DDR_TYPE_LPDDR5 0x8
#define DDR_TYPE_LPDDR5X 0x9
static struct msm_platform_core_capability core_data_kalama[] = {
/* {type, value} */
{ENC_CODECS, H264|HEVC|HEIC},
@@ -2014,26 +1998,6 @@ static struct msm_platform_inst_capability instance_data_kalama[] = {
CAP_FLAG_BITMASK},
};
/*
* Custom conversion coefficients for resolution: 176x144 negative
* coeffs are converted to s4.9 format
* (e.g. -22 converted to ((1 << 13) - 22)
* 3x3 transformation matrix coefficients in s4.9 fixed point format
*/
static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = {
440, 8140, 8098, 0, 460, 52, 0, 34, 463
};
/* offset coefficients in s9 fixed point format */
static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = {
53, 0, 4
};
/* clamping value for Y/U/V([min,max] for Y/U/V) */
static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = {
16, 235, 16, 240, 16, 240
};
/* Default UBWC config for LPDDR5 */
static struct msm_vidc_ubwc_config_data ubwc_config_kalama[] = {
UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1),

35
driver/platform/waipio/src/msm_vidc_waipio.c
Dosyayı Görüntüle

@@ -1,6 +1,7 @@
// SPDX-License-Identifier: GPL-2.0-only
/*
* Copyright (c) 2020-2021,, The Linux Foundation. All rights reserved.
* Copyright (c) 2020-2021, The Linux Foundation. All rights reserved.
* Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
*/
#include <linux/of.h>
@@ -9,7 +10,6 @@
#include "msm_vidc_platform.h"
#include "msm_vidc_debug.h"
#include "msm_vidc_internal.h"
#include "msm_vidc_core.h"
#include "msm_vidc_control.h"
#include "hfi_property.h"
@@ -31,17 +31,6 @@
#define MAX_SLICE_MB_SIZE \
(((4096 + 15) >> 4) * ((2304 + 15) >> 4))
#define UBWC_CONFIG(mc, ml, hbb, bs1, bs2, bs3, bsp) \
{ \
.max_channels = mc, \
.mal_length = ml, \
.highest_bank_bit = hbb, \
.bank_swzl_level = bs1, \
.bank_swz2_level = bs2, \
.bank_swz3_level = bs3, \
.bank_spreading = bsp, \
}
#define ENC MSM_VIDC_ENCODER
#define DEC MSM_VIDC_DECODER
#define H264 MSM_VIDC_H264
@@ -1859,26 +1848,6 @@ static struct msm_platform_inst_capability instance_data_waipio[] = {
CAP_FLAG_BITMASK},
};
/*
* Custom conversion coefficients for resolution: 176x144 negative
* coeffs are converted to s4.9 format
* (e.g. -22 converted to ((1 << 13) - 22)
* 3x3 transformation matrix coefficients in s4.9 fixed point format
*/
static u32 vpe_csc_custom_matrix_coeff[MAX_MATRIX_COEFFS] = {
440, 8140, 8098, 0, 460, 52, 0, 34, 463
};
/* offset coefficients in s9 fixed point format */
static u32 vpe_csc_custom_bias_coeff[MAX_BIAS_COEFFS] = {
53, 0, 4
};
/* clamping value for Y/U/V([min,max] for Y/U/V) */
static u32 vpe_csc_custom_limit_coeff[MAX_LIMIT_COEFFS] = {
16, 235, 16, 240, 16, 240
};
/* Default UBWC config for LPDDR5 */
static struct msm_vidc_ubwc_config_data ubwc_config_waipio[] = {
UBWC_CONFIG(8, 32, 16, 0, 1, 1, 1),