disp: msm: sde: fix dcwb idx selection for pp_dither and CTL blocks

When cwb is triggered on built-in display secondary display
with (1,1,1) topology, improper dcwb_idx value is passed
to pp_dither and CTL registers. This change populates proper
dcwb_idx during pp block dt parsing and passes the same for
programming.

Change-Id: I543eede6f5fd9c2c80799503e3639ea9e89058ca
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>

msm/sde/sde_hw_pingpong.h

@@ -1,5 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
+ * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -163,6 +164,9 @@ struct sde_hw_pingpong {
 	enum sde_pingpong idx;
 	const struct sde_pingpong_cfg *caps;
 
+	/* associated dcwb idx */
+	enum sde_dcwb dcwb_idx;
+
 	/* associated 3d_merge */
 	struct sde_hw_merge_3d *merge_3d;