disp: msm: sde: fix dcwb idx selection for pp_dither and CTL blocks

When cwb is triggered on built-in display secondary display
with (1,1,1) topology, improper dcwb_idx value is passed
to pp_dither and CTL registers. This change populates proper
dcwb_idx during pp block dt parsing and passes the same for
programming.

Change-Id: I543eede6f5fd9c2c80799503e3639ea9e89058ca
Signed-off-by: Mahadevan <quic_mahap@quicinc.com>

msm/sde/sde_hw_pingpong.c

@@ -515,6 +515,7 @@ struct sde_hw_blk_reg_map *sde_hw_pingpong_init(enum sde_pingpong idx,
 
 	c->idx = idx;
 	c->caps = cfg;
+	c->dcwb_idx = cfg->dcwb_id;
 	if (test_bit(SDE_PINGPONG_MERGE_3D, &cfg->features)) {
 		c->merge_3d = _sde_pp_merge_3d_init(cfg->merge_3d_id, addr, m);
 			if (IS_ERR(c->merge_3d)) {