qcacmn: Add code to remove void pointer usage
Add code to remove void pointer usage for hal_soc and introduce opaque pointer to be used intead of void from dp layer into hal layer Change-Id: Ia38571174c6ed79558d0f0c9cd1a0f4afaa66483 CRs-Fixed: 2480857
此提交包含在:
@@ -1,5 +1,5 @@
|
||||
/*
|
||||
* Copyright (c) 2016-2018 The Linux Foundation. All rights reserved.
|
||||
* Copyright (c) 2016-2019 The Linux Foundation. All rights reserved.
|
||||
*
|
||||
* Permission to use, copy, modify, and/or distribute this software for
|
||||
* any purpose with or without fee is hereby granted, provided that the
|
||||
@@ -395,18 +395,19 @@ inline void hal_reo_cmd_set_descr_addr(uint32_t *reo_desc,
|
||||
}
|
||||
}
|
||||
|
||||
inline int hal_reo_cmd_queue_stats(void *reo_ring, struct hal_soc *soc,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
inline int hal_reo_cmd_queue_stats(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
|
||||
{
|
||||
uint32_t *reo_desc, val;
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
|
||||
hal_srng_access_start(soc, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(soc, reo_ring);
|
||||
hal_srng_access_start(hal_soc_hdl, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
|
||||
if (!reo_desc) {
|
||||
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Out of cmd ring entries", __func__);
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
@@ -430,7 +431,7 @@ inline int hal_reo_cmd_queue_stats(void *reo_ring, struct hal_soc *soc,
|
||||
HAL_DESC_SET_FIELD(reo_desc, REO_GET_QUEUE_STATS_2, CLEAR_STATS,
|
||||
cmd->u.stats_params.clear);
|
||||
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
|
||||
val = reo_desc[CMD_HEADER_DW_OFFSET];
|
||||
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
|
||||
@@ -438,17 +439,18 @@ inline int hal_reo_cmd_queue_stats(void *reo_ring, struct hal_soc *soc,
|
||||
}
|
||||
qdf_export_symbol(hal_reo_cmd_queue_stats);
|
||||
|
||||
inline int hal_reo_cmd_flush_queue(void *reo_ring, struct hal_soc *soc,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
inline int hal_reo_cmd_flush_queue(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
{
|
||||
uint32_t *reo_desc, val;
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
|
||||
hal_srng_access_start(soc, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(soc, reo_ring);
|
||||
hal_srng_access_start(hal_soc_hdl, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
|
||||
if (!reo_desc) {
|
||||
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Out of cmd ring entries", __func__);
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
@@ -477,44 +479,45 @@ inline int hal_reo_cmd_flush_queue(void *reo_ring, struct hal_soc *soc,
|
||||
BLOCK_RESOURCE_INDEX, cmd->u.fl_queue_params.index);
|
||||
}
|
||||
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
val = reo_desc[CMD_HEADER_DW_OFFSET];
|
||||
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
|
||||
val);
|
||||
}
|
||||
qdf_export_symbol(hal_reo_cmd_flush_queue);
|
||||
|
||||
inline int hal_reo_cmd_flush_cache(void *reo_ring, struct hal_soc *soc,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
inline int hal_reo_cmd_flush_cache(void *reo_ring, hal_soc_handle_t hal_soc_hdl,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
{
|
||||
uint32_t *reo_desc, val;
|
||||
struct hal_reo_cmd_flush_cache_params *cp;
|
||||
uint8_t index = 0;
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
|
||||
cp = &cmd->u.fl_cache_params;
|
||||
|
||||
hal_srng_access_start(soc, reo_ring);
|
||||
hal_srng_access_start(hal_soc_hdl, reo_ring);
|
||||
|
||||
/* We need a cache block resource for this operation, and REO HW has
|
||||
* only 4 such blocking resources. These resources are managed using
|
||||
* reo_res_bitmap, and we return failure if none is available.
|
||||
*/
|
||||
if (cp->block_use_after_flush) {
|
||||
index = hal_find_zero_bit(soc->reo_res_bitmap);
|
||||
index = hal_find_zero_bit(hal_soc->reo_res_bitmap);
|
||||
if (index > 3) {
|
||||
qdf_print("%s, No blocking resource available!",
|
||||
__func__);
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
return -EBUSY;
|
||||
}
|
||||
soc->index = index;
|
||||
hal_soc->index = index;
|
||||
}
|
||||
|
||||
reo_desc = hal_srng_src_get_next(soc, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
|
||||
if (!reo_desc) {
|
||||
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Out of cmd ring entries", __func__);
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
hal_srng_dump(reo_ring);
|
||||
return -EBUSY;
|
||||
}
|
||||
@@ -557,37 +560,39 @@ inline int hal_reo_cmd_flush_cache(void *reo_ring, struct hal_soc *soc,
|
||||
HAL_DESC_SET_FIELD(reo_desc, REO_FLUSH_CACHE_2, FLUSH_ENTIRE_CACHE,
|
||||
cp->flush_all);
|
||||
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
val = reo_desc[CMD_HEADER_DW_OFFSET];
|
||||
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
|
||||
val);
|
||||
}
|
||||
qdf_export_symbol(hal_reo_cmd_flush_cache);
|
||||
|
||||
inline int hal_reo_cmd_unblock_cache(void *reo_ring, struct hal_soc *soc,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
inline int hal_reo_cmd_unblock_cache(void *reo_ring,
|
||||
hal_soc_handle_t hal_soc_hdl,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t *reo_desc, val;
|
||||
uint8_t index = 0;
|
||||
|
||||
hal_srng_access_start(soc, reo_ring);
|
||||
hal_srng_access_start(hal_soc_hdl, reo_ring);
|
||||
|
||||
if (cmd->u.unblk_cache_params.type == UNBLOCK_RES_INDEX) {
|
||||
index = hal_find_one_bit(soc->reo_res_bitmap);
|
||||
index = hal_find_one_bit(hal_soc->reo_res_bitmap);
|
||||
if (index > 3) {
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
qdf_print("%s: No blocking resource to unblock!",
|
||||
__func__);
|
||||
return -EBUSY;
|
||||
}
|
||||
}
|
||||
|
||||
reo_desc = hal_srng_src_get_next(soc, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
|
||||
if (!reo_desc) {
|
||||
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Out of cmd ring entries", __func__);
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
@@ -613,24 +618,26 @@ inline int hal_reo_cmd_unblock_cache(void *reo_ring, struct hal_soc *soc,
|
||||
cmd->u.unblk_cache_params.index);
|
||||
}
|
||||
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
val = reo_desc[CMD_HEADER_DW_OFFSET];
|
||||
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
|
||||
val);
|
||||
}
|
||||
qdf_export_symbol(hal_reo_cmd_unblock_cache);
|
||||
|
||||
inline int hal_reo_cmd_flush_timeout_list(void *reo_ring, struct hal_soc *soc,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
inline int hal_reo_cmd_flush_timeout_list(void *reo_ring,
|
||||
hal_soc_handle_t hal_soc_hdl,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t *reo_desc, val;
|
||||
|
||||
hal_srng_access_start(soc, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(soc, reo_ring);
|
||||
hal_srng_access_start(hal_soc_hdl, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
|
||||
if (!reo_desc) {
|
||||
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Out of cmd ring entries", __func__);
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
@@ -658,27 +665,29 @@ inline int hal_reo_cmd_flush_timeout_list(void *reo_ring, struct hal_soc *soc,
|
||||
MINIMUM_FORWARD_BUF_COUNT,
|
||||
cmd->u.fl_tim_list_params.min_fwd_buf);
|
||||
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
val = reo_desc[CMD_HEADER_DW_OFFSET];
|
||||
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
|
||||
val);
|
||||
}
|
||||
qdf_export_symbol(hal_reo_cmd_flush_timeout_list);
|
||||
|
||||
inline int hal_reo_cmd_update_rx_queue(void *reo_ring, struct hal_soc *soc,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
inline int hal_reo_cmd_update_rx_queue(void *reo_ring,
|
||||
hal_soc_handle_t hal_soc_hdl,
|
||||
struct hal_reo_cmd_params *cmd)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t *reo_desc, val;
|
||||
struct hal_reo_cmd_update_queue_params *p;
|
||||
|
||||
p = &cmd->u.upd_queue_params;
|
||||
|
||||
hal_srng_access_start(soc, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(soc, reo_ring);
|
||||
hal_srng_access_start(hal_soc_hdl, reo_ring);
|
||||
reo_desc = hal_srng_src_get_next(hal_soc, reo_ring);
|
||||
if (!reo_desc) {
|
||||
QDF_TRACE(QDF_MODULE_ID_TXRX, QDF_TRACE_LEVEL_DEBUG,
|
||||
"%s: Out of cmd ring entries", __func__);
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
return -EBUSY;
|
||||
}
|
||||
|
||||
@@ -866,17 +875,19 @@ inline int hal_reo_cmd_update_rx_queue(void *reo_ring, struct hal_soc *soc,
|
||||
HAL_DESC_SET_FIELD(reo_desc, REO_UPDATE_RX_REO_QUEUE_8,
|
||||
PN_127_96, p->pn_127_96);
|
||||
|
||||
hal_srng_access_end(soc, reo_ring);
|
||||
hal_srng_access_end(hal_soc, reo_ring);
|
||||
val = reo_desc[CMD_HEADER_DW_OFFSET];
|
||||
return HAL_GET_FIELD(UNIFORM_REO_CMD_HEADER_0, REO_CMD_NUMBER,
|
||||
val);
|
||||
}
|
||||
qdf_export_symbol(hal_reo_cmd_update_rx_queue);
|
||||
|
||||
inline void hal_reo_queue_stats_status(uint32_t *reo_desc,
|
||||
struct hal_reo_queue_status *st,
|
||||
struct hal_soc *hal_soc)
|
||||
inline void
|
||||
hal_reo_queue_stats_status(uint32_t *reo_desc,
|
||||
struct hal_reo_queue_status *st,
|
||||
hal_soc_handle_t hal_soc_hdl)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t val;
|
||||
|
||||
/* Offsets of descriptor fields defined in HW headers start
|
||||
@@ -1066,10 +1077,12 @@ inline void hal_reo_queue_stats_status(uint32_t *reo_desc,
|
||||
}
|
||||
qdf_export_symbol(hal_reo_queue_stats_status);
|
||||
|
||||
inline void hal_reo_flush_queue_status(uint32_t *reo_desc,
|
||||
struct hal_reo_flush_queue_status *st,
|
||||
struct hal_soc *hal_soc)
|
||||
inline void
|
||||
hal_reo_flush_queue_status(uint32_t *reo_desc,
|
||||
struct hal_reo_flush_queue_status *st,
|
||||
hal_soc_handle_t hal_soc_hdl)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t val;
|
||||
|
||||
/* Offsets of descriptor fields defined in HW headers start
|
||||
@@ -1088,10 +1101,12 @@ inline void hal_reo_flush_queue_status(uint32_t *reo_desc,
|
||||
}
|
||||
qdf_export_symbol(hal_reo_flush_queue_status);
|
||||
|
||||
inline void hal_reo_flush_cache_status(uint32_t *reo_desc, struct hal_soc *soc,
|
||||
struct hal_reo_flush_cache_status *st,
|
||||
struct hal_soc *hal_soc)
|
||||
inline void
|
||||
hal_reo_flush_cache_status(uint32_t *reo_desc,
|
||||
struct hal_reo_flush_cache_status *st,
|
||||
hal_soc_handle_t hal_soc_hdl)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t val;
|
||||
|
||||
/* Offsets of descriptor fields defined in HW headers start
|
||||
@@ -1115,7 +1130,8 @@ inline void hal_reo_flush_cache_status(uint32_t *reo_desc, struct hal_soc *soc,
|
||||
BLOCK_ERROR_DETAILS,
|
||||
val);
|
||||
if (!st->block_error)
|
||||
qdf_set_bit(soc->index, (unsigned long *)&soc->reo_res_bitmap);
|
||||
qdf_set_bit(hal_soc->index,
|
||||
(unsigned long *)&hal_soc->reo_res_bitmap);
|
||||
|
||||
/* cache flush status */
|
||||
val = reo_desc[HAL_OFFSET_DW(REO_FLUSH_CACHE_STATUS_2,
|
||||
@@ -1144,9 +1160,10 @@ inline void hal_reo_flush_cache_status(uint32_t *reo_desc, struct hal_soc *soc,
|
||||
qdf_export_symbol(hal_reo_flush_cache_status);
|
||||
|
||||
inline void hal_reo_unblock_cache_status(uint32_t *reo_desc,
|
||||
struct hal_soc *soc,
|
||||
hal_soc_handle_t hal_soc_hdl,
|
||||
struct hal_reo_unblk_cache_status *st)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t val;
|
||||
|
||||
/* Offsets of descriptor fields defined in HW headers start
|
||||
@@ -1155,7 +1172,7 @@ inline void hal_reo_unblock_cache_status(uint32_t *reo_desc,
|
||||
|
||||
/* header */
|
||||
hal_reo_status_get_header(reo_desc, HAL_REO_UNBLK_CACHE_STATUS_TLV,
|
||||
&(st->header), soc);
|
||||
&st->header, hal_soc);
|
||||
|
||||
/* error bit */
|
||||
val = reo_desc[HAL_OFFSET_DW(REO_UNBLOCK_CACHE_STATUS_2,
|
||||
@@ -1172,17 +1189,18 @@ inline void hal_reo_unblock_cache_status(uint32_t *reo_desc,
|
||||
val);
|
||||
|
||||
if (!st->error && (st->unblock_type == UNBLOCK_RES_INDEX))
|
||||
qdf_clear_bit(soc->index,
|
||||
(unsigned long *)&soc->reo_res_bitmap);
|
||||
qdf_clear_bit(hal_soc->index,
|
||||
(unsigned long *)&hal_soc->reo_res_bitmap);
|
||||
}
|
||||
qdf_export_symbol(hal_reo_unblock_cache_status);
|
||||
|
||||
inline void hal_reo_flush_timeout_list_status(
|
||||
uint32_t *reo_desc,
|
||||
struct hal_reo_flush_timeout_list_status *st,
|
||||
struct hal_soc *hal_soc)
|
||||
hal_soc_handle_t hal_soc_hdl)
|
||||
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t val;
|
||||
|
||||
/* Offsets of descriptor fields defined in HW headers start
|
||||
@@ -1226,8 +1244,9 @@ qdf_export_symbol(hal_reo_flush_timeout_list_status);
|
||||
inline void hal_reo_desc_thres_reached_status(
|
||||
uint32_t *reo_desc,
|
||||
struct hal_reo_desc_thres_reached_status *st,
|
||||
struct hal_soc *hal_soc)
|
||||
hal_soc_handle_t hal_soc_hdl)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
uint32_t val;
|
||||
|
||||
/* Offsets of descriptor fields defined in HW headers start
|
||||
@@ -1283,10 +1302,13 @@ inline void hal_reo_desc_thres_reached_status(
|
||||
}
|
||||
qdf_export_symbol(hal_reo_desc_thres_reached_status);
|
||||
|
||||
inline void hal_reo_rx_update_queue_status(uint32_t *reo_desc,
|
||||
struct hal_reo_update_rx_queue_status *st,
|
||||
struct hal_soc *hal_soc)
|
||||
inline void
|
||||
hal_reo_rx_update_queue_status(uint32_t *reo_desc,
|
||||
struct hal_reo_update_rx_queue_status *st,
|
||||
hal_soc_handle_t hal_soc_hdl)
|
||||
{
|
||||
struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl;
|
||||
|
||||
/* Offsets of descriptor fields defined in HW headers start
|
||||
* from the field after TLV header */
|
||||
reo_desc += (sizeof(struct tlv_32_hdr) >> 2);
|
||||
@@ -1306,13 +1328,14 @@ qdf_export_symbol(hal_reo_rx_update_queue_status);
|
||||
*
|
||||
* Return: none
|
||||
*/
|
||||
inline void hal_reo_init_cmd_ring(struct hal_soc *soc, void *hal_srng)
|
||||
inline void hal_reo_init_cmd_ring(hal_soc_handle_t hal_soc_hdl, void *hal_srng)
|
||||
{
|
||||
int cmd_num;
|
||||
uint32_t *desc_addr;
|
||||
struct hal_srng_params srng_params;
|
||||
uint32_t desc_size;
|
||||
uint32_t num_desc;
|
||||
struct hal_soc *soc = (struct hal_soc *)hal_soc_hdl;
|
||||
|
||||
hal_get_srng_params(soc, hal_srng, &srng_params);
|
||||
|
||||
|
新增問題並參考
封鎖使用者