msm: camera: jpeg: Add v780 header for jpeg enc and dma

Add compatible string and header to support MISR for JPEG DMA and encoder for v780. CRs-Fixed: 3012752 Change-Id: I3f50506c20620dc46b6c5b3615887bbbc6027e36 Signed-off-by: Ridhi Shah <quic_ridhshah@quicinc.com>
2021-12-20 15:10:36 -08:00
--- a/drivers/cam_jpeg/jpeg_hw/jpeg_dma_hw/cam_jpeg_dma_780_hw_info_ver_4_2_0.h
+++ b/drivers/cam_jpeg/jpeg_hw/jpeg_dma_hw/cam_jpeg_dma_780_hw_info_ver_4_2_0.h
@@ -0,0 +1,75 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef CAM_JPEG_DMA_780_HW_INFO_VER_4_2_0_H
+#define CAM_JPEG_DMA_780_HW_INFO_VER_4_2_0_H
+
+#define CAM_JPEGDMA_HW_IRQ_STATUS_SESSION_DONE (1 << 0)
+#define CAM_JPEGDMA_HW_IRQ_STATUS_RD_BUF_DONE  (1 << 1)
+#define CAM_JPEGDMA_HW_IRQ_STATUS_WR_BUF_DONE  (1 << 5)
+#define CAM_JPEGDMA_HW_IRQ_STATUS_AXI_HALT     (1 << 9)
+#define CAM_JPEGDMA_HW_IRQ_STATUS_RST_DONE     (1 << 10)
+
+#define CAM_JPEG_HW_MASK_SCALE_ENABLE 0x1
+
+#define CAM_JPEGDMA_HW_MASK_COMP_FRAMEDONE \
+		CAM_JPEGDMA_HW_IRQ_STATUS_SESSION_DONE
+#define CAM_JPEGDMA_HW_MASK_COMP_RESET_ACK \
+		CAM_JPEGDMA_HW_IRQ_STATUS_RST_DONE
+
+static struct cam_jpeg_dma_device_hw_info cam_jpeg_dma_780_hw_info = {
+	.reg_offset = {
+		.hw_version = 0x0,
+		.int_clr = 0x14,
+		.int_status = 0x10,
+		.int_mask = 0x0C,
+		.hw_cmd = 0x1C,
+		.reset_cmd = 0x08,
+		.encode_size = 0x180,
+		.core_cfg = 0x18,
+		.misr_cfg0 = 0x160,
+		.misr_cfg1 = 0x164,
+	},
+	.reg_val = {
+		.int_clr_clearall = 0xFFFFFFFF,
+		.int_mask_disable_all = 0x00000000,
+		.int_mask_enable_all = 0xFFFFFFFF,
+		.hw_cmd_start = 0x00000001,
+		.reset_cmd = 0x32083,
+		.hw_cmd_stop = 0x00000004,
+		.misr_cfg0 = 0x506,
+	},
+	.int_status = {
+		.framedone = CAM_JPEGDMA_HW_MASK_COMP_FRAMEDONE,
+		.resetdone = CAM_JPEGDMA_HW_MASK_COMP_RESET_ACK,
+		.iserror = 0x0,
+		.stopdone = CAM_JPEGDMA_HW_IRQ_STATUS_AXI_HALT,
+		.scale_enable = CAM_JPEG_HW_MASK_SCALE_ENABLE,
+		.scale_enable_shift = 0x4,
+	},
+	.camnoc_misr_reg_offset = {
+		.main_ctl = 0x2C88,
+		.id_mask_low = 0x2CA0,
+		.id_value_low = 0x2C98,
+		.misc_ctl = 0x2C90,
+	},
+	.camnoc_misr_reg_val = {
+		.main_ctl = 0x3,
+		.id_mask_low = 0xFC0,
+		.id_value_low_rd = 0xD00,
+		.id_value_low_wr = 0xD42,
+		.misc_ctl_start = 0x1,
+		.misc_ctl_stop = 0x2,
+	},
+	.max_misr = 3,
+	.max_misr_rd = 4,
+	.max_misr_wr = 4,
+	.camnoc_misr_sigdata = 0,
+	.master_we_sel = 2,
+	.misr_rd_word_sel = 4,
+	.camnoc_misr_support = 0,
+};
+
+#endif /* CAM_JPEG_DMA_780_HW_INFO_VER_4_2_0_H */
--- a/drivers/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_core.c
+++ b/drivers/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_core.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
 */

@@ -571,11 +572,6 @@ int cam_jpeg_dma_config_cmanoc_hw_misr(struct cam_jpeg_dma_device_hw_info *hw_in
 	uint32_t                             *camnoc_misr_test = NULL;
 	int val = 0;

-	if (!hw_info->camnoc_misr_support) {
-		CAM_DBG(CAM_JPEG, "camnoc misr is not supported");
-		return 0;
-	}
-
 	dma_mem_base = soc_info->reg_map[0].mem_base;
 	camnoc_mem_base = soc_info->reg_map[1].mem_base;
 	if (!camnoc_mem_base) {
@@ -722,15 +718,22 @@ int cam_jpeg_dma_process_cmd(void *device_priv, uint32_t cmd_type,
 		break;
 	case CAM_JPEG_CMD_CONFIG_HW_MISR:
 	{
-		rc = cam_jpeg_dma_config_cmanoc_hw_misr(hw_info, soc_info, cmd_args);
+		if (hw_info->camnoc_misr_support)
+			rc = cam_jpeg_dma_config_cmanoc_hw_misr(hw_info, soc_info, cmd_args);
+		else
+			CAM_DBG(CAM_JPEG, "camnoc misr is not supported");
 		break;
 	}
 	case CAM_JPEG_CMD_DUMP_HW_MISR_VAL:
 	{
-		rc = cam_jpeg_dma_dump_hw_misr_val(hw_info, soc_info, cmd_args);
-		if (rc)
-			break;
-		rc = cam_jpeg_dma_dump_camnoc_misr_val(hw_info, soc_info, cmd_args);
+		if (hw_info->camnoc_misr_support) {
+			rc = cam_jpeg_dma_dump_hw_misr_val(hw_info, soc_info, cmd_args);
+			if (rc)
+				break;
+			rc = cam_jpeg_dma_dump_camnoc_misr_val(hw_info, soc_info, cmd_args);
+		} else {
+			CAM_DBG(CAM_JPEG, "camnoc misr is not supported");
+		}
 		break;
 	}
 	default:
--- a/drivers/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_dev.c
+++ b/drivers/cam_jpeg/jpeg_hw/jpeg_dma_hw/jpeg_dma_dev.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
 */

@@ -22,6 +23,7 @@
 #include "cam_jpeg_dma_165_hw_info_ver_4_2_0.h"
 #include "cam_jpeg_dma_580_hw_info_ver_4_2_0.h"
 #include "cam_jpeg_dma_680_hw_info_ver_4_2_0.h"
+#include "cam_jpeg_dma_780_hw_info_ver_4_2_0.h"
 #include "camera_main.h"

 static int cam_jpeg_dma_register_cpas(struct cam_hw_soc_info *soc_info,
@@ -253,6 +255,10 @@ static const struct of_device_id cam_jpeg_dma_dt_match[] = {
 		.compatible = "qcom,cam_jpeg_dma_680",
 		.data = &cam_jpeg_dma_680_hw_info,
 	},
+	{
+		.compatible = "qcom,cam_jpeg_dma_780",
+		.data = &cam_jpeg_dma_780_hw_info,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, cam_jpeg_dma_dt_match);
--- a/drivers/cam_jpeg/jpeg_hw/jpeg_enc_hw/cam_jpeg_enc_780_hw_info_ver_4_2_0.h
+++ b/drivers/cam_jpeg/jpeg_hw/jpeg_enc_hw/cam_jpeg_enc_780_hw_info_ver_4_2_0.h
@@ -0,0 +1,102 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
+ */
+
+#ifndef CAM_JPEG_ENC_780_HW_INFO_TITAN170_H
+#define CAM_JPEG_ENC_780_HW_INFO_TITAN170_H
+
+#define CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK 0x00000001
+#define CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_SHIFT 0x00000000
+
+#define CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK 0x10000000
+#define CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_SHIFT 0x0000000a
+
+#define CAM_JPEG_HW_IRQ_STATUS_STOP_DONE_MASK 0x8000000
+#define CAM_JPEG_HW_IRQ_STATUS_STOP_DONE_SHIFT 0x0000001b
+
+#define CAM_JPEG_HW_IRQ_STATUS_BUS_ERROR_MASK 0x00000800
+#define CAM_JPEG_HW_IRQ_STATUS_BUS_ERROR_SHIFT 0x0000000b
+
+#define CAM_JPEG_HW_MASK_SCALE_ENABLE 0x1
+
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF      (0x1<<19)
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR     (0x1<<20)
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR   (0x1<<21)
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF (0x1<<22)
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW    (0x1<<23)
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM       (0x1<<24)
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ   (0x1<<25)
+#define CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM       (0x1<<26)
+#define CAM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK        (0x1<<29)
+
+#define CAM_JPEG_HW_MASK_COMP_FRAMEDONE \
+		CAM_JPEG_HW_IRQ_STATUS_FRAMEDONE_MASK
+#define CAM_JPEG_HW_MASK_COMP_RESET_ACK \
+		CAM_JPEG_HW_IRQ_STATUS_RESET_ACK_MASK
+#define CAM_JPEG_HW_MASK_COMP_ERR \
+		(CAM_JPEG_HW_IRQ_STATUS_DCD_UNESCAPED_FF | \
+		CAM_JPEG_HW_IRQ_STATUS_DCD_HUFFMAN_ERROR | \
+		CAM_JPEG_HW_IRQ_STATUS_DCD_COEFFICIENT_ERR | \
+		CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_BIT_STUFF | \
+		CAM_JPEG_HW_IRQ_STATUS_DCD_SCAN_UNDERFLOW | \
+		CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM | \
+		CAM_JPEG_HW_IRQ_STATUS_DCD_INVALID_RSM_SEQ | \
+		CAM_JPEG_HW_IRQ_STATUS_DCD_MISSING_RSM | \
+		CAM_JPEG_HW_IRQ_STATUS_VIOLATION_MASK)
+
+static struct cam_jpeg_enc_device_hw_info cam_jpeg_enc_780_hw_info = {
+	.reg_offset = {
+		.hw_version = 0x0,
+		.int_clr = 0x1c,
+		.int_status = 0x20,
+		.int_mask = 0x18,
+		.hw_cmd = 0x10,
+		.reset_cmd = 0x8,
+		.encode_size = 0x180,
+		.core_cfg = 0xc,
+		.misr_cfg = 0x2B4,
+		.misr_rd0 = 0x2B8,
+	},
+	.reg_val = {
+		.int_clr_clearall = 0xFFFFFFFF,
+		.int_mask_disable_all = 0x00000000,
+		.int_mask_enable_all = 0xFFFFFFFF,
+		.hw_cmd_start = 0x00000001,
+		.reset_cmd = 0x200320D3,
+		.hw_cmd_stop = 0x00000002,
+		.misr_cfg = 0x7,
+	},
+	.int_status = {
+		.framedone = CAM_JPEG_HW_MASK_COMP_FRAMEDONE,
+		.resetdone = CAM_JPEG_HW_MASK_COMP_RESET_ACK,
+		.iserror = CAM_JPEG_HW_MASK_COMP_ERR,
+		.stopdone = CAM_JPEG_HW_IRQ_STATUS_STOP_DONE_MASK,
+		.scale_enable = CAM_JPEG_HW_MASK_SCALE_ENABLE,
+		.scale_enable_shift = 0x7,
+	},
+	.reg_dump = {
+		.start_offset = 0x0,
+		.end_offset = 0x33C,
+	},
+	.camnoc_misr_reg_offset = {
+		.main_ctl = 0x2C88,
+		.id_mask_low = 0x2CA0,
+		.id_value_low = 0x2C98,
+		.misc_ctl = 0x2C90,
+	},
+	.camnoc_misr_reg_val = {
+		.main_ctl = 0x3,
+		.id_mask_low = 0xFC0,
+		.id_value_low_rd = 0xD80,
+		.id_value_low_wr = 0xDC2,
+		.misc_ctl_start = 0x1,
+		.misc_ctl_stop = 0x2,
+	},
+	.max_misr = 3,
+	.max_misr_rd = 4,
+	.camnoc_misr_sigdata = 0,
+	.camnoc_misr_support = 0,
+};
+
+#endif /* CAM_JPEG_ENC_780_HW_INFO_TITAN170_H */
--- a/drivers/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_core.c
+++ b/drivers/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_core.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
 */

@@ -659,11 +660,6 @@ int cam_jpeg_enc_config_cmanoc_hw_misr(struct cam_jpeg_enc_device_hw_info *hw_in
 	uint32_t                             *camnoc_misr_test = NULL;
 	int val = 0;

-	if (!hw_info->camnoc_misr_support) {
-		CAM_DBG(CAM_JPEG, "camnoc misr is not supported");
-		return 0;
-	}
-
 	enc_mem_base = soc_info->reg_map[0].mem_base;
 	camnoc_mem_base = soc_info->reg_map[1].mem_base;
 	if (!camnoc_mem_base) {
@@ -821,15 +817,22 @@ int cam_jpeg_enc_process_cmd(void *device_priv, uint32_t cmd_type,
 	}
 	case CAM_JPEG_CMD_CONFIG_HW_MISR:
 	{
-		rc = cam_jpeg_enc_config_cmanoc_hw_misr(hw_info, soc_info, cmd_args);
+		if (hw_info->camnoc_misr_support)
+			rc = cam_jpeg_enc_config_cmanoc_hw_misr(hw_info, soc_info, cmd_args);
+		else
+			CAM_DBG(CAM_JPEG, "camnoc misr is not supported");
 		break;
 	}
 	case CAM_JPEG_CMD_DUMP_HW_MISR_VAL:
 	{
-		rc = cam_jpeg_enc_dump_hw_misr_val(hw_info, soc_info, cmd_args);
-		if (rc)
-			break;
-		rc = cam_jpeg_enc_dump_camnoc_misr_val(hw_info, soc_info, cmd_args);
+		if (hw_info->camnoc_misr_support) {
+			rc = cam_jpeg_enc_dump_hw_misr_val(hw_info, soc_info, cmd_args);
+			if (rc)
+				break;
+			rc = cam_jpeg_enc_dump_camnoc_misr_val(hw_info, soc_info, cmd_args);
+		} else {
+			CAM_DBG(CAM_JPEG, "camnoc misr is not supported");
+		}
 		break;
 	}
 	default:
--- a/drivers/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_dev.c
+++ b/drivers/cam_jpeg/jpeg_hw/jpeg_enc_hw/jpeg_enc_dev.c
@@ -1,5 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
+ * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
 * Copyright (c) 2017-2021, The Linux Foundation. All rights reserved.
 */

@@ -22,6 +23,7 @@
 #include "cam_jpeg_enc_165_hw_info_ver_4_2_0.h"
 #include "cam_jpeg_enc_580_hw_info_ver_4_2_0.h"
 #include "cam_jpeg_enc_680_hw_info_ver_4_2_0.h"
+#include "cam_jpeg_enc_780_hw_info_ver_4_2_0.h"
 #include "camera_main.h"

 static int cam_jpeg_enc_register_cpas(struct cam_hw_soc_info *soc_info,
@@ -254,6 +256,10 @@ static const struct of_device_id cam_jpeg_enc_dt_match[] = {
 		.compatible = "qcom,cam_jpeg_enc_680",
 		.data = &cam_jpeg_enc_680_hw_info,
 	},
+	{
+		.compatible = "qcom,cam_jpeg_enc_780",
+		.data = &cam_jpeg_enc_780_hw_info,
+	},
 	{}
 };
 MODULE_DEVICE_TABLE(of, cam_jpeg_enc_dt_match);