Prechádzať zdrojové kódy

disp: msm: sde: change the checking on height for demura config

When enable spr 2d filer in PU case, The extra line will be over
fetch on top of roi. But for demura, it does not require over fetch.
Theresfore the height of demura plane is not same with the height
of LM.
Change modify the checking on height while set demura config.

Change-Id: Ie2232e0cd6ea0bec366a1f44b556cc13502cb512
Signed-off-by: Qing Huang <[email protected]>
Qing Huang 1 rok pred
rodič
commit
68f5b0d13a

+ 3 - 1
msm/sde/sde_color_processing.c

@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: GPL-2.0-only
 /*
- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2016-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -1845,6 +1845,8 @@ static void _sde_cp_crtc_commit_feature(struct sde_cp_node *prop_node,
 	hw_cfg.is_crtc_enabled = sde_crtc->enabled;
 
 	hw_cfg.num_ds_enabled = sde_crtc_state->num_ds_enabled;
+	hw_cfg.overfetch_lines_on_top = sde_crtc_state->user_roi_list.spr_roi[0].y1 -
+				sde_crtc_state->user_roi_list.roi[0].y1;
 
 	SDE_EVT32(prop_node->feature, hw_cfg.panel_width, hw_cfg.panel_height);
 

+ 3 - 1
msm/sde/sde_hw_mdss.h

@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 /*
- * Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  * Copyright (c) 2015-2021, The Linux Foundation. All rights reserved.
  */
 
@@ -677,6 +677,7 @@ struct sde_mdss_color {
  * @skip_blend_plane_h: skip plane height
  * @num_ds_enabled: Number of destination scalers enabled
  * @is_crtc_enabled: true if crtc is enabled
+ * @overfetch_lines_on_top: extra lines to over fetch on top
  */
 struct sde_hw_cp_cfg {
 	void *payload;
@@ -697,6 +698,7 @@ struct sde_hw_cp_cfg {
 	u32 skip_blend_plane_h;
 	u32 num_ds_enabled;
 	bool is_crtc_enabled;
+	u32 overfetch_lines_on_top;
 };
 
 /**

+ 2 - 1
msm/sde/sde_hw_reg_dma_v1_color_proc.c

@@ -6481,7 +6481,8 @@ static bool __reg_dmav1_valid_hfc_en_cfg(struct drm_msm_dem_cfg *dcfg,
 	w = 2 * (w / 32);
 	w = w / (hw_cfg->num_of_mixers ? hw_cfg->num_of_mixers : 1);
 
-	if (h != hw_cfg->skip_blend_plane_h || w != hw_cfg->skip_blend_plane_w) {
+	if (h != (hw_cfg->skip_blend_plane_h + hw_cfg->overfetch_lines_on_top) ||
+			w != hw_cfg->skip_blend_plane_w) {
 		DRM_ERROR("invalid hfc cfg exp h %d exp w %d act h %d act w %d\n",
 			h, w, hw_cfg->skip_blend_plane_h, hw_cfg->skip_blend_plane_w);
 		DRM_ERROR("c0_depth %d c1_depth %d c2 depth %d hw_cfg->panel_width %d\n",