disp: msm: sde: align timing engine vsync based on panel vsync

This change adds logic to align timing engine vsync with panel
tear check if it is supported.

Change-Id: I3f881f392929589848c893f567822b21c0650000
Signed-off-by: Narendra Muppalla <NarendraM@codeaurora.org>
This commit is contained in:
Narendra Muppalla
2020-02-03 19:52:24 -08:00
parent cd1e996b44
commit 68ee65353b
8 changed files with 18 additions and 0 deletions

View File

@@ -309,6 +309,11 @@ static void sde_hw_intf_setup_timing_engine(struct sde_hw_intf *ctx,
if (p->wide_bus_en)
intf_cfg2 |= BIT(0);
/* Synchronize timing engine enable to TE */
if ((ctx->cap->features & BIT(SDE_INTF_TE_ALIGN_VSYNC))
&& p->poms_align_vsync)
intf_cfg2 |= BIT(16);
if (ctx->cfg.split_link_en)
SDE_REG_WRITE(c, INTF_REG_SPLIT_LINK, 0x3);