qcacmn: Add hal_rx_get_mpdu_sequence_control_valid API

Implement hal_rx_get_mpdu_sequence_control_valid
API based on the chipset as
the macro to retrieve sequence control valid
value is chipset dependent.

Change-Id: I01a006094d0330060e9ff1a91200c48c2426f38d
CRs-Fixed: 2522133

hal/wifi3.0/qca6490/hal_6490.c

@@ -433,6 +433,21 @@ static QDF_STATUS hal_rx_mpdu_get_addr4_6490(uint8_t *buf, uint8_t *mac_addr)
 
 	return QDF_STATUS_E_FAILURE;
 }
+
+/*
+ * hal_rx_get_mpdu_sequence_control_valid_6490(): Get mpdu
+ * sequence control valid
+ *
+ * @nbuf: Network buffer
+ * Returns: value of sequence control valid field
+ */
+static uint8_t hal_rx_get_mpdu_sequence_control_valid_6490(uint8_t *buf)
+{
+	struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf);
+	struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs);
+
+	return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info);
+}
 struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	/* rx */
 	hal_rx_get_rx_fragment_number_6490,
@@ -454,4 +469,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = {
 	hal_rx_mpdu_get_addr2_6490,
 	hal_rx_mpdu_get_addr3_6490,
 	hal_rx_mpdu_get_addr4_6490,
+	hal_rx_get_mpdu_sequence_control_valid_6490,
 };

hal/wifi3.0/qca6490/hal_6490_rx.h

@@ -195,3 +195,9 @@
 		RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \
 		RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK,	\
 		RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB))
+
+#define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info)	\
+	(_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info,	\
+		RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)),	\
+		RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_MASK,	\
+		RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_LSB))