diff --git a/dp/wifi3.0/dp_rx_defrag.c b/dp/wifi3.0/dp_rx_defrag.c index 8353febbd8..2d1dcb691b 100644 --- a/dp/wifi3.0/dp_rx_defrag.c +++ b/dp/wifi3.0/dp_rx_defrag.c @@ -1446,7 +1446,8 @@ dp_rx_defrag_store_fragment(struct dp_soc *soc, rx_tid = &peer->rx_tid[tid]; mpdu_sequence_control_valid = - hal_rx_get_mpdu_sequence_control_valid(rx_desc->rx_buf_start); + hal_rx_get_mpdu_sequence_control_valid(soc->hal_soc, + rx_desc->rx_buf_start); /* Invalid MPDU sequence control field, MPDU is of no use */ if (!mpdu_sequence_control_valid) { diff --git a/hal/wifi3.0/hal_internal.h b/hal/wifi3.0/hal_internal.h index cbd94b9f7c..4b80e8d420 100644 --- a/hal/wifi3.0/hal_internal.h +++ b/hal/wifi3.0/hal_internal.h @@ -404,6 +404,7 @@ struct hal_hw_txrx_ops { (*hal_rx_mpdu_get_addr3)(uint8_t *buf, uint8_t *mac_addr); QDF_STATUS (*hal_rx_mpdu_get_addr4)(uint8_t *buf, uint8_t *mac_addr); + uint8_t (*hal_rx_get_mpdu_sequence_control_valid)(uint8_t *buf); }; /** diff --git a/hal/wifi3.0/hal_rx.h b/hal/wifi3.0/hal_rx.h index 3055451481..f73d0c1214 100644 --- a/hal/wifi3.0/hal_rx.h +++ b/hal/wifi3.0/hal_rx.h @@ -2675,28 +2675,20 @@ uint32_t hal_rx_msdu_is_wlan_mcast(qdf_nbuf_t nbuf) return rx_attn->mcast_bcast; } -#define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \ - (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ - RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ - RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ - RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_LSB)) /* * hal_rx_get_mpdu_sequence_control_valid(): Get mpdu sequence control valid - * + * @hal_soc_hdl: hal soc handle * @nbuf: Network buffer - * Returns: value of sequence control valid field + * + * Return: value of sequence control valid field */ static inline -uint8_t hal_rx_get_mpdu_sequence_control_valid(uint8_t *buf) +uint8_t hal_rx_get_mpdu_sequence_control_valid(hal_soc_handle_t hal_soc_hdl, + uint8_t *buf) { - struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); - struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); - uint8_t seq_ctrl_valid = 0; + struct hal_soc *hal_soc = (struct hal_soc *)hal_soc_hdl; - seq_ctrl_valid = - HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); - - return seq_ctrl_valid; + return hal_soc->ops->hal_rx_get_mpdu_sequence_control_valid(buf); } /* diff --git a/hal/wifi3.0/qca6290/hal_6290.c b/hal/wifi3.0/qca6290/hal_6290.c index 9b5750b267..d69dbc9dad 100644 --- a/hal/wifi3.0/qca6290/hal_6290.c +++ b/hal/wifi3.0/qca6290/hal_6290.c @@ -530,6 +530,20 @@ static QDF_STATUS hal_rx_mpdu_get_addr4_6290(uint8_t *buf, uint8_t *mac_addr) return QDF_STATUS_E_FAILURE; } +/* + * hal_rx_get_mpdu_sequence_control_valid_6290(): Get mpdu + * sequence control valid + * + * @nbuf: Network buffer + * Returns: value of sequence control valid field + */ +static uint8_t hal_rx_get_mpdu_sequence_control_valid_6290(uint8_t *buf) +{ + struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); + struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); + + return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); +} struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = { /* init and setup */ hal_srng_dst_hw_init_generic, @@ -591,6 +605,7 @@ struct hal_hw_txrx_ops qca6290_hal_hw_txrx_ops = { hal_rx_mpdu_get_addr2_6290, hal_rx_mpdu_get_addr3_6290, hal_rx_mpdu_get_addr4_6290, + hal_rx_get_mpdu_sequence_control_valid_6290, }; struct hal_hw_srng_config hw_srng_table_6290[] = { diff --git a/hal/wifi3.0/qca6290/hal_6290_rx.h b/hal/wifi3.0/qca6290/hal_6290_rx.h index 442a5a04e6..71adbfb570 100644 --- a/hal/wifi3.0/qca6290/hal_6290_rx.h +++ b/hal/wifi3.0/qca6290/hal_6290_rx.h @@ -215,6 +215,12 @@ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB)) +#define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \ + (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_LSB)) + #if defined(QCA_WIFI_QCA6290_11AX) #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\ (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ diff --git a/hal/wifi3.0/qca6390/hal_6390.c b/hal/wifi3.0/qca6390/hal_6390.c index 63e09447e5..d94b469fc1 100644 --- a/hal/wifi3.0/qca6390/hal_6390.c +++ b/hal/wifi3.0/qca6390/hal_6390.c @@ -527,6 +527,21 @@ static QDF_STATUS hal_rx_mpdu_get_addr4_6390(uint8_t *buf, uint8_t *mac_addr) return QDF_STATUS_E_FAILURE; } + +/* + * hal_rx_get_mpdu_sequence_control_valid_6390(): Get mpdu + * sequence control valid + * + * @nbuf: Network buffer + * Returns: value of sequence control valid field + */ +static uint8_t hal_rx_get_mpdu_sequence_control_valid_6390(uint8_t *buf) +{ + struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); + struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); + + return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); +} struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = { /* init and setup */ hal_srng_dst_hw_init_generic, @@ -588,6 +603,7 @@ struct hal_hw_txrx_ops qca6390_hal_hw_txrx_ops = { hal_rx_mpdu_get_addr2_6390, hal_rx_mpdu_get_addr3_6390, hal_rx_mpdu_get_addr4_6390, + hal_rx_get_mpdu_sequence_control_valid_6390, }; struct hal_hw_srng_config hw_srng_table_6390[] = { diff --git a/hal/wifi3.0/qca6390/hal_6390_rx.h b/hal/wifi3.0/qca6390/hal_6390_rx.h index 9ca1df212b..ae490e63a1 100644 --- a/hal/wifi3.0/qca6390/hal_6390_rx.h +++ b/hal/wifi3.0/qca6390/hal_6390_rx.h @@ -215,6 +215,12 @@ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB)) +#define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \ + (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_LSB)) + #define HAL_RX_MSDU_START_MIMO_SS_BITMAP(_rx_msdu_start)\ (_HAL_MS((*_OFFSET_TO_WORD_PTR((_rx_msdu_start),\ RX_MSDU_START_5_MIMO_SS_BITMAP_OFFSET)), \ diff --git a/hal/wifi3.0/qca6490/hal_6490.c b/hal/wifi3.0/qca6490/hal_6490.c index 04531126cb..5b9a39c2c0 100644 --- a/hal/wifi3.0/qca6490/hal_6490.c +++ b/hal/wifi3.0/qca6490/hal_6490.c @@ -433,6 +433,21 @@ static QDF_STATUS hal_rx_mpdu_get_addr4_6490(uint8_t *buf, uint8_t *mac_addr) return QDF_STATUS_E_FAILURE; } + +/* + * hal_rx_get_mpdu_sequence_control_valid_6490(): Get mpdu + * sequence control valid + * + * @nbuf: Network buffer + * Returns: value of sequence control valid field + */ +static uint8_t hal_rx_get_mpdu_sequence_control_valid_6490(uint8_t *buf) +{ + struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); + struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); + + return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); +} struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = { /* rx */ hal_rx_get_rx_fragment_number_6490, @@ -454,4 +469,5 @@ struct hal_hw_txrx_ops qca6490_hal_hw_txrx_ops = { hal_rx_mpdu_get_addr2_6490, hal_rx_mpdu_get_addr3_6490, hal_rx_mpdu_get_addr4_6490, + hal_rx_get_mpdu_sequence_control_valid_6490, }; diff --git a/hal/wifi3.0/qca6490/hal_6490_rx.h b/hal/wifi3.0/qca6490/hal_6490_rx.h index 009e11965b..cc70fd5932 100644 --- a/hal/wifi3.0/qca6490/hal_6490_rx.h +++ b/hal/wifi3.0/qca6490/hal_6490_rx.h @@ -195,3 +195,9 @@ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB)) + +#define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \ + (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ + RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ + RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ + RX_MPDU_INFO_11_MPDU_SEQUENCE_CONTROL_VALID_LSB)) diff --git a/hal/wifi3.0/qca8074v1/hal_8074v1.c b/hal/wifi3.0/qca8074v1/hal_8074v1.c index 53dec78c3a..cb774c8f6a 100644 --- a/hal/wifi3.0/qca8074v1/hal_8074v1.c +++ b/hal/wifi3.0/qca8074v1/hal_8074v1.c @@ -525,6 +525,20 @@ static QDF_STATUS hal_rx_mpdu_get_addr4_8074v1(uint8_t *buf, uint8_t *mac_addr) return QDF_STATUS_E_FAILURE; } +/* + * hal_rx_get_mpdu_sequence_control_valid_8074v1(): Get mpdu + * sequence control valid + * + * @nbuf: Network buffer + * Returns: value of sequence control valid field + */ +static uint8_t hal_rx_get_mpdu_sequence_control_valid_8074v1(uint8_t *buf) +{ + struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); + struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); + + return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); +} struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = { /* init and setup */ @@ -587,6 +601,7 @@ struct hal_hw_txrx_ops qca8074_hal_hw_txrx_ops = { hal_rx_mpdu_get_addr2_8074v1, hal_rx_mpdu_get_addr3_8074v1, hal_rx_mpdu_get_addr4_8074v1, + hal_rx_get_mpdu_sequence_control_valid_8074v1, }; struct hal_hw_srng_config hw_srng_table_8074[] = { diff --git a/hal/wifi3.0/qca8074v1/hal_8074v1_rx.h b/hal/wifi3.0/qca8074v1/hal_8074v1_rx.h index ac0867b05e..86a20bfef2 100644 --- a/hal/wifi3.0/qca8074v1/hal_8074v1_rx.h +++ b/hal/wifi3.0/qca8074v1/hal_8074v1_rx.h @@ -203,6 +203,12 @@ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB)) + +#define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \ + (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_LSB)) /* * hal_rx_msdu_start_nss_get_8074(): API to get the NSS * Interval from rx_msdu_start diff --git a/hal/wifi3.0/qca8074v2/hal_8074v2.c b/hal/wifi3.0/qca8074v2/hal_8074v2.c index 9df71ea652..c64557d7d7 100644 --- a/hal/wifi3.0/qca8074v2/hal_8074v2.c +++ b/hal/wifi3.0/qca8074v2/hal_8074v2.c @@ -522,6 +522,20 @@ static QDF_STATUS hal_rx_mpdu_get_addr4_8074v2(uint8_t *buf, uint8_t *mac_addr) return QDF_STATUS_E_FAILURE; } +/* + * hal_rx_get_mpdu_sequence_control_valid_8074v2(): Get mpdu + * sequence control valid + * + * @nbuf: Network buffer + * Returns: value of sequence control valid field + */ +static uint8_t hal_rx_get_mpdu_sequence_control_valid_8074v2(uint8_t *buf) +{ + struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); + struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); + + return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); +} struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = { /* init and setup */ @@ -584,6 +598,7 @@ struct hal_hw_txrx_ops qca8074v2_hal_hw_txrx_ops = { hal_rx_mpdu_get_addr2_8074v2, hal_rx_mpdu_get_addr3_8074v2, hal_rx_mpdu_get_addr4_8074v2, + hal_rx_get_mpdu_sequence_control_valid_8074v2, }; struct hal_hw_srng_config hw_srng_table_8074v2[] = { diff --git a/hal/wifi3.0/qca8074v2/hal_8074v2_rx.h b/hal/wifi3.0/qca8074v2/hal_8074v2_rx.h index b41e518001..b0efd9efc4 100644 --- a/hal/wifi3.0/qca8074v2/hal_8074v2_rx.h +++ b/hal/wifi3.0/qca8074v2/hal_8074v2_rx.h @@ -212,6 +212,12 @@ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_OFFSET)), \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_MASK, \ RX_MPDU_INFO_21_MAC_ADDR_AD4_47_32_LSB)) + +#define HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(_rx_mpdu_info) \ + (_HAL_MS((*_OFFSET_TO_WORD_PTR(_rx_mpdu_info, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_OFFSET)), \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_MASK, \ + RX_MPDU_INFO_2_MPDU_SEQUENCE_CONTROL_VALID_LSB)) /* * hal_rx_msdu_start_nss_get_8074v2(): API to get the NSS * Interval from rx_msdu_start diff --git a/hal/wifi3.0/qcn9000/hal_9000.c b/hal/wifi3.0/qcn9000/hal_9000.c index 52b0189f98..8b9ae55369 100644 --- a/hal/wifi3.0/qcn9000/hal_9000.c +++ b/hal/wifi3.0/qcn9000/hal_9000.c @@ -531,6 +531,21 @@ static QDF_STATUS hal_rx_mpdu_get_addr4_9000(uint8_t *buf, uint8_t *mac_addr) return QDF_STATUS_E_FAILURE; } + +/* + * hal_rx_get_mpdu_sequence_control_valid_9000(): Get mpdu + * sequence control valid + * + * @nbuf: Network buffer + * Returns: value of sequence control valid field + */ +static uint8_t hal_rx_get_mpdu_sequence_control_valid_9000(uint8_t *buf) +{ + struct rx_pkt_tlvs *pkt_tlvs = hal_rx_get_pkt_tlvs(buf); + struct rx_mpdu_info *rx_mpdu_info = hal_rx_get_mpdu_info(pkt_tlvs); + + return HAL_RX_MPDU_GET_SEQUENCE_CONTROL_VALID(rx_mpdu_info); +} struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = { /* init and setup */ @@ -593,6 +608,7 @@ struct hal_hw_txrx_ops qcn9000_hal_hw_txrx_ops = { hal_rx_mpdu_get_addr2_9000, hal_rx_mpdu_get_addr3_9000, hal_rx_mpdu_get_addr4_9000, + hal_rx_get_mpdu_sequence_control_valid_9000, }; struct hal_hw_srng_config hw_srng_table_9000[] = {