Browse Source

qcacmn: Add support to populate and send UMAC reset setup command

UMAC reset prerequisite setup command contains the following information.
- Interrupt number to be used for raising the UMAC reset interrupt
- Address of the shared memory
This is an HTT command. Send this command as part of the UMAC reset
initialization sequence.

Change-Id: I7a08f48b420580b5e3dbb9b46f6605d986f8fd89
CRs-Fixed: 3244930
Shiva Krishna Pittala 3 years ago
parent
commit
68c2b67520
3 changed files with 164 additions and 1 deletions
  1. 104 0
      dp/wifi3.0/dp_htt.c
  2. 25 0
      dp/wifi3.0/dp_htt.h
  3. 35 1
      dp/wifi3.0/dp_umac_reset.c

+ 104 - 0
dp/wifi3.0/dp_htt.c

@@ -4951,3 +4951,107 @@ fail:
 	qdf_disable_work(&pdev->bkp_stats.work);
 	return QDF_STATUS_E_FAILURE;
 }
+
+#ifdef DP_UMAC_HW_RESET_SUPPORT
+QDF_STATUS dp_htt_umac_reset_send_setup_cmd(
+		struct dp_soc *soc,
+		const struct dp_htt_umac_reset_setup_cmd_params *setup_params)
+{
+	struct htt_soc *htt_handle = soc->htt_handle;
+	uint32_t len;
+	qdf_nbuf_t msg;
+	u_int32_t *msg_word;
+	QDF_STATUS status;
+	uint8_t *htt_logger_bufp;
+	struct dp_htt_htc_pkt *pkt;
+
+	len = HTT_MSG_BUF_SIZE(
+		HTT_H2T_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP_BYTES);
+
+	msg = qdf_nbuf_alloc(soc->osdev,
+			     len,
+			     /* reserve room for the HTC header */
+			     HTC_HEADER_LEN + HTC_HDR_ALIGNMENT_PADDING,
+			     4,
+			     TRUE);
+	if (!msg)
+		return QDF_STATUS_E_NOMEM;
+
+	/*
+	 * Set the length of the message.
+	 * The contribution from the HTC_HDR_ALIGNMENT_PADDING is added
+	 * separately during the below call to qdf_nbuf_push_head.
+	 * The contribution from the HTC header is added separately inside HTC.
+	 */
+	if (!qdf_nbuf_put_tail(
+		msg, HTT_H2T_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP_BYTES)) {
+		dp_htt_err("Failed to expand head");
+		qdf_nbuf_free(msg);
+		return QDF_STATUS_E_FAILURE;
+	}
+
+	/* fill in the message contents */
+	msg_word = (uint32_t *)qdf_nbuf_data(msg);
+
+	/* Rewind beyond alignment pad to get to the HTC header reserved area */
+	qdf_nbuf_push_head(msg, HTC_HDR_ALIGNMENT_PADDING);
+	htt_logger_bufp = (uint8_t *)msg_word;
+
+	qdf_mem_zero(msg_word,
+		     HTT_H2T_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP_BYTES);
+
+	HTT_H2T_MSG_TYPE_SET(
+		*msg_word,
+		HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP);
+	HTT_H2T_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP_T2H_MSG_METHOD_SET(
+		*msg_word, htt_umac_hang_recovery_msg_t2h_msi_and_h2t_polling);
+	HTT_H2T_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP_H2T_MSG_METHOD_SET(
+		*msg_word, htt_umac_hang_recovery_msg_t2h_msi_and_h2t_polling);
+
+	msg_word++;
+	*msg_word = setup_params->msi_data;
+
+	msg_word++;
+	*msg_word = sizeof(htt_umac_hang_recovery_msg_shmem_t);
+
+	msg_word++;
+	*msg_word = setup_params->shmem_addr_low;
+
+	msg_word++;
+	*msg_word = setup_params->shmem_addr_high;
+
+	pkt = htt_htc_pkt_alloc(htt_handle);
+	if (!pkt) {
+		qdf_err("Fail to allocate dp_htt_htc_pkt buffer");
+		qdf_assert(0);
+		qdf_nbuf_free(msg);
+		return QDF_STATUS_E_NOMEM;
+	}
+
+	pkt->soc_ctxt = NULL; /* not used during send-done callback */
+
+	SET_HTC_PACKET_INFO_TX(&pkt->htc_pkt,
+			       dp_htt_h2t_send_complete_free_netbuf,
+			       qdf_nbuf_data(msg),
+			       qdf_nbuf_len(msg),
+			       htt_handle->htc_endpoint,
+			       /* tag for no FW response msg */
+			       HTC_TX_PACKET_TAG_RUNTIME_PUT);
+
+	SET_HTC_PACKET_NET_BUF_CONTEXT(&pkt->htc_pkt, msg);
+
+	status = DP_HTT_SEND_HTC_PKT(
+			htt_handle, pkt,
+			HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP,
+			htt_logger_bufp);
+
+	if (QDF_IS_STATUS_ERROR(status)) {
+		qdf_nbuf_free(msg);
+		htt_htc_pkt_free(htt_handle, pkt);
+		return status;
+	}
+
+	dp_info("HTT_H2T_MSG_TYPE_UMAC_HANG_RECOVERY_PREREQUISITE_SETUP sent");
+	return status;
+}
+#endif

+ 25 - 0
dp/wifi3.0/dp_htt.h

@@ -939,6 +939,31 @@ struct htt_stats_context {
 	uint32_t msg_len;
 };
 
+#ifdef DP_UMAC_HW_RESET_SUPPORT
+/**
+ * struct dp_htt_umac_reset_setup_cmd_params - Params for UMAC reset setup cmd
+ * @msi_data: MSI data to be used for raising the UMAC reset interrupt
+ * @shmem_addr_low: Lower 32-bits of shared memory
+ * @shmem_addr_high: Higher 32-bits of shared memory
+ */
+struct dp_htt_umac_reset_setup_cmd_params {
+	uint32_t msi_data;
+	uint32_t shmem_addr_low;
+	uint32_t shmem_addr_high;
+};
+
+/**
+ * dp_htt_umac_reset_send_setup_cmd(): Send the HTT UMAC reset setup command
+ * @soc: dp soc object
+ * @setup_params: parameters required by this command
+ *
+ * Return: Success when HTT message is sent, error on failure
+ */
+QDF_STATUS dp_htt_umac_reset_send_setup_cmd(
+		struct dp_soc *soc,
+		const struct dp_htt_umac_reset_setup_cmd_params *setup_params);
+#endif
+
 /**
  * dp_htt_rx_flow_fst_setup(): Send HTT Rx FST setup message to FW
  * @pdev: DP pdev handle

+ 35 - 1
dp/wifi3.0/dp_umac_reset.c

@@ -16,6 +16,7 @@
 #include <dp_types.h>
 #include <wlan_cfg.h>
 #include <hif.h>
+#include <dp_htt.h>
 
 /**
  * dp_get_umac_reset_intr_ctx() - Get the interrupt context to be used by
@@ -47,6 +48,38 @@ static QDF_STATUS dp_get_umac_reset_intr_ctx(struct dp_soc *soc, int *intr_ctx)
 	return QDF_STATUS_E_FAILURE;
 }
 
+/**
+ * dp_umac_reset_send_setup_cmd(): Send the UMAC reset setup command
+ * @soc: dp soc object
+ *
+ * Return: QDF_STATUS of operation
+ */
+static QDF_STATUS
+dp_umac_reset_send_setup_cmd(struct dp_soc *soc)
+{
+	struct dp_soc_umac_reset_ctx *umac_reset_ctx;
+	int msi_vector_count, ret;
+	uint32_t msi_base_data, msi_vector_start;
+	struct dp_htt_umac_reset_setup_cmd_params params;
+
+	umac_reset_ctx = &soc->umac_reset_ctx;
+	ret = pld_get_user_msi_assignment(soc->osdev->dev, "DP",
+					  &msi_vector_count, &msi_base_data,
+					  &msi_vector_start);
+	if (ret)
+		return QDF_STATUS_E_FAILURE;
+
+	qdf_mem_zero(&params, sizeof(params));
+	params.msi_data = (umac_reset_ctx->intr_offset % msi_vector_count) +
+				msi_base_data;
+	params.shmem_addr_low =
+		qdf_get_lower_32_bits(umac_reset_ctx->shmem_paddr_aligned);
+	params.shmem_addr_high =
+		qdf_get_upper_32_bits(umac_reset_ctx->shmem_paddr_aligned);
+
+	return dp_htt_umac_reset_send_setup_cmd(soc, &params);
+}
+
 QDF_STATUS dp_soc_umac_reset_init(struct dp_soc *soc)
 {
 	struct dp_soc_umac_reset_ctx *umac_reset_ctx;
@@ -88,7 +121,8 @@ QDF_STATUS dp_soc_umac_reset_init(struct dp_soc *soc)
 		(uint64_t)umac_reset_ctx->shmem_paddr_unaligned,
 		DP_UMAC_RESET_SHMEM_ALIGN);
 
-	return QDF_STATUS_SUCCESS;
+	/* Send the setup cmd to the target */
+	return dp_umac_reset_send_setup_cmd(soc);
 }
 
 /**