msm: camera: cdm: Add priority group support

This change adds priority group support for CDM 2.1.

CRs-Fixed: 2682747
Change-Id: I4e97e12d916a72d41f2cf8e92cf71d15ede91da5
Signed-off-by: Trishansh Bhardwaj <tbhardwa@codeaurora.org>
This commit is contained in:
Trishansh Bhardwaj
2020-05-05 11:23:44 +05:30
parent f65f27de96
commit 685eb68649
4 changed files with 33 additions and 20 deletions

View File

@@ -310,6 +310,7 @@ struct cam_cdm_common_reg_data {
* @icl_reg: registers to read information related to good * @icl_reg: registers to read information related to good
* and invalid commands in FIFO * and invalid commands in FIFO
* @spare: spare register * @spare: spare register
* @priority_group_bit_offset offset of priority group bits
* *
*/ */
struct cam_cdm_common_regs { struct cam_cdm_common_regs {
@@ -349,6 +350,7 @@ struct cam_cdm_common_regs {
const struct cam_cdm_perf_regs *perf_reg; const struct cam_cdm_perf_regs *perf_reg;
const struct cam_cdm_icl_regs *icl_reg; const struct cam_cdm_icl_regs *icl_reg;
uint32_t spare; uint32_t spare;
uint32_t priority_group_bit_offset;
}; };
/** /**
@@ -530,10 +532,11 @@ struct cam_cdm {
/* struct cam_cdm_private_dt_data - CDM hw custom dt data */ /* struct cam_cdm_private_dt_data - CDM hw custom dt data */
struct cam_cdm_private_dt_data { struct cam_cdm_private_dt_data {
bool dt_cdm_shared; bool dt_cdm_shared;
bool config_fifo;
uint8_t priority_group;
uint32_t fifo_depth[CAM_CDM_BL_FIFO_MAX];
uint32_t dt_num_supported_clients; uint32_t dt_num_supported_clients;
const char *dt_cdm_client_name[CAM_PER_CDM_MAX_REGISTERED_CLIENTS]; const char *dt_cdm_client_name[CAM_PER_CDM_MAX_REGISTERED_CLIENTS];
bool config_fifo;
uint32_t fifo_depth[CAM_CDM_BL_FIFO_MAX];
}; };
/* struct cam_cdm_intf_devices - CDM mgr interface devices */ /* struct cam_cdm_intf_devices - CDM mgr interface devices */

View File

@@ -482,6 +482,8 @@ int cam_hw_cdm_set_cdm_core_cfg(struct cam_hw_info *cdm_hw)
uint32_t cfg_mask = 0; uint32_t cfg_mask = 0;
int rc; int rc;
struct cam_cdm *core = (struct cam_cdm *)cdm_hw->core_info; struct cam_cdm *core = (struct cam_cdm *)cdm_hw->core_info;
struct cam_cdm_private_dt_data *pvt_data =
pvt_data = cdm_hw->soc_info.soc_private;
cfg_mask = cfg_mask | cfg_mask = cfg_mask |
CAM_CDM_AHB_STOP_ON_ERROR| CAM_CDM_AHB_STOP_ON_ERROR|
@@ -497,21 +499,20 @@ int cam_hw_cdm_set_cdm_core_cfg(struct cam_hw_info *cdm_hw)
goto end; goto end;
} }
if (cdm_version < CAM_CDM_VERSION_2_0) { if (cdm_version >= CAM_CDM_VERSION_2_0) {
rc = cam_cdm_write_hw_reg(cdm_hw,
core->offsets->cmn_reg->core_cfg, cfg_mask);
if (rc) {
CAM_ERR(CAM_CDM, "Error writing cdm core cfg");
rc = -EIO;
goto end;
}
} else {
if (core->id != CAM_CDM_CPAS) if (core->id != CAM_CDM_CPAS)
cfg_mask = cfg_mask | CAM_CDM_IMPLICIT_WAIT_EN; cfg_mask = cfg_mask | CAM_CDM_IMPLICIT_WAIT_EN;
if (core->arbitration == CAM_CDM_ARBITRATION_ROUND_ROBIN) if (core->arbitration == CAM_CDM_ARBITRATION_ROUND_ROBIN)
cfg_mask = cfg_mask | CAM_CDM_ARB_SEL_RR; cfg_mask = cfg_mask | CAM_CDM_ARB_SEL_RR;
}
if (cdm_version >= CAM_CDM_VERSION_2_1) {
cfg_mask = cfg_mask | ((uint32_t)pvt_data->priority_group <<
core->offsets->cmn_reg->priority_group_bit_offset);
}
rc = cam_cdm_write_hw_reg(cdm_hw, rc = cam_cdm_write_hw_reg(cdm_hw,
core->offsets->cmn_reg->core_cfg, cfg_mask); core->offsets->cmn_reg->core_cfg, cfg_mask);
if (rc) { if (rc) {
@@ -519,7 +520,6 @@ int cam_hw_cdm_set_cdm_core_cfg(struct cam_hw_info *cdm_hw)
rc = -EIO; rc = -EIO;
goto end; goto end;
} }
}
end: end:
return rc; return rc;

View File

@@ -225,6 +225,7 @@ static struct cam_cdm_common_regs cdm_hw_2_1_cmn_reg_offset = {
.perf_reg = NULL, .perf_reg = NULL,
.icl_reg = &cdm_2_1_icl, .icl_reg = &cdm_2_1_icl,
.spare = 0x3fc, .spare = 0x3fc,
.priority_group_bit_offset = 20,
}; };
static struct cam_cdm_common_reg_data cdm_hw_2_1_cmn_reg_data = { static struct cam_cdm_common_reg_data cdm_hw_2_1_cmn_reg_data = {

View File

@@ -110,6 +110,14 @@ int cam_cdm_soc_load_dt_private(struct platform_device *pdev,
CAM_ERR(CAM_CDM, "Reading cdm-client-names failed"); CAM_ERR(CAM_CDM, "Reading cdm-client-names failed");
goto end; goto end;
} }
}
rc = of_property_read_u8(pdev->dev.of_node, "cdm-priority-group",
&ptr->priority_group);
if (rc < 0) {
ptr->priority_group = 0;
rc = 0;
} }
ptr->config_fifo = of_property_read_bool(pdev->dev.of_node, ptr->config_fifo = of_property_read_bool(pdev->dev.of_node,
@@ -154,12 +162,13 @@ int cam_hw_cdm_soc_get_dt_properties(struct cam_hw_info *cdm_hw,
int rc; int rc;
struct cam_hw_soc_info *soc_ptr; struct cam_hw_soc_info *soc_ptr;
const struct of_device_id *id; const struct of_device_id *id;
struct cam_cdm *cdm_core = cdm_hw->core_info; struct cam_cdm *cdm_core = NULL;
if (!cdm_hw || (cdm_hw->soc_info.soc_private) if (!cdm_hw || (cdm_hw->soc_info.soc_private)
|| !(cdm_hw->soc_info.pdev)) || !(cdm_hw->soc_info.pdev))
return -EINVAL; return -EINVAL;
cdm_core = cdm_hw->core_info;
soc_ptr = &cdm_hw->soc_info; soc_ptr = &cdm_hw->soc_info;
rc = cam_soc_util_get_dt_properties(soc_ptr); rc = cam_soc_util_get_dt_properties(soc_ptr);
@@ -191,7 +200,7 @@ int cam_hw_cdm_soc_get_dt_properties(struct cam_hw_info *cdm_hw,
CAM_DBG(CAM_CDM, "name %s", cdm_core->name); CAM_DBG(CAM_CDM, "name %s", cdm_core->name);
snprintf(cdm_core->name, sizeof(cdm_core->name) + 1, "%s%d", snprintf(cdm_core->name, sizeof(cdm_core->name), "%s%d",
id->compatible, soc_ptr->index); id->compatible, soc_ptr->index);
CAM_DBG(CAM_CDM, "name %s", cdm_core->name); CAM_DBG(CAM_CDM, "name %s", cdm_core->name);