samsung-sm8650/android_kernel_samsung_sm8650-modules
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qcacmn: add MU Sniffer compatibility

Просмотр исходного кода 
add missing values for rx_status and rx_user_status
values are for both HE and EHT data as well as usig.

CRs-Fixed: 3734450
Change-Id: I1bfd1a3021e11c4b5f2c07f324273bb778bf5c0f
Этот коммит содержится в:
Ruben Columbus
2024-01-23 19:20:16 -08:00
коммит произвёл Ravindra Konda
родитель 70ef35de9d
Коммит 6813cbfead
10 изменённых файлов: 762 добавлений и 249 удалений
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512
hal/wifi3.0/be/hal_be_api_mon.h
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@@ -114,6 +114,8 @@ defined(QCA_SINGLE_WIFI_3_0)
#define RX_MON_MSDU_END_WMASK 0x0AE1
#define RX_MON_PPDU_END_USR_STATS_WMASK 0xB7E
#define MAX_USR_INFO_STR_CNT 4
#ifdef CONFIG_MON_WORD_BASED_TLV
#ifndef BIG_ENDIAN_HOST
struct rx_mpdu_start_mon_data {
@@ -1658,6 +1660,8 @@ hal_rx_parse_u_sig_hdr(struct hal_soc *hal_soc, void *rx_tlv,
ppdu_info->rx_status.usig_flags = 1;
ppdu_info->rx_status.user_info_skip = 1;
hal_rx_parse_u_sig_cmn(hal_soc, rx_tlv, ppdu_info);
if (HAL_RX_MON_USIG_GET_PPDU_TYPE_N_COMP_MODE(rx_tlv) == 0 &&
@@ -1712,75 +1716,31 @@ hal_rx_parse_non_ofdma_users(struct hal_soc *hal_soc, void *tlv,
ppdu_info->rx_status.eht_known |=
QDF_MON_STATUS_EHT_NUM_NON_OFDMA_USERS_KNOWN;
ppdu_info->rx_status.eht_data[4] |= (non_ofdma_cmn_eb->num_users <<
ppdu_info->rx_status.eht_data[7] |= (non_ofdma_cmn_eb->num_users <<
QDF_MON_STATUS_EHT_NUM_NON_OFDMA_USERS_SHIFT);
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
static inline uint32_t
hal_rx_parse_ru_allocation(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
static inline void
hal_rx_parse_eht_mumimo_user_info(uint32_t *eht_user_info,
struct hal_eht_sig_mu_mimo_user_info
*user_info)
{
uint64_t *ehtsig_tlv = (uint64_t *)tlv;
struct hal_eht_sig_ofdma_cmn_eb1 *ofdma_cmn_eb1;
struct hal_eht_sig_ofdma_cmn_eb2 *ofdma_cmn_eb2;
uint8_t num_ru_allocation_known = 0;
*eht_user_info |= QDF_MON_STATUS_EHT_USER_STA_ID_KNOWN |
QDF_MON_STATUS_EHT_USER_MCS_KNOWN |
QDF_MON_STATUS_EHT_USER_CODING_KNOWN |
QDF_MON_STATUS_EHT_USER_SPATIAL_CONFIG_KNOWN;
ofdma_cmn_eb1 = (struct hal_eht_sig_ofdma_cmn_eb1 *)ehtsig_tlv;
ofdma_cmn_eb2 = (struct hal_eht_sig_ofdma_cmn_eb2 *)(ehtsig_tlv + 1);
*eht_user_info |= (user_info->sta_id <<
QDF_MON_STATUS_EHT_USER_STA_ID_SHIFT);
*eht_user_info |= (user_info->mcs <<
QDF_MON_STATUS_EHT_USER_MCS_SHIFT);
switch (ppdu_info->u_sig_info.bw) {
case HAL_EHT_BW_320_2:
case HAL_EHT_BW_320_1:
num_ru_allocation_known += 4;
ppdu_info->rx_status.eht_data[3] |=
(ofdma_cmn_eb2->ru_allocation2_6 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION2_6_SHIFT);
ppdu_info->rx_status.eht_data[3] |=
(ofdma_cmn_eb2->ru_allocation2_5 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION2_5_SHIFT);
ppdu_info->rx_status.eht_data[3] |=
(ofdma_cmn_eb2->ru_allocation2_4 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION2_4_SHIFT);
ppdu_info->rx_status.eht_data[2] |=
(ofdma_cmn_eb2->ru_allocation2_3 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION2_3_SHIFT);
fallthrough;
case HAL_EHT_BW_160:
num_ru_allocation_known += 2;
ppdu_info->rx_status.eht_data[2] |=
(ofdma_cmn_eb2->ru_allocation2_2 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION2_2_SHIFT);
ppdu_info->rx_status.eht_data[2] |=
(ofdma_cmn_eb2->ru_allocation2_1 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION2_1_SHIFT);
fallthrough;
case HAL_EHT_BW_80:
num_ru_allocation_known += 1;
ppdu_info->rx_status.eht_data[1] |=
(ofdma_cmn_eb1->ru_allocation1_2 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION1_2_SHIFT);
fallthrough;
case HAL_EHT_BW_40:
case HAL_EHT_BW_20:
num_ru_allocation_known += 1;
ppdu_info->rx_status.eht_data[1] |=
(ofdma_cmn_eb1->ru_allocation1_1 <<
QDF_MON_STATUS_EHT_RU_ALLOCATION1_1_SHIFT);
break;
default:
break;
}
ppdu_info->rx_status.eht_known |= (num_ru_allocation_known <<
QDF_MON_STATUS_EHT_NUM_KNOWN_RU_ALLOCATIONS_SHIFT);
return HAL_TLV_STATUS_PPDU_NOT_DONE;
*eht_user_info |= (user_info->coding <<
QDF_MON_STATUS_EHT_USER_CODING_SHIFT);
*eht_user_info |= (user_info->spatial_coding <<
QDF_MON_STATUS_EHT_USER_SPATIAL_CONFIG_SHIFT);
}
static inline uint32_t
@@ -1788,82 +1748,138 @@ hal_rx_parse_eht_sig_mumimo_user_info(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
struct hal_eht_sig_mu_mimo_user_info *user_info;
uint32_t user_idx = ppdu_info->rx_status.num_eht_user_info_valid;
struct mon_rx_status *rx_status;
struct mon_rx_user_status *rx_user_status;
uint32_t *eht_user_info;
uint32_t user_idx, i;
uint32_t *user_field;
user_info = (struct hal_eht_sig_mu_mimo_user_info *)tlv;
i = 0;
rx_status = &ppdu_info->rx_status;
user_field = (uint32_t *)((uint8_t *)tlv + ppdu_info->tlv_aggr.rd_idx);
ppdu_info->rx_status.eht_user_info[user_idx] |=
QDF_MON_STATUS_EHT_USER_STA_ID_KNOWN |
QDF_MON_STATUS_EHT_USER_MCS_KNOWN |
QDF_MON_STATUS_EHT_USER_CODING_KNOWN |
QDF_MON_STATUS_EHT_USER_SPATIAL_CONFIG_KNOWN;
while ((i++ < MAX_USR_INFO_STR_CNT) &&
(ppdu_info->tlv_aggr.rd_idx < ppdu_info->tlv_aggr.cur_len)) {
user_idx = rx_status->num_eht_user_info_valid;
rx_user_status = &ppdu_info->rx_user_status[user_idx];
user_info = (struct hal_eht_sig_mu_mimo_user_info *)user_field;
eht_user_info = &rx_user_status->eht_user_info;
ppdu_info->rx_status.eht_user_info[user_idx] |= (user_info->sta_id <<
QDF_MON_STATUS_EHT_USER_STA_ID_SHIFT);
ppdu_info->rx_status.eht_user_info[user_idx] |= (user_info->mcs <<
QDF_MON_STATUS_EHT_USER_MCS_SHIFT);
ppdu_info->rx_status.mcs = user_info->mcs;
hal_rx_parse_eht_mumimo_user_info(eht_user_info, user_info);
rx_status->mcs = user_info->mcs;
ppdu_info->rx_status.eht_user_info[user_idx] |= (user_info->coding <<
QDF_MON_STATUS_EHT_USER_CODING_SHIFT);
ppdu_info->rx_status.eht_user_info[user_idx] |=
(user_info->spatial_coding <<
QDF_MON_STATUS_EHT_USER_SPATIAL_CONFIG_SHIFT);
/* CRC for matched user block */
ppdu_info->rx_status.eht_known |=
/* CRC for matched user block */
rx_user_status->eht_known |=
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_KNOWN |
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_TAIL_KNOWN;
ppdu_info->rx_status.eht_data[4] |= (user_info->crc <<
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_SHIFT);
rx_user_status->eht_data[7] |=
(user_info->crc <<
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_SHIFT);
ppdu_info->rx_status.num_eht_user_info_valid++;
ppdu_info->tlv_aggr.rd_idx += 4;
user_field++;
rx_status->num_eht_user_info_valid++;
}
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
static inline uint32_t
static inline void
hal_rx_parse_eht_sig_mumimo_all_user_info(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
struct hal_eht_sig_mu_mimo_user_info *user_info;
uint32_t *eht_user_info;
uint32_t user_idx = ppdu_info->rx_status.num_eht_all_user_info_valid;
user_info = (struct hal_eht_sig_mu_mimo_user_info *)tlv;
eht_user_info = &ppdu_info->rx_status.eht_user_info[user_idx];
hal_rx_parse_eht_mumimo_user_info(eht_user_info, user_info);
ppdu_info->rx_status.num_eht_all_user_info_valid++;
}
static inline void
hal_rx_parse_eht_non_mumimo_user_info(uint32_t *eht_user_info,
struct hal_eht_sig_non_mu_mimo_user_info
*user_info)
{
*eht_user_info |= QDF_MON_STATUS_EHT_USER_STA_ID_KNOWN |
QDF_MON_STATUS_EHT_USER_MCS_KNOWN |
QDF_MON_STATUS_EHT_USER_CODING_KNOWN |
QDF_MON_STATUS_EHT_USER_NSS_KNOWN |
QDF_MON_STATUS_EHT_USER_BEAMFORMING_KNOWN;
*eht_user_info |= (user_info->sta_id <<
QDF_MON_STATUS_EHT_USER_STA_ID_SHIFT);
*eht_user_info |= (user_info->mcs <<
QDF_MON_STATUS_EHT_USER_MCS_SHIFT);
*eht_user_info |= (user_info->nss <<
QDF_MON_STATUS_EHT_USER_NSS_SHIFT);
*eht_user_info |= (user_info->beamformed <<
QDF_MON_STATUS_EHT_USER_BEAMFORMING_SHIFT);
*eht_user_info |= (user_info->coding <<
QDF_MON_STATUS_EHT_USER_CODING_SHIFT);
}
static inline void
hal_rx_parse_eht_sig_non_mumimo_user_info(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
struct hal_eht_sig_non_mu_mimo_user_info *user_info;
uint32_t user_idx = ppdu_info->rx_status.num_eht_user_info_valid;
struct mon_rx_status *rx_status;
struct mon_rx_user_status *rx_user_status;
uint32_t *eht_user_info;
uint32_t user_idx, i;
uint32_t *user_field;
i = 0;
rx_status = &ppdu_info->rx_status;
user_field = (uint32_t *)((uint8_t *)tlv + ppdu_info->tlv_aggr.rd_idx);
while ((i++ < MAX_USR_INFO_STR_CNT) &&
(ppdu_info->tlv_aggr.rd_idx < ppdu_info->tlv_aggr.cur_len)) {
user_idx = rx_status->num_eht_user_info_valid;
rx_user_status = &ppdu_info->rx_user_status[user_idx];
user_info =
(struct hal_eht_sig_non_mu_mimo_user_info *)user_field;
eht_user_info = &rx_user_status->eht_user_info;
hal_rx_parse_eht_non_mumimo_user_info(eht_user_info, user_info);
ppdu_info->rx_status.mcs = user_info->mcs;
/* CRC for matched user block */
rx_user_status->eht_known |=
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_KNOWN |
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_TAIL_KNOWN;
rx_user_status->eht_data[7] |=
(user_info->crc <<
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_SHIFT);
ppdu_info->tlv_aggr.rd_idx += 4;
user_field++;
rx_status->num_eht_user_info_valid++;
}
}
static inline void
hal_rx_parse_eht_sig_non_mumimo_all_user_info(struct hal_soc *hal_soc,
void *tlv, struct hal_rx_ppdu_info
*ppdu_info)
{
struct hal_eht_sig_non_mu_mimo_user_info *user_info;
uint32_t *eht_user_info;
uint32_t user_idx = ppdu_info->rx_status.num_eht_all_user_info_valid;
user_info = (struct hal_eht_sig_non_mu_mimo_user_info *)tlv;
ppdu_info->rx_status.eht_user_info[user_idx] |=
QDF_MON_STATUS_EHT_USER_STA_ID_KNOWN |
QDF_MON_STATUS_EHT_USER_MCS_KNOWN |
QDF_MON_STATUS_EHT_USER_CODING_KNOWN |
QDF_MON_STATUS_EHT_USER_NSS_KNOWN |
QDF_MON_STATUS_EHT_USER_BEAMFORMING_KNOWN;
eht_user_info = &ppdu_info->rx_status.eht_user_info[user_idx];
ppdu_info->rx_status.eht_user_info[user_idx] |= (user_info->sta_id <<
QDF_MON_STATUS_EHT_USER_STA_ID_SHIFT);
ppdu_info->rx_status.eht_user_info[user_idx] |= (user_info->mcs <<
QDF_MON_STATUS_EHT_USER_MCS_SHIFT);
ppdu_info->rx_status.mcs = user_info->mcs;
hal_rx_parse_eht_non_mumimo_user_info(eht_user_info, user_info);
ppdu_info->rx_status.eht_user_info[user_idx] |= (user_info->nss <<
QDF_MON_STATUS_EHT_USER_NSS_SHIFT);
ppdu_info->rx_status.nss = user_info->nss + 1;
ppdu_info->rx_status.eht_user_info[user_idx] |=
(user_info->beamformed <<
QDF_MON_STATUS_EHT_USER_BEAMFORMING_SHIFT);
ppdu_info->rx_status.eht_user_info[user_idx] |= (user_info->coding <<
QDF_MON_STATUS_EHT_USER_CODING_SHIFT);
/* CRC for matched user block */
ppdu_info->rx_status.eht_known |=
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_KNOWN |
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_TAIL_KNOWN;
ppdu_info->rx_status.eht_data[4] |= (user_info->crc <<
QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_SHIFT);
ppdu_info->rx_status.num_eht_user_info_valid++;
return HAL_TLV_STATUS_PPDU_NOT_DONE;
ppdu_info->rx_status.num_eht_all_user_info_valid++;
}
static inline bool hal_rx_is_ofdma(struct hal_soc *hal_soc,
@@ -1940,9 +1956,9 @@ hal_rx_parse_eht_sig_ndp(struct hal_soc *hal_soc, void *tlv,
ppdu_info->rx_status.eht_data[0] |= (0xF <<
QDF_MON_STATUS_EHT_NDP_DISREGARD_SHIFT);
ppdu_info->rx_status.eht_data[4] |= (eht_sig_ndp->nss <<
ppdu_info->rx_status.eht_data[7] |= (eht_sig_ndp->nss <<
QDF_MON_STATUS_EHT_NDP_NSS_SHIFT);
ppdu_info->rx_status.eht_data[4] |= (eht_sig_ndp->beamformed <<
ppdu_info->rx_status.eht_data[7] |= (eht_sig_ndp->beamformed <<
QDF_MON_STATUS_EHT_NDP_BEAMFORMED_SHIFT);
ppdu_info->rx_status.eht_data[0] |= (eht_sig_ndp->crc <<
@@ -1951,56 +1967,6 @@ hal_rx_parse_eht_sig_ndp(struct hal_soc *hal_soc, void *tlv,
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
static inline uint32_t
hal_rx_parse_eht_sig_non_ofdma(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
void *user_info = (void *)((uint8_t *)tlv + 4);
hal_rx_parse_usig_overflow(hal_soc, tlv, ppdu_info);
hal_rx_parse_non_ofdma_users(hal_soc, tlv, ppdu_info);
if (hal_rx_is_mu_mimo_user(hal_soc, ppdu_info))
hal_rx_parse_eht_sig_mumimo_user_info(hal_soc, user_info,
ppdu_info);
else
hal_rx_parse_eht_sig_non_mumimo_user_info(hal_soc, user_info,
ppdu_info);
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
static inline uint32_t
hal_rx_parse_eht_sig_ofdma(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
uint64_t *eht_sig_tlv = (uint64_t *)tlv;
void *user_info = (void *)(eht_sig_tlv + 2);
hal_rx_parse_usig_overflow(hal_soc, tlv, ppdu_info);
hal_rx_parse_ru_allocation(hal_soc, tlv, ppdu_info);
hal_rx_parse_eht_sig_non_mumimo_user_info(hal_soc, user_info,
ppdu_info);
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
static inline uint32_t
hal_rx_parse_eht_sig_hdr(struct hal_soc *hal_soc, uint8_t *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
ppdu_info->rx_status.eht_flags = 1;
if (hal_rx_is_frame_type_ndp(hal_soc, ppdu_info))
hal_rx_parse_eht_sig_ndp(hal_soc, tlv, ppdu_info);
else if (hal_rx_is_non_ofdma(hal_soc, ppdu_info))
hal_rx_parse_eht_sig_non_ofdma(hal_soc, tlv, ppdu_info);
else if (hal_rx_is_ofdma(hal_soc, ppdu_info))
hal_rx_parse_eht_sig_ofdma(hal_soc, tlv, ppdu_info);
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
#ifdef WLAN_FEATURE_11BE
static inline void
hal_rx_parse_punctured_pattern(struct phyrx_common_user_info *cmn_usr_info,
@@ -2176,11 +2142,8 @@ hal_rx_parse_receive_user_info(struct hal_soc *hal_soc, uint8_t *tlv,
uint32_t rtap_ru_size = IEEE80211_EHT_RU_INVALID;
uint32_t ru_width;
ppdu_info->rx_status.eht_known |=
QDF_MON_STATUS_EHT_CONTENT_CH_INDEX_KNOWN;
ppdu_info->rx_status.eht_data[0] |=
(rx_usr_info->dl_ofdma_content_channel <<
QDF_MON_STATUS_EHT_CONTENT_CH_INDEX_SHIFT);
if (ppdu_info->rx_status.user_info_skip)
return HAL_TLV_STATUS_PPDU_NOT_DONE;
switch (rx_usr_info->reception_type) {
case HAL_RECEPTION_TYPE_SU:
@@ -2223,6 +2186,18 @@ hal_rx_parse_receive_user_info(struct hal_soc *hal_soc, uint8_t *tlv,
if (user_id < HAL_MAX_UL_MU_USERS) {
mon_rx_user_status =
&ppdu_info->rx_user_status[user_id];
mon_rx_user_status->eht_known |=
QDF_MON_STATUS_EHT_CONTENT_CH_INDEX_KNOWN;
mon_rx_user_status->eht_data[0] |=
(rx_usr_info->dl_ofdma_content_channel <<
QDF_MON_STATUS_EHT_CONTENT_CH_INDEX_SHIFT);
mon_rx_user_status->is_stbc =
ppdu_info->rx_status.is_stbc;
mon_rx_user_status->ldpc =
ppdu_info->rx_status.ldpc;
mon_rx_user_status->dcm =
ppdu_info->rx_status.dcm;
mon_rx_user_status->mcs = ppdu_info->rx_status.mcs;
mon_rx_user_status->nss = ppdu_info->rx_status.nss;
}
@@ -2331,18 +2306,114 @@ hal_rx_parse_receive_user_info(struct hal_soc *hal_soc, uint8_t *tlv,
rtap_ru_size = hal_rx_mon_hal_ru_size_to_ieee80211_ru_size(hal_soc,
ru_size);
if (rtap_ru_size != IEEE80211_EHT_RU_INVALID) {
ppdu_info->rx_status.eht_known |=
QDF_MON_STATUS_EHT_RU_MRU_SIZE_KNOWN;
ppdu_info->rx_status.eht_data[1] |= (rtap_ru_size <<
QDF_MON_STATUS_EHT_RU_MRU_SIZE_SHIFT);
if (rx_usr_info->pkt_type == HAL_RX_PKT_TYPE_11AX &&
mon_rx_user_status) {
if (ru_index != HAL_EHT_RU_INVALID) {
mon_rx_user_status->he_data2 |=
QDF_MON_STATUS_RU_ALLOCATION_OFFSET_KNOWN;
mon_rx_user_status->he_data2 |=
ru_index << QDF_MON_STATUS_RU_ALLOCATION_SHIFT;
}
}
if (ru_index != HAL_EHT_RU_INVALID) {
ppdu_info->rx_status.eht_known |=
if (rx_usr_info->pkt_type == HAL_RX_PKT_TYPE_11BE &&
mon_rx_user_status) {
if (rtap_ru_size != IEEE80211_EHT_RU_INVALID) {
mon_rx_user_status->eht_known |=
QDF_MON_STATUS_EHT_RU_MRU_SIZE_KNOWN;
mon_rx_user_status->eht_data[1] |= (rtap_ru_size <<
QDF_MON_STATUS_EHT_RU_MRU_SIZE_SHIFT);
}
if (ru_index != HAL_EHT_RU_INVALID) {
mon_rx_user_status->eht_known |=
QDF_MON_STATUS_EHT_RU_MRU_INDEX_KNOWN;
ppdu_info->rx_status.eht_data[1] |= (ru_index <<
mon_rx_user_status->eht_data[1] |= (ru_index <<
QDF_MON_STATUS_EHT_RU_MRU_INDEX_SHIFT);
}
}
if (rx_usr_info->pkt_type == HAL_RX_PKT_TYPE_11AX &&
mon_rx_user_status) {
if (ppdu_info->rx_status.reception_type ==
HAL_RX_TYPE_MU_MIMO) {
ppdu_info->rx_status.he_mu_flags = 1;
/* HE-data1 */
mon_rx_user_status->he_data1 |=
QDF_MON_STATUS_HE_MCS_KNOWN |
QDF_MON_STATUS_HE_CODING_KNOWN;
/* HE-data2 */
/* HE-data3 */
mon_rx_user_status->he_data3 |=
mon_rx_user_status->mcs <<
QDF_MON_STATUS_TRANSMIT_MCS_SHIFT;
mon_rx_user_status->he_data3 |=
ppdu_info->rx_status.ldpc <<
QDF_MON_STATUS_CODING_SHIFT;
/* HE-data4 */
mon_rx_user_status->he_data4 |=
mon_rx_user_status->sta_id <<
QDF_MON_STATUS_STA_ID_SHIFT;
/* HE-data5 */
/* HE-data6 */
mon_rx_user_status->he_data6 |=
mon_rx_user_status->nss <<
QDF_MON_STATUS_HE_DATA_6_NSS_SHIFT;
}
if (ppdu_info->rx_status.reception_type ==
HAL_RX_TYPE_MU_OFDMA) {
ppdu_info->rx_status.he_mu_flags = 1;
/* HE-data1 */
mon_rx_user_status->he_data1 |=
QDF_MON_STATUS_HE_MCS_KNOWN |
QDF_MON_STATUS_HE_DCM_KNOWN |
QDF_MON_STATUS_HE_CODING_KNOWN;
/* HE-data2 */
/* HE-data3 */
mon_rx_user_status->he_data3 |=
mon_rx_user_status->mcs <<
QDF_MON_STATUS_TRANSMIT_MCS_SHIFT;
mon_rx_user_status->he_data3 |=
mon_rx_user_status->dcm <<
QDF_MON_STATUS_DCM_SHIFT;
mon_rx_user_status->he_data3 |=
mon_rx_user_status->ldpc <<
QDF_MON_STATUS_CODING_SHIFT;
/* HE-data4 */
mon_rx_user_status->he_data4 |=
mon_rx_user_status->sta_id <<
QDF_MON_STATUS_STA_ID_SHIFT;
/* HE-data5 */
//txbf not exist
mon_rx_user_status->he_data5 |=
mon_rx_user_status->beamformed <<
QDF_MON_STATUS_TXBF_SHIFT;
/* HE-data6 */
mon_rx_user_status->he_data6 |=
mon_rx_user_status->nss <<
QDF_MON_STATUS_HE_DATA_6_NSS_SHIFT;
mon_rx_user_status->he_flags1 =
ppdu_info->rx_status.he_flags1;
mon_rx_user_status->he_flags2 =
ppdu_info->rx_status.he_flags2;
}
}
if (mon_rx_user_status && ru_index != HAL_EHT_RU_INVALID &&
@@ -2483,6 +2554,72 @@ hal_rx_record_tlv_info(struct hal_rx_ppdu_info *ppdu_info, uint32_t tlv_tag) {
}
#endif
#ifdef HE_SIG_A_MU_UL_INFO_FORMAT_INDICATION_OFFSET
/**
* hal_rx_he_sig_a_mu_ul_e_handle() - handle TLV info for he_sig_a_mu_ul_info
* @ppdu_info: pointer to ppdu_info
* @rx_tlv: pointer to tlv
*
* Return
*/
static inline void
hal_rx_he_sig_a_mu_ul_e_handle(struct hal_rx_ppdu_info *ppdu_info,
uint8_t *rx_tlv) {
uint32_t value;
uint8_t *he_sig_a_mu_ul_info = (uint8_t *)rx_tlv;
ppdu_info->rx_status.he_flags = 1;
ppdu_info->rx_status.user_info_skip = 1;
value = HAL_RX_GET(he_sig_a_mu_ul_info, HE_SIG_A_MU_UL_INFO,
FORMAT_INDICATION);
if (value == 0) {
ppdu_info->rx_status.he_data1 =
QDF_MON_STATUS_HE_TRIG_FORMAT_TYPE;
} else {
ppdu_info->rx_status.he_data1 =
QDF_MON_STATUS_HE_SU_FORMAT_TYPE;
}
/* data1 */
ppdu_info->rx_status.he_data1 |=
QDF_MON_STATUS_HE_BSS_COLOR_KNOWN |
QDF_MON_STATUS_HE_DATA_BW_RU_KNOWN;
/* data2 */
ppdu_info->rx_status.he_data2 |=
QDF_MON_STATUS_TXOP_KNOWN;
/* data3 */
value = HAL_RX_GET(he_sig_a_mu_ul_info,
HE_SIG_A_MU_UL_INFO, BSS_COLOR_ID);
ppdu_info->rx_status.he_data3 = value;
/* data4 */
/* data5 */
value = HAL_RX_GET(he_sig_a_mu_ul_info,
HE_SIG_A_MU_UL_INFO, TRANSMIT_BW);
ppdu_info->rx_status.he_data5 = value;
ppdu_info->rx_status.bw = value;
/* data6 */
value = HAL_RX_GET(he_sig_a_mu_ul_info, HE_SIG_A_MU_UL_INFO,
TXOP_DURATION);
value = value << QDF_MON_STATUS_TXOP_SHIFT;
ppdu_info->rx_status.he_data6 |= value;
ppdu_info->rx_status.mu_dl_ul = HAL_RX_TYPE_UL;
ppdu_info->rx_status.reception_type = HAL_RX_TYPE_MU_MIMO;
}
#else
static inline void
hal_rx_he_sig_a_mu_ul_e_handle(struct hal_rx_ppdu_info *ppdu_info,
uint8_t *rx_tlv) {
}
#endif
/**
* hal_rx_status_get_tlv_info_generic_be() - process receive info TLV
* @rx_tlv_hdr: pointer to TLV header
@@ -2992,6 +3129,8 @@ hal_rx_status_get_tlv_info_generic_be(void *rx_tlv_hdr, void *ppduinfo,
ppdu_info->rx_status.he_data3 |= value;
value = HAL_RX_GET(he_sig_a_su_info,
HE_SIG_A_SU_INFO, DL_UL_FLAG);
ppdu_info->rx_status.mu_dl_ul = HAL_RX_TYPE_DL;
value = value << QDF_MON_STATUS_DL_UL_SHIFT;
ppdu_info->rx_status.he_data3 |= value;
@@ -3257,6 +3396,11 @@ hal_rx_status_get_tlv_info_generic_be(void *rx_tlv_hdr, void *ppduinfo,
ppdu_info->rx_status.reception_type = HAL_RX_TYPE_MU_MIMO;
break;
}
case WIFIPHYRX_HE_SIG_A_MU_UL_E:
{
hal_rx_he_sig_a_mu_ul_e_handle(ppdu_info, rx_tlv);
break;
}
case WIFIPHYRX_HE_SIG_B1_MU_E:
{
uint8_t *he_sig_b1_mu_info = (uint8_t *)rx_tlv +
@@ -3416,6 +3560,9 @@ hal_rx_status_get_tlv_info_generic_be(void *rx_tlv_hdr, void *ppduinfo,
default:
break;
}
ppdu_info->rx_status.ul_mu_type = reception_type;
hal_rx_update_rssi_chain(ppdu_info, rssi_info_tlv);
rssi_value = HAL_RX_GET_64(rssi_info_tlv,
RECEIVE_RSSI_INFO,
@@ -3707,6 +3854,7 @@ hal_rx_status_start_new_aggr_tlv(struct hal_soc *hal_soc, void *rx_tlv_hdr,
ppdu_info->tlv_aggr.in_progress = 1;
ppdu_info->tlv_aggr.tlv_tag = tlv_tag;
ppdu_info->tlv_aggr.cur_len = 0;
ppdu_info->tlv_aggr.rd_idx = 0;
return hal_rx_status_aggr_tlv(hal_soc, rx_tlv_hdr, ppdu_info, nbuf);
}

3
hal/wifi3.0/be/hal_be_generic_api.c
Просмотреть файл

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -995,4 +995,5 @@ void hal_hw_txrx_default_ops_attach_be(struct hal_soc *hal_soc)
hal_rx_get_phy_ppdu_id_size_be;
hal_soc->ops->hal_rx_phy_legacy_get_rssi =
hal_rx_phy_legacy_get_rssi_be;
hal_soc->ops->hal_rx_parse_eht_sig_hdr = hal_rx_parse_eht_sig_hdr_be;
}

17
hal/wifi3.0/be/hal_be_rx_tlv.h
Просмотреть файл

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -2584,4 +2584,19 @@ hal_rx_msdu_end_sa_sw_peer_id_get_be(uint8_t *buf)
return HAL_RX_MSDU_END_SA_SW_PEER_ID_GET(msdu_end);
}
/**
* hal_rx_parse_eht_sig_hdr_be()
* - process eht sig header
* @hal_soc: HAL soc handle
* @tlv: pointer to EHT SIG TLV buffer
* @ppdu_info_handle: pointer to ppdu_info
*
* Return: None
*/
static inline
void hal_rx_parse_eht_sig_hdr_be(struct hal_soc *hal_soc, uint8_t *tlv,
void *ppdu_info_handle)
{
}
#endif /* _HAL_BE_RX_TLV_H_ */

23
hal/wifi3.0/hal_api_mon.h
Просмотреть файл

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2017-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -1201,18 +1201,20 @@ enum ieee80211_eht_ru_size {
(HAL_EHT_RU_996x3 << HAL_RU_SHIFT(HAL_80_2, 0)) | \
(HAL_EHT_RU_484 << HAL_RU_SHIFT(HAL_80_3, 0)))
#define HAL_RX_MON_MAX_AGGR_SIZE 128
#define HAL_RX_MON_MAX_AGGR_SIZE 192
/**
* struct hal_rx_tlv_aggr_info - Data structure to hold
* metadata for aggregatng repeated TLVs
* @in_progress: Flag to indicate if TLV aggregation is in progress
* @rd_idx: idx to current section of TLV
* @cur_len: Total length of currently aggregated TLV
* @tlv_tag: TLV tag which is currently being aggregated
* @buf: Buffer containing aggregated TLV data
*/
struct hal_rx_tlv_aggr_info {
uint8_t in_progress;
uint8_t rd_idx;
uint16_t cur_len;
uint32_t tlv_tag;
uint8_t buf[HAL_RX_MON_MAX_AGGR_SIZE];
@@ -1371,6 +1373,23 @@ hal_rx_status_get_next_tlv(uint8_t *rx_tlv, bool is_tlv_hdr_64_bit) {
tlv_hdr_size);
}
/**
* hal_rx_parse_eht_sig_hdr()
* - process eht sig header
* @hal_soc: HAL soc handle
* @tlv: pointer to EHT SIG TLV buffer
* @ppdu_info: pointer to ppdu_info
*
* Return: None
*/
static inline void hal_rx_parse_eht_sig_hdr(struct hal_soc *hal_soc,
uint8_t *tlv,
struct hal_rx_ppdu_info
*ppdu_info)
{
hal_soc->ops->hal_rx_parse_eht_sig_hdr(hal_soc, tlv, (void *)ppdu_info);
}
/**
* hal_rx_proc_phyrx_other_receive_info_tlv()
* - process other receive info TLV

5
hal/wifi3.0/hal_internal.h
Просмотреть файл

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -1469,6 +1469,9 @@ struct hal_hw_txrx_ops {
hal_soc_handle_t hal_soc_hdl);
uint32_t (*hal_tx_ring_halt_get)(hal_soc_handle_t hal_soc_hdl);
bool (*hal_rx_en_mcast_fp_data_filter)(void);
void (*hal_rx_parse_eht_sig_hdr)(struct hal_soc *hal_soc,
uint8_t *tlv,
void *ppdu_info_handle);
};
/**

18
hal/wifi3.0/li/hal_li_generic_api.c
Просмотреть файл

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2016-2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -1072,6 +1072,21 @@ static inline uint8_t hal_rx_get_phy_ppdu_id_size_li(void)
return sizeof(uint32_t);
}
/**
* hal_rx_parse_eht_sig_hdr_li()
* - process eht sig header
* @hal_soc: HAL soc handle
* @tlv: pointer to EHT SIG TLV buffer
* @ppdu_info_handle: pointer to ppdu_info
*
* Return: None
*/
static inline
void hal_rx_parse_eht_sig_hdr_li(struct hal_soc *hal_soc, uint8_t *tlv,
void *ppdu_info_handle)
{
}
void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
{
hal_soc->ops->hal_get_reo_qdesc_size = hal_get_reo_qdesc_size_li;
@@ -1160,4 +1175,5 @@ void hal_hw_txrx_default_ops_attach_li(struct hal_soc *hal_soc)
hal_rx_get_phy_ppdu_id_size_li;
hal_soc->ops->hal_rx_phy_legacy_get_rssi =
hal_rx_phy_legacy_get_rssi_li;
hal_soc->ops->hal_rx_parse_eht_sig_hdr = hal_rx_parse_eht_sig_hdr_li;
}

264
hal/wifi3.0/qcn9224/hal_9224.h
Просмотреть файл

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -137,6 +137,16 @@ defined(WLAN_PKT_CAPTURE_RX_2_0)
#include "hal_be_rx_tlv.h"
#include <hal_be_generic_api.h>
enum hal_all_sigb_pkt_type {
HAL_SIGB_RX_PKT_TYPE_11A = 0,
HAL_SIGB_RX_PKT_TYPE_11B,
HAL_SIGB_RX_PKT_TYPE_HT_MM,
HAL_SIGB_RX_PKT_TYPE_11AC,
HAL_SIGB_RX_PKT_TYPE_11AX,
HAL_SIGB_RX_PKT_TYPE_HT_GF,
HAL_SIGB_RX_PKT_TYPE_11BE,
};
#define PMM_REG_BASE_QCN9224 0xB500F8
/**
@@ -325,9 +335,13 @@ static inline
void hal_rx_proc_phyrx_other_receive_info_tlv_9224(void *rx_tlv_hdr,
void *ppdu_info_hdl)
{
uint32_t tlv_len, tlv_tag;
uint32_t tlv_tag, tlv_len, pkt_type;
void *rx_tlv;
struct hal_rx_ppdu_info *ppdu_info = ppdu_info_hdl;
uint32_t ru_details_channel_0;
struct hal_rx_ppdu_info *ppdu_info =
(struct hal_rx_ppdu_info *)ppdu_info_hdl;
hal_rx_proc_phyrx_all_sigb_tlv_9224(rx_tlv_hdr, ppdu_info_hdl);
tlv_len = HAL_RX_GET_USER_TLV32_LEN(rx_tlv_hdr);
rx_tlv = (uint8_t *)rx_tlv_hdr + HAL_RX_TLV64_HDR_SIZE;
@@ -336,32 +350,240 @@ void hal_rx_proc_phyrx_other_receive_info_tlv_9224(void *rx_tlv_hdr,
return;
tlv_tag = HAL_RX_GET_USER_TLV32_TYPE(rx_tlv);
tlv_len = HAL_RX_GET_USER_TLV32_LEN(rx_tlv);
rx_tlv = (uint8_t *)rx_tlv + HAL_RX_TLV64_HDR_SIZE;
if (!tlv_len)
return;
pkt_type = HAL_RX_GET_64(rx_tlv,
PHYRX_OTHER_RECEIVE_INFO_ALL_SIGB_DETAILS,
PKT_TYPE);
switch (tlv_tag) {
case WIFIPHYRX_OTHER_RECEIVE_INFO_EVM_DETAILS_E:
/* Skip TLV length to get TLV content */
rx_tlv = (uint8_t *)rx_tlv + HAL_RX_TLV64_HDR_SIZE;
ppdu_info->evm_info.number_of_symbols = HAL_RX_GET(rx_tlv,
PHYRX_OTHER_RECEIVE_INFO,
EVM_DETAILS_NUMBER_OF_DATA_SYM);
ppdu_info->evm_info.pilot_count = HAL_RX_GET(rx_tlv,
PHYRX_OTHER_RECEIVE_INFO,
EVM_DETAILS_NUMBER_OF_PILOTS);
ppdu_info->evm_info.nss_count = HAL_RX_GET(rx_tlv,
PHYRX_OTHER_RECEIVE_INFO,
EVM_DETAILS_NUMBER_OF_STREAMS);
hal_rx_update_su_evm_info(rx_tlv, ppdu_info_hdl);
case WIFIPHYRX_OTHER_RECEIVE_INFO_RU_DETAILS_E:
if (pkt_type ==
HAL_RX_PKT_TYPE_11AX) {
ru_details_channel_0 =
HAL_RX_GET(rx_tlv,
PHYRX_OTHER_RECEIVE_INFO_RU_DETAILS,
RU_DETAILS_CHANNEL_0);
qdf_mem_copy(ppdu_info->rx_status.he_RU,
&ru_details_channel_0,
sizeof(ppdu_info->rx_status.he_RU));
ppdu_info->rx_status.he_flags1 |=
QDF_MON_STATUS_CHANNEL_1_RU_KNOWN;
if (ppdu_info->rx_status.bw >= HAL_FULL_RX_BW_40) {
ppdu_info->rx_status.he_flags1 |=
QDF_MON_STATUS_CHANNEL_2_RU_KNOWN;
}
}
break;
default:
QDF_TRACE(QDF_MODULE_ID_HAL, QDF_TRACE_LEVEL_DEBUG,
QDF_TRACE(QDF_MODULE_ID_DP, QDF_TRACE_LEVEL_ERROR,
"%s unhandled TLV type: %d, TLV len:%d",
__func__, tlv_tag, tlv_len);
break;
}
}
static inline uint32_t
hal_rx_parse_ru_allocation_9224(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
uint64_t *ehtsig_tlv = (uint64_t *)tlv;
struct hal_eht_sig_ofdma_cmn_eb1 *ofdma_cc1_cmn_eb1;
struct hal_eht_sig_ofdma_cmn_eb1 *ofdma_cc2_cmn_eb1;
struct hal_eht_sig_ofdma_cmn_eb2 *ofdma_cc1_cmn_eb2;
struct hal_eht_sig_ofdma_cmn_eb2 *ofdma_cc2_cmn_eb2;
uint8_t num_ru_allocation_known = 0;
ofdma_cc1_cmn_eb1 = (struct hal_eht_sig_ofdma_cmn_eb1 *)ehtsig_tlv;
ofdma_cc2_cmn_eb1 =
(struct hal_eht_sig_ofdma_cmn_eb1 *)(ehtsig_tlv + 1);
ofdma_cc1_cmn_eb2 =
(struct hal_eht_sig_ofdma_cmn_eb2 *)(ehtsig_tlv + 2);
ofdma_cc2_cmn_eb2 =
(struct hal_eht_sig_ofdma_cmn_eb2 *)(ehtsig_tlv + 3);
switch (ppdu_info->u_sig_info.bw) {
case HAL_EHT_BW_320_2:
case HAL_EHT_BW_320_1:
num_ru_allocation_known += 8;
ppdu_info->rx_status.eht_data[4] |=
(ofdma_cc1_cmn_eb2->ru_allocation2_3 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_5_SHIFT);
ppdu_info->rx_status.eht_data[4] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_5_SHIFT;
ppdu_info->rx_status.eht_data[4] |=
(ofdma_cc2_cmn_eb2->ru_allocation2_3 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_5_SHIFT);
ppdu_info->rx_status.eht_data[4] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_5_SHIFT;
ppdu_info->rx_status.eht_data[5] |=
(ofdma_cc1_cmn_eb2->ru_allocation2_4 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_6_SHIFT);
ppdu_info->rx_status.eht_data[5] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_6_SHIFT;
ppdu_info->rx_status.eht_data[5] |=
(ofdma_cc2_cmn_eb2->ru_allocation2_4 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_6_SHIFT);
ppdu_info->rx_status.eht_data[5] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_6_SHIFT;
ppdu_info->rx_status.eht_data[5] |=
(ofdma_cc1_cmn_eb2->ru_allocation2_5 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_7_SHIFT);
ppdu_info->rx_status.eht_data[5] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_7_SHIFT;
ppdu_info->rx_status.eht_data[6] |=
(ofdma_cc2_cmn_eb2->ru_allocation2_5 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_7_SHIFT);
ppdu_info->rx_status.eht_data[6] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_7_SHIFT;
ppdu_info->rx_status.eht_data[6] |=
(ofdma_cc1_cmn_eb2->ru_allocation2_6 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_8_SHIFT);
ppdu_info->rx_status.eht_data[6] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_8_SHIFT;
ppdu_info->rx_status.eht_data[6] |=
(ofdma_cc2_cmn_eb2->ru_allocation2_6 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_8_SHIFT);
num_ru_allocation_known += 4;
fallthrough;
case HAL_EHT_BW_160:
ppdu_info->rx_status.eht_data[3] |=
(ofdma_cc1_cmn_eb2->ru_allocation2_1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_3_SHIFT);
ppdu_info->rx_status.eht_data[3] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_3_SHIFT;
ppdu_info->rx_status.eht_data[3] |=
(ofdma_cc2_cmn_eb2->ru_allocation2_1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_3_SHIFT);
ppdu_info->rx_status.eht_data[3] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_3_SHIFT;
ppdu_info->rx_status.eht_data[3] |=
(ofdma_cc1_cmn_eb2->ru_allocation2_2 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_4_SHIFT);
ppdu_info->rx_status.eht_data[3] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_4_SHIFT;
ppdu_info->rx_status.eht_data[4] |=
(ofdma_cc2_cmn_eb2->ru_allocation2_2 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_4_SHIFT);
ppdu_info->rx_status.eht_data[4] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_4_SHIFT;
ppdu_info->tlv_aggr.rd_idx += 16;
fallthrough;
case HAL_EHT_BW_80:
num_ru_allocation_known += 2;
ppdu_info->rx_status.eht_data[2] |=
(ofdma_cc1_cmn_eb1->ru_allocation1_2 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_2_SHIFT);
ppdu_info->rx_status.eht_data[2] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_2_SHIFT;
ppdu_info->rx_status.eht_data[2] |=
(ofdma_cc2_cmn_eb1->ru_allocation1_2 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_2_SHIFT);
ppdu_info->rx_status.eht_data[2] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_2_SHIFT;
fallthrough;
case HAL_EHT_BW_40:
num_ru_allocation_known += 1;
ppdu_info->rx_status.eht_data[2] |=
(ofdma_cc2_cmn_eb1->ru_allocation1_1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_1_SHIFT);
ppdu_info->rx_status.eht_data[2] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_1_SHIFT;
ppdu_info->tlv_aggr.rd_idx += 8;
fallthrough;
case HAL_EHT_BW_20:
num_ru_allocation_known += 1;
ppdu_info->rx_status.eht_data[1] |=
(ofdma_cc1_cmn_eb1->ru_allocation1_1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_1_SHIFT);
ppdu_info->rx_status.eht_data[1] |= 1 <<
QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_1_SHIFT;
ppdu_info->tlv_aggr.rd_idx += 8;
break;
default:
break;
}
ppdu_info->rx_status.eht_known |= (num_ru_allocation_known <<
QDF_MON_STATUS_EHT_NUM_KNOWN_RU_ALLOCATIONS_SHIFT);
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
static inline uint32_t
hal_rx_parse_eht_sig_non_ofdma_9224(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
hal_rx_parse_usig_overflow(hal_soc, tlv, ppdu_info);
hal_rx_parse_non_ofdma_users(hal_soc, tlv, ppdu_info);
if (hal_rx_is_mu_mimo_user(hal_soc, ppdu_info)) {
ppdu_info->tlv_aggr.rd_idx += 16;
hal_rx_parse_eht_sig_mumimo_user_info(hal_soc, tlv,
ppdu_info);
} else {
ppdu_info->tlv_aggr.rd_idx += 4;
hal_rx_parse_eht_sig_non_mumimo_user_info(hal_soc, tlv,
ppdu_info);
}
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
static inline uint32_t
hal_rx_parse_eht_sig_ofdma_9224(struct hal_soc *hal_soc, void *tlv,
struct hal_rx_ppdu_info *ppdu_info)
{
hal_rx_parse_usig_overflow(hal_soc, tlv, ppdu_info);
hal_rx_parse_ru_allocation_9224(hal_soc, tlv, ppdu_info);
hal_rx_parse_eht_sig_non_mumimo_user_info(hal_soc, tlv,
ppdu_info);
return HAL_TLV_STATUS_PPDU_NOT_DONE;
}
/**
* hal_rx_parse_eht_sig_hdr_9224()
* - process eht sig header
* @hal_soc: HAL soc handle
* @tlv: pointer to EHT SIG TLV buffer
* @ppdu_info_handle: pointer to ppdu_info
*
* Return: None
*/
static
void hal_rx_parse_eht_sig_hdr_9224(struct hal_soc *hal_soc,
uint8_t *tlv,
void *ppdu_info_handle)
{
struct hal_rx_ppdu_info *ppdu_info = ppdu_info_handle;
ppdu_info->rx_status.eht_flags = 1;
if (hal_rx_is_frame_type_ndp(hal_soc, ppdu_info))
hal_rx_parse_eht_sig_ndp(hal_soc, tlv, ppdu_info);
else if (hal_rx_is_non_ofdma(hal_soc, ppdu_info))
hal_rx_parse_eht_sig_non_ofdma_9224(hal_soc, tlv, ppdu_info);
else if (hal_rx_is_ofdma(hal_soc, ppdu_info))
hal_rx_parse_eht_sig_ofdma_9224(hal_soc, tlv, ppdu_info);
}
#else
@@ -1591,6 +1813,8 @@ static void hal_hw_txrx_ops_attach_qcn9224(struct hal_soc *hal_soc)
hal_soc->ops->hal_rx_mon_hw_desc_get_mpdu_status =
hal_rx_mon_hw_desc_get_mpdu_status_be;
hal_soc->ops->hal_rx_get_tlv = hal_rx_get_tlv_9224;
hal_soc->ops->hal_rx_parse_eht_sig_hdr =
hal_rx_parse_eht_sig_hdr_9224;
hal_soc->ops->hal_rx_proc_phyrx_other_receive_info_tlv =
hal_rx_proc_phyrx_other_receive_info_tlv_9224;

4
hal/wifi3.0/qcn9224/hal_9224_rx.h
Просмотреть файл

@@ -1,6 +1,6 @@
/*
* Copyright (c) 2021 The Linux Foundation. All rights reserved.
* Copyright (c) 2021-2023 Qualcomm Innovation Center, Inc. All rights reserved.
* Copyright (c) 2021-2024 Qualcomm Innovation Center, Inc. All rights reserved.
*
* Permission to use, copy, modify, and/or distribute this software for
* any purpose with or without fee is hereby granted, provided that the
@@ -41,6 +41,8 @@
#include "phyrx_other_receive_info_evm_details.h"
#endif /* WLAN_SA_API_ENABLE && QCA_WIFI_QCA9574 */
#include "phyrx_other_receive_info_all_sigb_details.h"
#define HAL_RX_MSDU0_BUFFER_ADDR_LSB(link_desc_va) \
(uint8_t *)(link_desc_va) + \
RX_MSDU_LINK_MSDU_0_BUFFER_ADDR_INFO_DETAILS_BUFFER_ADDR_31_0_OFFSET

108
qdf/inc/qdf_nbuf.h
Просмотреть файл

@@ -262,7 +262,7 @@ typedef __qdf_nbuf_queue_t qdf_nbuf_queue_t;
#define RADIOTAP_HE_MU_FLAGS_LEN (8 + 1)
#define RADIOTAP_HE_MU_OTHER_FLAGS_LEN (18 + 1)
#define RADIOTAP_U_SIG_FLAGS_LEN (12 + 3)
#define RADIOTAP_EHT_FLAGS_LEN (32 + 3)
#define RADIOTAP_EHT_FLAGS_LEN (58 + 3)
#define RADIOTAP_FIXED_HEADER_LEN 17
#define RADIOTAP_HT_FLAGS_LEN 3
#define RADIOTAP_AMPDU_STATUS_LEN (8 + 3)
@@ -334,6 +334,8 @@ typedef __qdf_nbuf_queue_t qdf_nbuf_queue_t;
* @ltf_size: ltf size
* @tx_status: packet tx status
* @mu_dl_ul: MU down or up link, 0 downlink, 1 uplink
* @ul_mu_type: MU type
* @user_info_skip: user information skip
* @rx_antenna: rx antenna
* @vht_flag_values6: VHT flag value6
* @he_mu_other_flags: HE MU other flag
@@ -342,6 +344,7 @@ typedef __qdf_nbuf_queue_t qdf_nbuf_queue_t;
* @l_sig_a_info: L_SIG_A value coming in Rx descriptor
* @l_sig_b_info: L_SIG_B value coming in Rx descriptor
* @num_eht_user_info_valid: Number of valid EHT user info
* @num_eht_all_user_info_valid: Number of all valid EHT user info
* @rate: Rate in terms 500Kbps
* @rtap_flags: Bit map of available fields in the radiotap
* @ant_signal_db: Rx packet RSSI
@@ -395,6 +398,7 @@ typedef __qdf_nbuf_queue_t qdf_nbuf_queue_t;
* @usig_mask: U-SIG property of received frame
* @eht_known: EHT property of received frame
* @eht_data: EHT property of received frame
* @eht_all_user_num: EHT all user number
* @eht_user_info: EHT USER property of received frame
* @phyrx_abort: phy aborted undecoded frame indication
* @phyrx_abort_reason: abort reason in phyrx_abort_request_info
@@ -453,7 +457,9 @@ struct mon_rx_status {
reception_type : 4,
ltf_size : 2,
tx_status : 4,
mu_dl_ul : 1;
mu_dl_ul : 1,
ul_mu_type : 4,
user_info_skip : 1;
uint32_t rx_antenna : 24;
uint16_t vht_flag_values6;
uint16_t he_mu_other_flags;
@@ -462,6 +468,7 @@ struct mon_rx_status {
uint32_t l_sig_a_info;
uint32_t l_sig_b_info;
uint8_t num_eht_user_info_valid;
uint8_t num_eht_all_user_info_valid;
uint8_t rate;
uint8_t rtap_flags;
uint8_t ant_signal_db;
@@ -513,7 +520,8 @@ struct mon_rx_status {
uint32_t usig_value;
uint32_t usig_mask;
uint32_t eht_known;
uint32_t eht_data[6];
uint32_t eht_data[9];
uint32_t eht_all_user_num;
uint32_t eht_user_info[EHT_USER_INFO_LEN];
#ifdef QCA_UNDECODED_METADATA_SUPPORT
uint32_t phyrx_abort:1,
@@ -547,6 +555,11 @@ struct mon_rx_status {
* @ofdma_ru_width: OFDMA total RU width
* @ofdma_ru_size: OFDMA RU size index
* @is_ampdu: AMPDU flag
* @sta_id: STA id
* @ldpc: LDPC
* @dcm: DCM
* @is_stbc: STBC
* @beamformed: Beamformed
* @mu_ul_user_v0_word0: MU UL user info word 0
* @mu_ul_user_v0_word1: MU UL user info word 1
* @ast_index: AST table hash index
@@ -584,6 +597,9 @@ struct mon_rx_status {
* @he_per_user_2: HE per user info2
* @he_per_user_position: HE per user position info
* @he_per_user_known: HE per user known info
* @eht_known: EHT known
* @eht_data: EHT data
* @eht_user_info: EHT user info
* @rtap_flags: Bit map of available fields in the radiotap
* @rs_flags: Flags to indicate AMPDU or AMSDU aggregation
* @mpdu_cnt_fcs_ok: mpdu count received with fcs ok
@@ -606,6 +622,11 @@ struct mon_rx_user_status {
ofdma_ru_width:7,
ofdma_ru_size:8,
is_ampdu:1;
uint32_t sta_id : 12,
ldpc : 1,
dcm : 1,
is_stbc : 1,
beamformed : 1;
uint32_t mu_ul_user_v0_word0;
uint32_t mu_ul_user_v0_word1;
uint32_t ast_index : 16,
@@ -643,6 +664,9 @@ struct mon_rx_user_status {
uint8_t he_per_user_2;
uint8_t he_per_user_position;
uint8_t he_per_user_known;
uint32_t eht_known;
uint32_t eht_data[9];
uint32_t eht_user_info;
uint8_t rtap_flags;
uint8_t rs_flags;
uint16_t mpdu_cnt_fcs_ok;
@@ -989,20 +1013,80 @@ struct qdf_radiotap_ext2 {
/* EHT data1 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_RU_MRU_SIZE_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_MRU_INDEX_SHIFT 5
#define QDF_MON_STATUS_EHT_RU_ALLOCATION1_1_SHIFT 13
#define QDF_MON_STATUS_EHT_RU_ALLOCATION1_2_SHIFT 22
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_1_SHIFT 13
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_1_SHIFT 22
/* Keeping this as part of Tx Old Code
* needs refactor and cleanup later
*/
#define QDF_MON_STATUS_EHT_RU_ALLOCATION1_1_SHIFT 13
#define QDF_MON_STATUS_EHT_RU_ALLOCATION1_2_SHIFT 22
/* EHT data2 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_1_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_2_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_3_SHIFT 18
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_1_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_1_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_2_SHIFT 10
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_2_SHIFT 19
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_2_SHIFT 20
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_2_SHIFT 29
/* Keeping this as part of Tx Old Code
* needs refactor and cleanup later
*/
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_1_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_2_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_3_SHIFT 18
/* EHT data3 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_4_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_5_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_6_SHIFT 18
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_3_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_3_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_3_SHIFT 10
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_3_SHIFT 19
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_4_SHIFT 20
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_4_SHIFT 29
/* Keeping this as part of Tx Old Code
* needs refactor and cleanup later
*/
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_4_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_5_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOCATION2_6_SHIFT 18
/* EHT data4 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_4_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_4_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_5_SHIFT 10
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_5_SHIFT 19
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_5_SHIFT 20
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_5_SHIFT 29
/* EHT data5 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_6_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_6_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_6_SHIFT 10
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_6_SHIFT 19
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_7_SHIFT 20
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_7_SHIFT 29
/* EHT data6 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_7_SHIFT 0
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_7_SHIFT 9
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD1_8_SHIFT 10
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN1_8_SHIFT 19
#define QDF_MON_STATUS_EHT_RU_ALLOC_FIELD2_8_SHIFT 20
#define QDF_MON_STATUS_EHT_RU_ALLOC_KNOWN2_8_SHIFT 29
/* EHT data7 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_CRC2_SHIFT 0
#define QDF_MON_STATUS_EHT_TAIL2_SHIFT 4
#define QDF_MON_STATUS_EHT_NDP_NSS_SHIFT 12
@@ -1011,7 +1095,7 @@ struct qdf_radiotap_ext2 {
#define QDF_MON_STATUS_EHT_USER_ENC_BLOCK_CRC_SHIFT 20
#define QDF_MON_STATUS_EHT_USER_ENC_BLOCK_TAIL_SHIFT 24
/* EHT data5 Mask/SHIFT */
/* EHT data8 Mask/SHIFT */
#define QDF_MON_STATUS_EHT_TB_RU_PS160_SHIFT 0
#define QDF_MON_STATUS_EHT_TB_RU_PS80_SHIFT 1
#define QDF_MON_STATUS_EHT_TB_RU_B7_B1_SHIFT 2

57
qdf/linux/src/qdf_nbuf.c
Просмотреть файл

@@ -5089,25 +5089,32 @@ qdf_nbuf_update_radiotap_he_flags(struct mon_rx_status *rx_status,
* IEEE80211_RADIOTAP_HE u16, u16, u16, u16, u16, u16
* Enable all "known" HE radiotap flags for now
*/
struct mon_rx_user_status *rx_user_status = rx_status->rx_user_status;
rtap_len = qdf_align(rtap_len, 2);
put_unaligned_le16(rx_status->he_data1, &rtap_buf[rtap_len]);
put_unaligned_le16(rx_user_status->he_data1 |
rx_status->he_data1, &rtap_buf[rtap_len]);
rtap_len += 2;
put_unaligned_le16(rx_status->he_data2, &rtap_buf[rtap_len]);
put_unaligned_le16(rx_user_status->he_data2 |
rx_status->he_data2, &rtap_buf[rtap_len]);
rtap_len += 2;
put_unaligned_le16(rx_status->he_data3, &rtap_buf[rtap_len]);
put_unaligned_le16(rx_user_status->he_data3 |
rx_status->he_data3, &rtap_buf[rtap_len]);
rtap_len += 2;
put_unaligned_le16(rx_status->he_data4, &rtap_buf[rtap_len]);
put_unaligned_le16(rx_user_status->he_data4 |
rx_status->he_data4, &rtap_buf[rtap_len]);
rtap_len += 2;
put_unaligned_le16(rx_status->he_data5, &rtap_buf[rtap_len]);
put_unaligned_le16(rx_user_status->he_data5 |
rx_status->he_data5, &rtap_buf[rtap_len]);
rtap_len += 2;
put_unaligned_le16(rx_status->he_data6, &rtap_buf[rtap_len]);
put_unaligned_le16(rx_user_status->he_data6 |
rx_status->he_data6, &rtap_buf[rtap_len]);
rtap_len += 2;
return rtap_len;
@@ -5292,21 +5299,23 @@ static unsigned int
qdf_nbuf_update_radiotap_eht_flags(struct mon_rx_status *rx_status,
int8_t *rtap_buf, uint32_t rtap_len)
{
uint32_t user;
struct mon_rx_user_status *rx_user_status = rx_status->rx_user_status;
/*
* IEEE80211_RADIOTAP_EHT:
* u32, u32, u32, u32, u32, u32, u32, u16, [u32, u32, u32]
*/
rtap_len = qdf_align(rtap_len, 4);
put_unaligned_le32(rx_status->eht_known, &rtap_buf[rtap_len]);
put_unaligned_le32(rx_status->eht_known | rx_user_status->eht_known,
&rtap_buf[rtap_len]);
rtap_len += 4;
put_unaligned_le32(rx_status->eht_data[0], &rtap_buf[rtap_len]);
put_unaligned_le32(rx_status->eht_data[0] | rx_user_status->eht_data[0],
&rtap_buf[rtap_len]);
rtap_len += 4;
put_unaligned_le32(rx_status->eht_data[1], &rtap_buf[rtap_len]);
put_unaligned_le32(rx_status->eht_data[1] | rx_user_status->eht_data[1],
&rtap_buf[rtap_len]);
rtap_len += 4;
put_unaligned_le32(rx_status->eht_data[2], &rtap_buf[rtap_len]);
@@ -5321,19 +5330,15 @@ qdf_nbuf_update_radiotap_eht_flags(struct mon_rx_status *rx_status,
put_unaligned_le32(rx_status->eht_data[5], &rtap_buf[rtap_len]);
rtap_len += 4;
for (user = 0; user < EHT_USER_INFO_LEN &&
rx_status->num_eht_user_info_valid &&
user < rx_status->num_eht_user_info_valid; user++) {
put_unaligned_le32(rx_status->eht_user_info[user],
&rtap_buf[rtap_len]);
rtap_len += 4;
}
put_unaligned_le32(rx_user_status->eht_user_info, &rtap_buf[rtap_len]);
rtap_len += 4;
qdf_rl_debug("EHT data %x %x %x %x %x %x %x",
rx_status->eht_known, rx_status->eht_data[0],
rx_status->eht_data[1], rx_status->eht_data[2],
rx_status->eht_data[3], rx_status->eht_data[4],
rx_status->eht_data[5]);
rx_status->eht_known | rx_user_status->eht_known,
rx_status->eht_data[0] | rx_user_status->eht_data[0],
rx_status->eht_data[1] | rx_user_status->eht_data[1],
rx_status->eht_data[2], rx_status->eht_data[3],
rx_status->eht_data[4], rx_status->eht_data[5]);
return rtap_len;
}
@@ -5708,10 +5713,8 @@ unsigned int qdf_nbuf_update_radiotap(struct mon_rx_status *rx_status,
rtap_buf,
rtap_len);
if ((rtap_len - length) > RADIOTAP_EHT_FLAGS_LEN) {
qdf_print("length is greater than RADIOTAP_EHT_FLAGS_LEN");
if ((rtap_len - length) > RADIOTAP_EHT_FLAGS_LEN)
return 0;
}
}
if (rx_status->eht_flags) {
@@ -5722,10 +5725,8 @@ unsigned int qdf_nbuf_update_radiotap(struct mon_rx_status *rx_status,
rtap_buf,
rtap_len);
if ((rtap_len - length) > RADIOTAP_EHT_FLAGS_LEN) {
qdf_print("length is greater than RADIOTAP_EHT_FLAGS_LEN");
if ((rtap_len - length) > RADIOTAP_EHT_FLAGS_LEN)
return 0;
}
}
put_unaligned_le32(it_present_val, it_present);