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@@ -3292,18 +3292,43 @@ static int msm_be_hw_params_fixup(struct snd_soc_pcm_runtime *rtd,
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mi2s_tx_cfg[TERT_MI2S].channels;
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break;
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+ case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_0:
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+ case MSM_BACKEND_DAI_WSA_CDC_DMA_RX_1:
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+ case MSM_BACKEND_DAI_RX_CDC_DMA_RX_0:
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+ case MSM_BACKEND_DAI_RX_CDC_DMA_RX_1:
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+ case MSM_BACKEND_DAI_RX_CDC_DMA_RX_2:
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+ case MSM_BACKEND_DAI_RX_CDC_DMA_RX_3:
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+ idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
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+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
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+ cdc_dma_rx_cfg[idx].bit_format);
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+ rate->min = rate->max = cdc_dma_rx_cfg[idx].sample_rate;
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+ channels->min = channels->max = cdc_dma_rx_cfg[idx].channels;
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+ break;
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+
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+ case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_1:
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+ case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_2:
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+ case MSM_BACKEND_DAI_TX_CDC_DMA_TX_0:
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+ case MSM_BACKEND_DAI_TX_CDC_DMA_TX_3:
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+ case MSM_BACKEND_DAI_TX_CDC_DMA_TX_4:
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case MSM_BACKEND_DAI_VA_CDC_DMA_TX_0:
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case MSM_BACKEND_DAI_VA_CDC_DMA_TX_1:
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case MSM_BACKEND_DAI_VA_CDC_DMA_TX_2:
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idx = msm_cdc_dma_get_idx_from_beid(dai_link->id);
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param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
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- cdc_dma_tx_cfg[idx].bit_format);
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+ cdc_dma_tx_cfg[idx].bit_format);
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rate->min = rate->max = cdc_dma_tx_cfg[idx].sample_rate;
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channels->min = channels->max = cdc_dma_tx_cfg[idx].channels;
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break;
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- default:
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+ case MSM_BACKEND_DAI_WSA_CDC_DMA_TX_0:
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+ param_set_mask(params, SNDRV_PCM_HW_PARAM_FORMAT,
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+ SNDRV_PCM_FORMAT_S32_LE);
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rate->min = rate->max = SAMPLING_RATE_8KHZ;
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+ channels->min = channels->max = msm_vi_feed_tx_ch;
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+ break;
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+
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+ default:
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+ rate->min = rate->max = SAMPLING_RATE_48KHZ;
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break;
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}
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