disp: msm: dsi: add qsync min fps val in dsi display mode priv info

In the current code for finding the qsync min fps for a
mode, entire mode list is iterated which involves acquiring
dsi display_lock. During conn tx debugfs commands, if
qsync min fps is required, we try to acquire dsi
display_lock twice which results in hang state. This change
adds qsync min fps value in dsi_display_mode_priv_info
struct in order to get the qsync fps from the
msm_display_mode present in connector state instead of
looping through all the modes to find the mode qsync fps.

Change-Id: Ifded40d1f12462bb50fc7bdafb746ae5b8d9512a
Signed-off-by: Yashwanth <yvulapu@codeaurora.org>
This commit is contained in:
Yashwanth
2021-09-13 09:42:13 +05:30
父節點 0f0c5990ca
當前提交 6619470eb6
共有 6 個文件被更改,包括 23 次插入25 次删除

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@@ -611,6 +611,7 @@ struct dsi_host_config {
* @mdp_transfer_time_us: Specifies the mdp transfer time for command mode
* panels in microseconds.
* @dsi_transfer_time_us: Specifies the dsi transfer time for cmd panels.
* @qsync_min_fps: Qsync min fps value for the mode
* @clk_rate_hz: DSI bit clock per lane in hz.
* @min_dsi_clk_hz: Min dsi clk per lane to transfer frame in vsync time.
* @bit_clk_list: List of dynamic bit clock rates supported.
@@ -636,6 +637,7 @@ struct dsi_display_mode_priv_info {
u32 panel_prefill_lines;
u32 mdp_transfer_time_us;
u32 dsi_transfer_time_us;
u32 qsync_min_fps;
u64 clk_rate_hz;
u64 min_dsi_clk_hz;
struct msm_dyn_clk_list bit_clk_list;