disp: msm: sde: use LLCC_DISP for static display usecase with cwb

Static display usecase uses concurrent writeback path to compose the
layers and updates the primary display in the next cycle with cwb
output. Use LLCC_DISP scid for system cache in cwb path, to keep it
in sync with the legacy static display path. Use LLCC_DISP_WB for
the offline-wb path. Expose the writeback connector cache property
only when either or both the cache types are enabled.

Change-Id: I8ca4b14828a14ce0bde829136fb4baef272166aa
Signed-off-by: Veera Sundaram Sankaran <[email protected]>

msm/sde/sde_encoder_phys_wb.c

@@ -1074,17 +1074,25 @@ static int sde_encoder_phys_wb_atomic_check(struct sde_encoder_phys *phys_enc,
 	return rc;
 }
 
-static void _sde_encoder_phys_wb_setup_cache(struct sde_encoder_phys_wb *wb_enc,
+static void _sde_encoder_phys_wb_setup_cache(struct sde_encoder_phys *phys_enc,
 		struct drm_framebuffer *fb)
 {
+	struct sde_encoder_phys_wb *wb_enc = to_sde_encoder_phys_wb(phys_enc);
 	struct sde_wb_device *wb_dev = wb_enc->wb_dev;
 	struct drm_connector_state *state = wb_dev->connector->state;
 	struct sde_hw_wb *hw_wb = wb_enc->hw_wb;
 	struct sde_crtc *sde_crtc = to_sde_crtc(wb_enc->crtc);
-	struct sde_sc_cfg *sc_cfg = &hw_wb->catalog->sc_cfg[SDE_SYS_CACHE_DISP_WB];
+	struct sde_sc_cfg *sc_cfg;
 	struct sde_hw_wb_sc_cfg *cfg  = &wb_enc->sc_cfg;
-	u32 cache_enable;
+	u32 cache_enable, cache_type;
+
+	/*
+	 * - use LLCC_DISP for cwb static display
+	 * - use LLCC_DISP_WB for 2-pass composition using offline-wb
+	 */
+	cache_type = phys_enc->in_clone_mode ? SDE_SYS_CACHE_DISP : SDE_SYS_CACHE_DISP_WB;
 
+	sc_cfg = &hw_wb->catalog->sc_cfg[cache_type];
 	if (!sc_cfg->has_sys_cache) {
 		SDE_DEBUG("sys cache feature not enabled\n");
 		return;
@@ -1105,16 +1113,22 @@ static void _sde_encoder_phys_wb_setup_cache(struct sde_encoder_phys_wb *wb_enc,
 
 	if (cache_enable) {
 		cfg->wr_scid = sc_cfg->llcc_scid;
-		cfg->type = SDE_SYS_CACHE_DISP_WB;
-		msm_framebuffer_set_cache_hint(fb, MSM_FB_CACHE_WRITE_EN, SDE_SYS_CACHE_DISP_WB);
+		cfg->type = cache_type;
+		msm_framebuffer_set_cache_hint(fb, MSM_FB_CACHE_WRITE_EN, cache_type);
 	} else {
 		cfg->wr_scid = 0x0;
 		cfg->type = SDE_SYS_CACHE_NONE;
 		msm_framebuffer_set_cache_hint(fb, MSM_FB_CACHE_NONE, SDE_SYS_CACHE_NONE);
 	}
 
-	sde_crtc->new_perf.llcc_active[SDE_SYS_CACHE_DISP_WB] = cache_enable;
-	sde_core_perf_crtc_update_llcc(wb_enc->crtc);
+	/*
+	 * avoid llcc_active reset for crtc while in clone mode as it will reset it for
+	 * primary display as well
+	 */
+	if (cache_enable || !phys_enc->in_clone_mode) {
+		sde_crtc->new_perf.llcc_active[cache_type] = cache_enable;
+		sde_core_perf_crtc_update_llcc(wb_enc->crtc);
+	}
 
 	hw_wb->ops.setup_sys_cache(hw_wb, cfg);
 	SDE_EVT32(WBID(wb_enc), cfg->wr_scid, cfg->flags, cfg->type, cache_enable);
@@ -1479,7 +1493,7 @@ static void sde_encoder_phys_wb_setup(struct sde_encoder_phys *phys_enc)
 
 	_sde_encoder_phys_wb_setup_ctl(phys_enc, wb_enc->wb_fmt);
 
-	_sde_encoder_phys_wb_setup_cache(wb_enc, fb);
+	_sde_encoder_phys_wb_setup_cache(phys_enc, fb);
 
 	_sde_encoder_phys_wb_setup_cwb(phys_enc, true);
 
@@ -2202,9 +2216,15 @@ static void sde_encoder_phys_wb_disable(struct sde_encoder_phys *phys_enc)
 		if (hw_wb->ops.setup_sys_cache)
 			hw_wb->ops.setup_sys_cache(hw_wb, &wb_enc->sc_cfg);
 
-		for (i = 0; i < SDE_SYS_CACHE_MAX; i++)
-			sde_crtc->new_perf.llcc_active[i] = 0;
-		sde_core_perf_crtc_update_llcc(wb_enc->crtc);
+		/*
+		 * avoid llcc_active reset for crtc while in clone mode as it will reset it for
+		 * primary display as well
+		 */
+		if (!phys_enc->in_clone_mode) {
+			for (i = 0; i < SDE_SYS_CACHE_MAX; i++)
+				sde_crtc->new_perf.llcc_active[i] = 0;
+			sde_core_perf_crtc_update_llcc(wb_enc->crtc);
+		}
 	}
 
 	if (phys_enc->in_clone_mode) {

msm/sde/sde_hw_wb.c

@@ -410,7 +410,7 @@ static void sde_hw_wb_setup_sys_cache(struct sde_hw_wb *ctx, struct sde_hw_wb_sc
 		return;
 
 	if (cfg->flags & SYS_CACHE_EN_FLAG)
-		val |= BIT(15);
+		val |= (cfg->wr_en ? BIT(15) : 0);
 
 	if (cfg->flags & SYS_CACHE_SCID)
 		val |= ((cfg->wr_scid & 0x1f) << 8);

msm/sde/sde_wb.c

@@ -593,7 +593,6 @@ int sde_wb_connector_post_init(struct drm_connector *connector, void *display)
 	struct msm_drm_private *priv;
 	struct sde_kms *sde_kms;
 	struct sde_mdss_cfg *catalog;
-	struct sde_sc_cfg *sde_cfg;
 	static const struct drm_prop_enum_list e_fb_translation_mode[] = {
 		{SDE_DRM_FB_NON_SEC, "non_sec"},
 		{SDE_DRM_FB_SEC, "sec"},
@@ -622,13 +621,12 @@ int sde_wb_connector_post_init(struct drm_connector *connector, void *display)
 	}
 
 	catalog = sde_kms->catalog;
-	sde_cfg = &catalog->sc_cfg[SDE_SYS_CACHE_DISP_WB];
-
 	c_conn = to_sde_connector(connector);
 	wb_dev->connector = connector;
 	wb_dev->detect_status = connector_status_connected;
 
-	if (sde_cfg->has_sys_cache)
+	if (catalog->sc_cfg[SDE_SYS_CACHE_DISP].has_sys_cache
+			|| catalog->sc_cfg[SDE_SYS_CACHE_DISP_WB].has_sys_cache)
 		msm_property_install_enum(&c_conn->property_info, "cache_state",
 			0x0, 0, e_cache_state, ARRAY_SIZE(e_cache_state),
 			0, CONNECTOR_PROP_CACHE_STATE);