disp: msm: dsi: add generic API for calculating horizontal timings
Add a generic API which calculates the horizontal timings based on the compression type in case compression is enabled and even for non-compression cases. Replace the usage of the DSC macros with this generic API. Change-Id: Ie9174c20adc51a0be7c9127529d41faa4b473b55 Signed-off-by: Abhinav Kumar <abhinavk@codeaurora.org>
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@@ -913,7 +913,7 @@ static int dsi_ctrl_update_link_freqs(struct dsi_ctrl *dsi_ctrl,
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do_div(bit_rate, dsi_transfer_time_us);
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do_div(bit_rate, dsi_transfer_time_us);
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bit_rate = bit_rate * num_of_lanes;
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bit_rate = bit_rate * num_of_lanes;
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} else {
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} else {
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h_period = DSI_H_TOTAL_DSC(timing);
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h_period = dsi_h_total_dce(timing);
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v_period = DSI_V_TOTAL(timing);
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v_period = DSI_V_TOTAL(timing);
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bit_rate = h_period * v_period * timing->refresh_rate * bpp;
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bit_rate = h_period * v_period * timing->refresh_rate * bpp;
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}
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}
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@@ -16,29 +16,6 @@
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#define DSI_V_TOTAL(t) (((t)->v_active) + ((t)->v_back_porch) + \
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#define DSI_V_TOTAL(t) (((t)->v_active) + ((t)->v_back_porch) + \
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((t)->v_sync_width) + ((t)->v_front_porch))
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((t)->v_sync_width) + ((t)->v_front_porch))
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#define DSI_H_TOTAL_DSC(t) \
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({\
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u64 value;\
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if ((t)->dsc_enabled && (t)->dsc)\
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value = (t)->dsc->pclk_per_line;\
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else\
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value = (t)->h_active;\
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value = value + (t)->h_back_porch + (t)->h_sync_width +\
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(t)->h_front_porch;\
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value;\
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})
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#define DSI_H_ACTIVE_DSC(t) \
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({\
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u64 value;\
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if ((t)->dsc_enabled && (t)->dsc)\
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value = (t)->dsc->pclk_per_line;\
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else\
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value = (t)->h_active;\
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value;\
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})
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#define DSI_DEBUG_NAME_LEN 32
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#define DSI_DEBUG_NAME_LEN 32
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#define display_for_each_ctrl(index, display) \
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#define display_for_each_ctrl(index, display) \
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for (index = 0; (index < (display)->ctrl_count) &&\
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for (index = 0; (index < (display)->ctrl_count) &&\
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@@ -726,4 +703,25 @@ static inline int dsi_pixel_format_to_bpp(enum dsi_pixel_format fmt)
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}
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}
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return 24;
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return 24;
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}
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}
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static inline u64 dsi_h_active_dce(struct dsi_mode_info *mode)
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{
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u64 h_active = 0;
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if (mode->dsc_enabled && mode->dsc)
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h_active = mode->dsc->pclk_per_line;
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else if (mode->vdc_enabled && mode->vdc)
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h_active = mode->vdc->pclk_per_line;
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else
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h_active = mode->h_active;
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return h_active;
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}
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static inline u64 dsi_h_total_dce(struct dsi_mode_info *mode)
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{
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return dsi_h_active_dce(mode) + mode->h_back_porch +
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mode->h_sync_width + mode->h_front_porch;
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}
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#endif /* _DSI_DEFS_H_ */
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#endif /* _DSI_DEFS_H_ */
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@@ -3964,7 +3964,7 @@ static void _dsi_display_calc_pipe_delay(struct dsi_display *display,
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hr_bit_to_esc_ratio = ((dsi_ctrl->clk_freq.byte_clk_rate * 4 * 1000) /
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hr_bit_to_esc_ratio = ((dsi_ctrl->clk_freq.byte_clk_rate * 4 * 1000) /
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esc_clk_rate_hz);
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esc_clk_rate_hz);
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hsync_period = DSI_H_TOTAL_DSC(&mode->timing);
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hsync_period = dsi_h_total_dce(&mode->timing);
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delay->pipe_delay = (hsync_period + 1) / pclk_to_esc_ratio;
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delay->pipe_delay = (hsync_period + 1) / pclk_to_esc_ratio;
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if (!display->panel->video_config.eof_bllp_lp11_en)
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if (!display->panel->video_config.eof_bllp_lp11_en)
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delay->pipe_delay += (17 / pclk_to_esc_ratio) +
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delay->pipe_delay += (17 / pclk_to_esc_ratio) +
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@@ -4367,7 +4367,7 @@ static int dsi_display_get_dfps_timing(struct dsi_display *display,
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rc = dsi_display_dfps_calc_front_porch(
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rc = dsi_display_dfps_calc_front_porch(
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curr_refresh_rate,
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curr_refresh_rate,
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timing->refresh_rate,
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timing->refresh_rate,
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DSI_H_TOTAL_DSC(timing),
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dsi_h_total_dce(timing),
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DSI_V_TOTAL(timing),
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DSI_V_TOTAL(timing),
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timing->v_front_porch,
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timing->v_front_porch,
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&adj_mode->timing.v_front_porch);
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&adj_mode->timing.v_front_porch);
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@@ -4378,7 +4378,7 @@ static int dsi_display_get_dfps_timing(struct dsi_display *display,
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curr_refresh_rate,
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curr_refresh_rate,
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timing->refresh_rate,
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timing->refresh_rate,
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DSI_V_TOTAL(timing),
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DSI_V_TOTAL(timing),
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DSI_H_TOTAL_DSC(timing),
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dsi_h_total_dce(timing),
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timing->h_front_porch,
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timing->h_front_porch,
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&adj_mode->timing.h_front_porch);
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&adj_mode->timing.h_front_porch);
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if (!rc)
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if (!rc)
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@@ -2195,7 +2195,7 @@ static int dsi_panel_parse_phy_timing(struct dsi_display_mode *mode,
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* function dsi_panel_calc_dsi_transfer_time( )
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* function dsi_panel_calc_dsi_transfer_time( )
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* as we set it based on dsi clock or mdp transfer time.
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* as we set it based on dsi clock or mdp transfer time.
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*/
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*/
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pixel_clk_khz = (DSI_H_TOTAL_DSC(&mode->timing) *
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pixel_clk_khz = (dsi_h_total_dce(&mode->timing) *
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DSI_V_TOTAL(&mode->timing) *
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DSI_V_TOTAL(&mode->timing) *
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mode->timing.refresh_rate);
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mode->timing.refresh_rate);
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do_div(pixel_clk_khz, 1000);
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do_div(pixel_clk_khz, 1000);
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@@ -3504,7 +3504,7 @@ void dsi_panel_calc_dsi_transfer_time(struct dsi_host_common_cfg *config,
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min_bitclk_hz = (bits_per_line * timing->v_active *
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min_bitclk_hz = (bits_per_line * timing->v_active *
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timing->refresh_rate);
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timing->refresh_rate);
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} else {
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} else {
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total_active_pixels = ((DSI_H_ACTIVE_DSC(timing)
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total_active_pixels = ((dsi_h_active_dce(timing)
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* timing->v_active));
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* timing->v_active));
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/* calculate the actual bitclk needed to transfer the frame */
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/* calculate the actual bitclk needed to transfer the frame */
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min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
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min_bitclk_hz = (total_active_pixels * (timing->refresh_rate) *
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@@ -661,7 +661,7 @@ int dsi_phy_hw_calculate_timing_params(struct dsi_phy_hw *phy,
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struct phy_timing_ops *ops = phy->ops.timing_ops;
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struct phy_timing_ops *ops = phy->ops.timing_ops;
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memset(&desc, 0x0, sizeof(desc));
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memset(&desc, 0x0, sizeof(desc));
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h_total = DSI_H_TOTAL_DSC(mode);
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h_total = dsi_h_total_dce(mode);
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v_total = DSI_V_TOTAL(mode);
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v_total = DSI_V_TOTAL(mode);
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bpp = bits_per_pixel[host->dst_format];
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bpp = bits_per_pixel[host->dst_format];
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