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@@ -315,7 +315,7 @@ int hif_get_irq_num(struct hif_opaque_softc *scn, int *irq, uint32_t size)
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}
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if (sc->num_msi_intrs > size) {
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- qdf_print("Not enough space in irq buffer to return irqs\n");
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+ qdf_print("Not enough space in irq buffer to return irqs");
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return -EINVAL;
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}
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@@ -1547,8 +1547,8 @@ static void hif_set_hia_extnd(struct hif_softc *scn)
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tgt_info->target_revision
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= CHIP_ID_REVISION_GET(hif_read32_mb(scn, scn->mem
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+ CHIP_ID_ADDRESS));
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- qdf_print(KERN_INFO"chip_id 0x%x chip_revision 0x%x\n",
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- target_type, tgt_info->target_revision);
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+ qdf_print("chip_id 0x%x chip_revision 0x%x",
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+ target_type, tgt_info->target_revision);
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}
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{
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@@ -1561,14 +1561,14 @@ static void hif_set_hia_extnd(struct hif_softc *scn)
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(frac != -1) && (intval != -1)) {
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hif_diag_read_access(hif_hdl, flag2_targ_addr,
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&flag2_value);
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- qdf_print("\n Setting clk_override\n");
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+ qdf_print("\n Setting clk_override");
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flag2_value |= CLOCK_OVERRIDE;
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hif_diag_write_access(hif_hdl, flag2_targ_addr,
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flag2_value);
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- qdf_print("\n CLOCK PLL val set %d\n", flag2_value);
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+ qdf_print("\n CLOCK PLL val set %d", flag2_value);
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} else {
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- qdf_print(KERN_INFO"\n CLOCK PLL skipped\n");
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+ qdf_print("\n CLOCK PLL skipped");
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}
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}
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@@ -1583,7 +1583,7 @@ static void hif_set_hia_extnd(struct hif_softc *scn)
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*/
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qdf_print(KERN_INFO
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- "%s: setting the target pll frac %x intval %x\n",
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+ "%s: setting the target pll frac %x intval %x",
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__func__, frac, intval);
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/* do not touch frac, and int val, let them be default -1,
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@@ -1599,16 +1599,16 @@ static void hif_set_hia_extnd(struct hif_softc *scn)
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hi_clock_info));
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hif_diag_read_access(hif_hdl,
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flag2_targ_addr, &flag2_value);
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- qdf_print("\n ====> FRAC Val %x Address %x\n", frac,
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- flag2_value);
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+ qdf_print("\n ====> FRAC Val %x Address %x", frac,
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+ flag2_value);
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hif_diag_write_access(hif_hdl, flag2_value, frac);
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- qdf_print("\n INT Val %x Address %x\n",
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- intval, flag2_value + 4);
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+ qdf_print("\n INT Val %x Address %x",
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+ intval, flag2_value + 4);
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hif_diag_write_access(hif_hdl,
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flag2_value + 4, intval);
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} else {
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qdf_print(KERN_INFO
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- "%s: no frac provided, skipping pre-configuring PLL\n",
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+ "%s: no frac provided, skipping pre-configuring PLL",
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__func__);
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}
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@@ -1625,7 +1625,7 @@ static void hif_set_hia_extnd(struct hif_softc *scn)
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hi_desired_cpu_speed_hz));
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hif_diag_read_access(hif_hdl, flag2_targ_addr,
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&flag2_value);
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- qdf_print("\n ==> hi_desired_cpu_speed_hz Address %x\n",
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+ qdf_print("\n ==> hi_desired_cpu_speed_hz Address %x",
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flag2_value);
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hif_diag_write_access(hif_hdl, flag2_value,
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ar900b_20_targ_clk/*300000000u*/);
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@@ -1644,7 +1644,7 @@ static void hif_set_hia_extnd(struct hif_softc *scn)
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hif_diag_write_access(hif_hdl, flag2_targ_addr,
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qca9888_20_targ_clk);
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} else {
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- qdf_print(KERN_INFO"%s: targ_clk is not provided, skipping pre-configuring PLL\n",
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+ qdf_print("%s: targ_clk is not provided, skipping pre-configuring PLL",
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__func__);
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}
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} else {
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@@ -1656,13 +1656,13 @@ static void hif_set_hia_extnd(struct hif_softc *scn)
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hi_clock_info));
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hif_diag_read_access(hif_hdl, flag2_targ_addr,
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&flag2_value);
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- qdf_print("\n ====> FRAC Val %x Address %x\n", frac,
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- flag2_value);
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+ qdf_print("\n ====> FRAC Val %x Address %x", frac,
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+ flag2_value);
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hif_diag_write_access(hif_hdl, flag2_value, frac);
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- qdf_print("\n INT Val %x Address %x\n", intval,
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- flag2_value + 4);
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+ qdf_print("\n INT Val %x Address %x", intval,
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+ flag2_value + 4);
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hif_diag_write_access(hif_hdl, flag2_value + 4,
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- intval);
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+ intval);
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}
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}
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}
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