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qcacmn: Carve Out hif_softc out of ol_softc

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Carve out hif_softc for internal hif usage.
ol_softc acts a opaque handle to other modules.

Change-Id: I7633e70ed82fe2ee88a21e2502177d6a7388ff56
CRs-Fixed: 967765
This commit is contained in:
Komal Seelam
2016-02-22 20:45:49 +05:30
committed by Houston Hoffman
parent 02cf2f8509
commit 644263d323
25 changed files with 610 additions and 537 deletions
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167
hif/inc/hif.h
View File

@@ -194,70 +194,18 @@ struct bmi_info {
};
struct ol_softc {
void __iomem *mem; /* IO mapped memory base address */
cdf_dma_addr_t mem_pa;
struct hif_config_info hif_config;
struct hif_target_info target_info;
struct bmi_info bmi_ctx;
/*
* handle for code that uses the osdep.h version of OS
* abstraction primitives
*/
struct _NIC_DEV aps_osdev;
enum ath_hal_bus_type bus_type;
bool request_irq_done;
/*
* handle for code that uses cdf version of OS
* abstraction primitives
*/
cdf_device_t cdf_dev;
/* Packet statistics */
struct ol_ath_stats pkt_stats;
ol_target_status target_status;
/* calibration data is stored in flash */
uint8_t *cal_in_flash;
/* virtual address for the calibration data on the flash */
void *cal_mem;
/* status of target init */
WLAN_INIT_STATUS wlan_init_status;
#ifdef WLAN_FEATURE_FASTPATH
int fastpath_mode_on; /* Duplicating this for data path efficiency */
#endif /* WLAN_FEATURE_FASTPATH */
/* HTC handles */
void *htc_handle;
uint8_t vow_extstats;
struct targetdef_s *targetdef;
struct ce_reg_def *target_ce_def;
struct hostdef_s *hostdef;
struct host_shadow_regs_s *host_shadow_regs;
bool athdiag_procfs_inited;
/*
* Guard changes to Target HW state and to software
* structures that track hardware state.
*/
unsigned int ce_count; /* Number of Copy Engines supported */
struct CE_state *ce_id_to_state[CE_COUNT_MAX]; /* CE id to CE_state */
#ifdef FEATURE_NAPI
struct qca_napi_data napi_data;
#endif /* FEATURE_NAPI */
int htc_endpoint;
bool recovery;
bool hif_init_done;
int linkstate_vote;
atomic_t link_suspended;
atomic_t wow_done;
atomic_t tasklet_from_intr;
atomic_t active_tasklet_cnt;
bool notice_send;
#ifdef HIF_PCI
uint32_t ce_irq_summary;
#endif
uint32_t *vaddr_rri_on_ddr;
};
typedef enum {
@@ -320,29 +268,6 @@ struct htc_callbacks {
int (*dsrHandler)(void *context);
};
typedef struct osdrv_callbacks {
void *context; /* context to pass for all callbacks
* except deviceRemovedHandler
* the deviceRemovedHandler is only
* called if the device is claimed */
int (*deviceInsertedHandler)(void *context, void *hif_handle);
int (*deviceRemovedHandler)(void *claimedContext,
void *hif_handle);
int (*deviceSuspendHandler)(void *context);
int (*deviceResumeHandler)(void *context);
int (*deviceWakeupHandler)(void *context);
int (*devicePowerChangeHandler)(void *context,
HIF_DEVICE_POWER_CHANGE_TYPE
config);
} OSDRV_CALLBACKS;
/*
* This API is used to perform any global initialization of the HIF layer
* and to set OS driver callbacks (i.e. insertion/removal) to the HIF layer
*
*/
int hif_init(OSDRV_CALLBACKS *callbacks);
/* This API detaches the HTC layer from the HIF device */
void hif_detach_htc(struct ol_softc *scn);
@@ -505,10 +430,6 @@ static inline void hif_ipa_get_ce_resource(struct ol_softc *scn,
}
#endif /* IPA_OFFLOAD */
void hif_read_phy_mem_base(struct ol_softc *scn,
cdf_dma_addr_t *bar_value);
/**
* @brief List of callbacks - filled in by HTC.
*/
@@ -564,97 +485,103 @@ int hif_map_service_to_pipe(struct ol_softc *scn, uint16_t svc_id,
int *dl_is_polled);
uint16_t hif_get_free_queue_number(struct ol_softc *scn, uint8_t PipeID);
void *hif_get_targetdef(struct ol_softc *scn);
void hi_fsuspendwow(struct ol_softc *scn);
uint32_t hif_hia_item_address(uint32_t target_type, uint32_t item_offset);
void hif_set_target_sleep(struct ol_softc *scn, bool sleep_ok,
bool wait_for_it);
int hif_check_fw_reg(struct ol_softc *scn);
int hif_check_soc_status(struct ol_softc *scn);
void hif_disable_isr(void *scn);
void hif_reset_soc(void *scn);
void hif_disable_aspm(void *);
void hif_save_htc_htt_config_endpoint(void *hif_ctx, int htc_endpoint);
void hif_disable_isr(struct ol_softc *scn);
void hif_reset_soc(struct ol_softc *scn);
void hif_disable_aspm(struct ol_softc *);
void
hif_save_htc_htt_config_endpoint(struct ol_softc *hif_ctx, int htc_endpoint);
CDF_STATUS hif_open(cdf_device_t cdf_ctx, enum ath_hal_bus_type bus_type);
void hif_close(void *hif_ctx);
CDF_STATUS hif_enable(void *hif_ctx, struct device *dev, void *bdev,
void hif_close(struct ol_softc *hif_ctx);
CDF_STATUS hif_enable(struct ol_softc *hif_ctx, struct device *dev, void *bdev,
const hif_bus_id *bid, enum ath_hal_bus_type bus_type,
enum hif_enable_type type);
void hif_disable(void *hif_ctx, enum hif_disable_type type);
void hif_enable_power_gating(void *hif_ctx);
void hif_disable(struct ol_softc *hif_ctx, enum hif_disable_type type);
void hif_enable_power_gating(struct ol_softc *hif_ctx);
#ifdef FEATURE_RUNTIME_PM
struct hif_pm_runtime_lock;
int hif_pm_runtime_get(void *hif_ctx);
void hif_pm_runtime_get_noresume(void *hif_ctx);
int hif_pm_runtime_put(void *hif_ctx);
int hif_pm_runtime_get(struct ol_softc *hif_ctx);
void hif_pm_runtime_get_noresume(struct ol_softc *hif_ctx);
int hif_pm_runtime_put(struct ol_softc *hif_ctx);
struct hif_pm_runtime_lock *hif_runtime_lock_init(const char *name);
void hif_runtime_lock_deinit(void *hif_ctx, struct hif_pm_runtime_lock *lock);
int hif_pm_runtime_prevent_suspend(void *ol_sc,
void hif_runtime_lock_deinit(struct ol_softc *hif_ctx,
struct hif_pm_runtime_lock *lock);
int hif_pm_runtime_prevent_suspend(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *lock);
int hif_pm_runtime_allow_suspend(void *ol_sc,
int hif_pm_runtime_allow_suspend(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *lock);
int hif_pm_runtime_prevent_suspend_timeout(void *ol_sc,
int hif_pm_runtime_prevent_suspend_timeout(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *lock, unsigned int delay);
#else
struct hif_pm_runtime_lock {
const char *name;
};
static inline void hif_pm_runtime_get_noresume(void *hif_ctx)
static inline void hif_pm_runtime_get_noresume(struct ol_softc *hif_ctx)
{}
static inline int hif_pm_runtime_get(void *hif_ctx)
static inline int hif_pm_runtime_get(struct ol_softc *hif_ctx)
{ return 0; }
static inline int hif_pm_runtime_put(void *hif_ctx)
static inline int hif_pm_runtime_put(struct ol_softc *hif_ctx)
{ return 0; }
static inline struct hif_pm_runtime_lock *hif_runtime_lock_init(
const char *name)
{ return NULL; }
static inline void
hif_runtime_lock_deinit(void *hif_ctx, struct hif_pm_runtime_lock *lock) {}
hif_runtime_lock_deinit(struct ol_softc *hif_ctx,
struct hif_pm_runtime_lock *lock) {}
static inline int hif_pm_runtime_prevent_suspend(void *ol_sc,
static inline int hif_pm_runtime_prevent_suspend(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *lock)
{ return 0; }
static inline int hif_pm_runtime_allow_suspend(void *ol_sc,
static inline int hif_pm_runtime_allow_suspend(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *lock)
{ return 0; }
static inline int hif_pm_runtime_prevent_suspend_timeout(void *ol_sc,
static inline int
hif_pm_runtime_prevent_suspend_timeout(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *lock, unsigned int delay)
{ return 0; }
#endif
void hif_enable_power_management(void *hif_ctx);
void hif_disable_power_management(void *hif_ctx);
void hif_enable_power_management(struct ol_softc *hif_ctx);
void hif_disable_power_management(struct ol_softc *hif_ctx);
void hif_vote_link_down(void *);
void hif_vote_link_up(void *);
bool hif_can_suspend_link(void *);
void hif_vote_link_down(struct ol_softc *);
void hif_vote_link_up(struct ol_softc *);
bool hif_can_suspend_link(struct ol_softc *);
int hif_bus_resume(void *);
int hif_bus_suspend(void *);
int hif_bus_resume(struct ol_softc *);
int hif_bus_suspend(struct ol_softc *);
#ifdef FEATURE_RUNTIME_PM
int hif_pre_runtime_suspend(void *hif_ctx);
void hif_pre_runtime_resume(void *hif_ctx);
int hif_runtime_suspend(void *hif_ctx);
int hif_runtime_resume(void *hif_ctx);
void hif_process_runtime_suspend_success(void *);
void hif_process_runtime_suspend_failure(void *);
void hif_process_runtime_resume_success(void *);
int hif_pre_runtime_suspend(struct ol_softc *hif_ctx);
void hif_pre_runtime_resume(struct ol_softc *hif_ctx);
int hif_runtime_suspend(struct ol_softc *hif_ctx);
int hif_runtime_resume(struct ol_softc *hif_ctx);
void hif_process_runtime_suspend_success(struct ol_softc *);
void hif_process_runtime_suspend_failure(struct ol_softc *);
void hif_process_runtime_resume_success(struct ol_softc *);
#endif
int hif_dump_registers(struct ol_softc *scn);
int ol_copy_ramdump(struct ol_softc *scn);
void hif_crash_shutdown(void *hif_ctx);
void hif_crash_shutdown(struct ol_softc *hif_ctx);
void hif_get_hw_info(struct ol_softc *scn, u32 *version, u32 *revision,
const char **target_name);
struct hif_target_info *hif_get_target_info_handle(struct ol_softc *scn);
struct hif_config_info *hif_get_ini_handle(struct ol_softc *scn);
struct bmi_info *hif_get_bmi_ctx(struct ol_softc *scn);
void hif_lro_flush_cb_register(struct ol_softc *scn,
void (handler)(void *), void *data);
void hif_lro_flush_cb_deregister(struct ol_softc *scn);
struct hif_target_info *hif_get_target_info_handle(struct ol_softc *scn);
struct hif_config_info *hif_get_ini_handle(struct ol_softc *scn);
struct ramdump_info *hif_get_ramdump_ctx(struct ol_softc *hif_ctx);
struct bmi_info *hif_get_bmi_ctx(struct ol_softc *hif_ctx);
ol_target_status hif_get_target_status(struct ol_softc *hif_ctx);
void hif_set_target_status(struct ol_softc *hif_ctx, ol_target_status);
#ifdef __cplusplus
}
#endif

3
hif/inc/hif_napi.h
View File

@@ -94,7 +94,8 @@ void hif_napi_enable_irq(struct ol_softc *hif, int id);
int hif_napi_schedule(struct ol_softc *scn, int ce_id);
/* called by hdd_napi, which is called by kernel */
int hif_napi_poll(void *hif_ctx, struct napi_struct *napi, int budget);
int hif_napi_poll(struct ol_softc *hif_ctx,
struct napi_struct *napi, int budget);
#ifdef FEATURE_NAPI_DEBUG
#define NAPI_DEBUG(fmt, ...) \

6
hif/inc/regtable_pcie.h
View File

@@ -972,9 +972,9 @@ typedef struct TGT_REG_TABLE {
uint32_t section_size;
} tgt_reg_table;
struct ol_softc;
void target_register_tbl_attach(struct ol_softc *scn, u32 target_type);
void hif_register_tbl_attach(struct ol_softc *scn, u32 hif_type);
struct hif_softc;
void target_register_tbl_attach(struct hif_softc *scn, u32 target_type);
void hif_register_tbl_attach(struct hif_softc *scn, u32 hif_type);
struct host_shadow_regs_s {
uint32_t d_A_LOCAL_SHADOW_REG_VALUE_0;

25
hif/src/ce/ce_api.h
View File

@@ -296,7 +296,7 @@ unsigned int ce_recv_entries_done(struct CE_handle *copyeng);
/* Data is byte-swapped */
#define CE_RECV_FLAG_SWAPPED 1
void ce_enable_msi(struct ol_softc *scn,
void ce_enable_msi(struct hif_softc *scn,
unsigned int CE_id,
uint32_t msi_addr_lo,
uint32_t msi_addr_hi,
@@ -341,7 +341,7 @@ int ce_completed_send_next(struct CE_handle *copyeng,
/*==================CE Engine Initialization=================================*/
/* Initialize an instance of a CE */
struct CE_handle *ce_init(struct ol_softc *scn,
struct CE_handle *ce_init(struct hif_softc *scn,
unsigned int CE_id, struct CE_attr *attr);
/*==================CE Engine Shutdown=======================================*/
@@ -373,18 +373,18 @@ ce_cancel_send_next(struct CE_handle *copyeng,
void ce_fini(struct CE_handle *copyeng);
/*==================CE Interrupt Handlers====================================*/
void ce_per_engine_service_any(int irq, struct ol_softc *scn);
int ce_per_engine_service(struct ol_softc *scn, unsigned int CE_id);
void ce_per_engine_servicereap(struct ol_softc *scn, unsigned int CE_id);
void ce_per_engine_service_any(int irq, struct hif_softc *scn);
int ce_per_engine_service(struct hif_softc *scn, unsigned int CE_id);
void ce_per_engine_servicereap(struct hif_softc *scn, unsigned int CE_id);
/*===================CE cmpl interrupt Enable/Disable =======================*/
void ce_disable_any_copy_compl_intr_nolock(struct ol_softc *scn);
void ce_enable_any_copy_compl_intr_nolock(struct ol_softc *scn);
void ce_disable_any_copy_compl_intr_nolock(struct hif_softc *scn);
void ce_enable_any_copy_compl_intr_nolock(struct hif_softc *scn);
/* API to check if any of the copy engine pipes has
* pending frames for prcoessing
*/
bool ce_get_rx_pending(struct ol_softc *scn);
bool ce_get_rx_pending(struct hif_softc *scn);
/* CE_attr.flags values */
#define CE_ATTR_NO_SNOOP 0x01 /* Use NonSnooping PCIe accesses? */
@@ -465,16 +465,17 @@ static inline void ce_pkt_error_count_incr(
struct HIF_CE_state *_hif_state,
enum ol_ath_hif_pkt_ecodes _hif_ecode)
{
struct ol_softc *scn = HIF_GET_SOFTC(_hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(_hif_state);
if (_hif_ecode == HIF_PIPE_NO_RESOURCE)
(scn->pkt_stats.hif_pipe_no_resrc_count)
+= 1;
}
bool ce_check_rx_pending(struct ol_softc *scn, int ce_id);
bool ce_check_rx_pending(struct hif_softc *scn, int ce_id);
#if defined(FEATURE_LRO)
void ce_lro_flush_cb_register(struct ol_softc *scn,
void ce_lro_flush_cb_register(struct hif_softc *scn,
void (handler)(void *), void *data);
void ce_lro_flush_cb_deregister(struct ol_softc *scn);
void ce_lro_flush_cb_deregister(struct hif_softc *scn);
#endif
#endif /* __COPY_ENGINE_API_H__ */

8
hif/src/ce/ce_bmi.c
View File

@@ -88,7 +88,7 @@ void hif_bmi_send_done(struct CE_handle *copyeng, void *ce_context,
{
struct BMI_transaction *transaction =
(struct BMI_transaction *)transfer_context;
struct ol_softc *scn = HIF_GET_SOFTC(transaction->hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(transaction->hif_state);
#ifdef BMI_RSP_POLLING
/*
@@ -124,7 +124,7 @@ void hif_bmi_recv_data(struct CE_handle *copyeng, void *ce_context,
{
struct BMI_transaction *transaction =
(struct BMI_transaction *)transfer_context;
struct ol_softc *scn = HIF_GET_SOFTC(transaction->hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(transaction->hif_state);
transaction->bmi_response_length = nbytes;
transaction->bmi_transaction_flags |= BMI_RESP_RECV_DONE;
@@ -143,7 +143,7 @@ CDF_STATUS hif_exchange_bmi_msg(struct ol_softc *hif_ctx,
uint8_t *bmi_response,
uint32_t *bmi_response_lengthp, uint32_t TimeoutMS)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx);
struct HIF_CE_pipe_info *send_pipe_info =
&(hif_state->pipe_info[BMI_CE_NUM_TO_TARG]);
@@ -157,7 +157,7 @@ CDF_STATUS hif_exchange_bmi_msg(struct ol_softc *hif_ctx,
unsigned int mux_id = 0;
unsigned int transaction_id = 0xffff;
unsigned int user_flags = 0;
struct bmi_info *info = hif_get_bmi_ctx(scn);
struct bmi_info *info = hif_get_bmi_ctx(hif_ctx);
#ifdef BMI_RSP_POLLING
cdf_dma_addr_t buf;
unsigned int completed_nbytes, id, flags;

16
hif/src/ce/ce_diag.c
View File

@@ -54,7 +54,7 @@
void hif_dump_target_memory(struct ol_softc *hif_ctx, void *ramdump_base,
uint32_t address, uint32_t size)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
uint32_t loc = address;
uint32_t val = 0;
uint32_t j = 0;
@@ -99,7 +99,7 @@ CDF_STATUS
hif_diag_read_mem(struct ol_softc *hif_ctx, uint32_t address, uint8_t *data,
int nbytes)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
CDF_STATUS status = CDF_STATUS_SUCCESS;
cdf_dma_addr_t buf;
@@ -134,7 +134,7 @@ hif_diag_read_mem(struct ol_softc *hif_ctx, uint32_t address, uint8_t *data,
while ((nbytes >= 4) &&
(CDF_STATUS_SUCCESS == (status =
hif_diag_read_access(scn, address,
hif_diag_read_access(hif_ctx, address,
(uint32_t *)data)))) {
nbytes -= sizeof(uint32_t);
@@ -263,11 +263,11 @@ done:
CDF_STATUS hif_diag_read_access(struct ol_softc *hif_ctx,
uint32_t address, uint32_t *data)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (address >= DRAM_BASE_ADDRESS) {
/* Assume range doesn't cross this boundary */
return hif_diag_read_mem(scn, address, (uint8_t *) data,
return hif_diag_read_mem(hif_ctx, address, (uint8_t *) data,
sizeof(uint32_t));
} else {
A_TARGET_ACCESS_BEGIN_RET(scn);
@@ -281,7 +281,7 @@ CDF_STATUS hif_diag_read_access(struct ol_softc *hif_ctx,
CDF_STATUS hif_diag_write_mem(struct ol_softc *hif_ctx,
uint32_t address, uint8_t *data, int nbytes)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx);
CDF_STATUS status = CDF_STATUS_SUCCESS;
cdf_dma_addr_t buf;
@@ -435,13 +435,13 @@ done:
CDF_STATUS hif_diag_write_access(struct ol_softc *hif_ctx, uint32_t address,
uint32_t data)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (address >= DRAM_BASE_ADDRESS) {
/* Assume range doesn't cross this boundary */
uint32_t data_buf = data;
return hif_diag_write_mem(scn, address,
return hif_diag_write_mem(hif_ctx, address,
(uint8_t *) &data_buf,
sizeof(uint32_t));
} else {

4
hif/src/ce/ce_internal.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2013-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -100,7 +100,7 @@ struct CE_ring_state {
/* Copy Engine internal state */
struct CE_state {
struct ol_softc *scn;
struct hif_softc *scn;
unsigned int id;
unsigned int attr_flags; /* CE_ATTR_* */
uint32_t ctrl_addr; /* relative to BAR */

164
hif/src/ce/ce_main.c
View File

@@ -76,8 +76,8 @@ static int hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info);
#define BMI_RSP_TO_MILLISEC 1000
static int hif_post_recv_buffers(struct ol_softc *scn);
static void hif_config_rri_on_ddr(struct ol_softc *scn);
static int hif_post_recv_buffers(struct hif_softc *scn);
static void hif_config_rri_on_ddr(struct hif_softc *scn);
static void ce_poll_timeout(void *arg)
{
@@ -117,7 +117,7 @@ static unsigned int roundup_pwr2(unsigned int n)
* This should be called durring the initialization sequence before
* interupts are enabled, so we don't have to worry about thread safety.
*/
struct CE_handle *ce_init(struct ol_softc *scn,
struct CE_handle *ce_init(struct hif_softc *scn,
unsigned int CE_id, struct CE_attr *attr)
{
struct CE_state *CE_state;
@@ -474,7 +474,7 @@ ce_h2t_tx_ce_cleanup(struct CE_handle *ce_hdl)
{
struct CE_state *ce_state = (struct CE_state *)ce_hdl;
struct CE_ring_state *src_ring = ce_state->src_ring;
struct ol_softc *sc = ce_state->scn;
struct hif_softc *sc = ce_state->scn;
uint32_t sw_index, write_index;
if (sc->fastpath_mode_on && (ce_state->id == CE_HTT_H2T_MSG)) {
@@ -497,7 +497,7 @@ void ce_fini(struct CE_handle *copyeng)
{
struct CE_state *CE_state = (struct CE_state *)copyeng;
unsigned int CE_id = CE_state->id;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
CE_state->state = CE_UNUSED;
scn->ce_id_to_state[CE_id] = NULL;
@@ -555,7 +555,7 @@ hif_send_head(struct ol_softc *hif_ctx,
uint8_t pipe, unsigned int transfer_id, unsigned int nbytes,
cdf_nbuf_t nbuf, unsigned int data_attr)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx);
struct HIF_CE_pipe_info *pipe_info = &(hif_state->pipe_info[pipe]);
struct CE_handle *ce_hdl = pipe_info->ce_hdl;
@@ -633,8 +633,10 @@ hif_send_head(struct ol_softc *hif_ctx,
return status;
}
void hif_send_complete_check(struct ol_softc *scn, uint8_t pipe, int force)
void hif_send_complete_check(struct ol_softc *hif_ctx, uint8_t pipe, int force)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (!force) {
int resources;
/*
@@ -644,7 +646,7 @@ void hif_send_complete_check(struct ol_softc *scn, uint8_t pipe, int force)
* reading a CE register, which is a relatively expensive
* operation.
*/
resources = hif_get_free_queue_number(scn, pipe);
resources = hif_get_free_queue_number(hif_ctx, pipe);
/*
* If at least 50% of the total resources are still available,
* don't bother checking again yet.
@@ -683,7 +685,7 @@ hif_pci_ce_send_done(struct CE_handle *copyeng, void *ce_context,
struct HIF_CE_pipe_info *pipe_info =
(struct HIF_CE_pipe_info *)ce_context;
struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state;
struct ol_softc *scn = HIF_GET_SOFTC(hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(hif_state);
unsigned int sw_idx = sw_index, hw_idx = hw_index;
struct hif_msg_callbacks *msg_callbacks =
&hif_state->msg_callbacks_current;
@@ -752,7 +754,7 @@ hif_pci_ce_recv_data(struct CE_handle *copyeng, void *ce_context,
(struct HIF_CE_pipe_info *)ce_context;
struct HIF_CE_state *hif_state = pipe_info->HIF_CE_state;
struct CE_state *ce_state = (struct CE_state *) copyeng;
struct ol_softc *scn = HIF_GET_SOFTC(hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(hif_state);
struct hif_pci_softc *hif_sc = HIF_GET_PCI_SOFTC(hif_state);
struct hif_msg_callbacks *msg_callbacks =
&hif_state->msg_callbacks_current;
@@ -806,7 +808,7 @@ int hif_completion_thread_startup(struct HIF_CE_state *hif_state)
{
struct CE_handle *ce_diag = hif_state->ce_diag;
int pipe_num;
struct ol_softc *scn = HIF_GET_SOFTC(hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(hif_state);
struct hif_msg_callbacks *hif_msg_callbacks =
&hif_state->msg_callbacks_current;
@@ -866,7 +868,7 @@ int hif_completion_thread_startup(struct HIF_CE_state *hif_state)
* needs to continue to use BMI msg callbacks. Really, upper layers
* should not register HTC callbacks until AFTER BMI phase.
*/
static void hif_msg_callbacks_install(struct ol_softc *scn)
static void hif_msg_callbacks_install(struct hif_softc *scn)
{
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
@@ -876,23 +878,23 @@ static void hif_msg_callbacks_install(struct ol_softc *scn)
}
void
hif_get_default_pipe(struct ol_softc *scn, uint8_t *ULPipe, uint8_t *DLPipe)
hif_get_default_pipe(struct ol_softc *hif_hdl, uint8_t *ULPipe, uint8_t *DLPipe)
{
int ul_is_polled, dl_is_polled;
(void)hif_map_service_to_pipe(scn, HTC_CTRL_RSVD_SVC,
(void)hif_map_service_to_pipe(hif_hdl, HTC_CTRL_RSVD_SVC,
ULPipe, DLPipe, &ul_is_polled, &dl_is_polled);
}
/**
* hif_dump_pipe_debug_count() - Log error count
* @scn: ol_softc pointer.
* @scn: hif_softc pointer.
*
* Output the pipe error counts of each pipe to log file
*
* Return: N/A
*/
void hif_dump_pipe_debug_count(struct ol_softc *scn)
void hif_dump_pipe_debug_count(struct hif_softc *scn)
{
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
int pipe_num;
@@ -923,7 +925,7 @@ static int hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info)
{
struct CE_handle *ce_hdl;
cdf_size_t buf_sz;
struct ol_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state);
struct hif_softc *scn = HIF_GET_SOFTC(pipe_info->HIF_CE_state);
CDF_STATUS ret;
uint32_t bufs_posted = 0;
@@ -1026,7 +1028,7 @@ static int hif_post_recv_buffers_for_pipe(struct HIF_CE_pipe_info *pipe_info)
* non-zero if were were unable to completely
* replenish receive buffers.
*/
static int hif_post_recv_buffers(struct ol_softc *scn)
static int hif_post_recv_buffers(struct hif_softc *scn)
{
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
int pipe_num, rv = 0;
@@ -1050,7 +1052,7 @@ done:
CDF_STATUS hif_start(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
hif_msg_callbacks_install(scn);
@@ -1077,8 +1079,10 @@ CDF_STATUS hif_start(struct ol_softc *hif_ctx)
*/
void hif_enable_fastpath(struct ol_softc *hif_ctx)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
HIF_INFO("Enabling fastpath mode\n");
hif_ctx->fastpath_mode_on = 1;
scn->fastpath_mode_on = 1;
}
/**
@@ -1091,7 +1095,9 @@ void hif_enable_fastpath(struct ol_softc *hif_ctx)
*/
bool hif_is_fastpath_mode_enabled(struct ol_softc *hif_ctx)
{
return hif_ctx->fastpath_mode_on;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
return scn->fastpath_mode_on;
}
/**
@@ -1105,13 +1111,15 @@ bool hif_is_fastpath_mode_enabled(struct ol_softc *hif_ctx)
*/
void *hif_get_ce_handle(struct ol_softc *hif_ctx, int id)
{
return hif_ctx->ce_id_to_state[id];
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
return scn->ce_id_to_state[id];
}
#endif /* WLAN_FEATURE_FASTPATH */
void hif_recv_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info)
{
struct ol_softc *scn;
struct hif_softc *scn;
struct CE_handle *ce_hdl;
uint32_t buf_sz;
struct HIF_CE_state *hif_state;
@@ -1149,7 +1157,7 @@ void hif_send_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info)
{
struct CE_handle *ce_hdl;
struct HIF_CE_state *hif_state;
struct ol_softc *scn;
struct hif_softc *scn;
cdf_nbuf_t netbuf;
void *per_CE_context;
cdf_dma_addr_t CE_data;
@@ -1209,7 +1217,7 @@ void hif_send_buffer_cleanup_on_pipe(struct HIF_CE_pipe_info *pipe_info)
void hif_buffer_cleanup(struct HIF_CE_state *hif_state)
{
int pipe_num;
struct ol_softc *scn = HIF_GET_SOFTC(hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(hif_state);
for (pipe_num = 0; pipe_num < scn->ce_count; pipe_num++) {
struct HIF_CE_pipe_info *pipe_info;
@@ -1222,14 +1230,15 @@ void hif_buffer_cleanup(struct HIF_CE_state *hif_state)
void hif_flush_surprise_remove(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
hif_buffer_cleanup(hif_state);
}
void hif_stop(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx);
int pipe_num;
@@ -1485,19 +1494,20 @@ static struct service_to_pipe target_service_to_ce_map_wlan_epping[] = {
* Send an interrupt to the device to wake up the Target CPU
* so it has an opportunity to notice any changed state.
*/
void hif_wake_target_cpu(struct ol_softc *scn)
void hif_wake_target_cpu(struct hif_softc *scn)
{
CDF_STATUS rv;
uint32_t core_ctrl;
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
rv = hif_diag_read_access(scn,
rv = hif_diag_read_access(hif_hdl,
SOC_CORE_BASE_ADDRESS | CORE_CTRL_ADDRESS,
&core_ctrl);
CDF_ASSERT(rv == CDF_STATUS_SUCCESS);
/* A_INUM_FIRMWARE interrupt to Target CPU */
core_ctrl |= CORE_CTRL_CPU_INTR_MASK;
rv = hif_diag_write_access(scn,
rv = hif_diag_write_access(hif_hdl,
SOC_CORE_BASE_ADDRESS | CORE_CTRL_ADDRESS,
core_ctrl);
CDF_ASSERT(rv == CDF_STATUS_SUCCESS);
@@ -1507,8 +1517,9 @@ void hif_wake_target_cpu(struct ol_softc *scn)
static void hif_sleep_entry(void *arg)
{
struct HIF_CE_state *hif_state = (struct HIF_CE_state *)arg;
struct ol_softc *scn = HIF_GET_SOFTC(hif_state);
struct hif_softc *scn = HIF_GET_SOFTC(hif_state);
uint32_t idle_ms;
if (scn->recovery)
return;
@@ -1540,12 +1551,12 @@ static void hif_sleep_entry(void *arg)
#define HIF_HIA_POLLING_DELAY_MS 10
#ifndef HIF_PCI
int hif_set_hia(struct ol_softc *scn)
int hif_set_hia(struct hif_softc *scn)
{
return 0;
}
#else
int hif_set_hia(struct ol_softc *scn)
int hif_set_hia(struct hif_softc *scn)
{
CDF_STATUS rv;
uint32_t interconnect_targ_addr = 0;
@@ -1565,7 +1576,8 @@ int hif_set_hia(struct ol_softc *scn)
uint32_t chip_id;
#endif
uint32_t pipe_cfg_addr;
struct hif_target_info *tgt_info = hif_get_target_info_handle(scn);
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl);
uint32_t target_type = tgt_info->target_type;
HIF_TRACE("%s: E", __func__);
@@ -1618,7 +1630,7 @@ int hif_set_hia(struct ol_softc *scn)
offsetof(struct host_interest_s, hi_option_flag2));
#endif
/* Supply Target-side CE configuration */
rv = hif_diag_read_access(scn, interconnect_targ_addr,
rv = hif_diag_read_access(hif_hdl, interconnect_targ_addr,
&pcie_state_targ_addr);
if (rv != CDF_STATUS_SUCCESS) {
HIF_ERROR("%s: interconnect_targ_addr = 0x%0x, ret = %d",
@@ -1633,7 +1645,7 @@ int hif_set_hia(struct ol_softc *scn)
pipe_cfg_addr = pcie_state_targ_addr +
offsetof(struct pcie_state_s,
pipe_cfg_addr);
rv = hif_diag_read_access(scn,
rv = hif_diag_read_access(hif_hdl,
pipe_cfg_addr,
&pipe_cfg_targ_addr);
if (rv != CDF_STATUS_SUCCESS) {
@@ -1647,7 +1659,7 @@ int hif_set_hia(struct ol_softc *scn)
goto done;
}
rv = hif_diag_write_mem(scn, pipe_cfg_targ_addr,
rv = hif_diag_write_mem(hif_hdl, pipe_cfg_targ_addr,
(uint8_t *) target_ce_config,
target_ce_config_sz);
@@ -1656,7 +1668,7 @@ int hif_set_hia(struct ol_softc *scn)
goto done;
}
rv = hif_diag_read_access(scn,
rv = hif_diag_read_access(hif_hdl,
pcie_state_targ_addr +
offsetof(struct pcie_state_s,
svc_to_pipe_map),
@@ -1671,7 +1683,7 @@ int hif_set_hia(struct ol_softc *scn)
goto done;
}
rv = hif_diag_write_mem(scn,
rv = hif_diag_write_mem(hif_hdl,
svc_to_pipe_map,
(uint8_t *) target_service_to_ce_map,
target_service_to_ce_map_sz);
@@ -1680,7 +1692,7 @@ int hif_set_hia(struct ol_softc *scn)
goto done;
}
rv = hif_diag_read_access(scn,
rv = hif_diag_read_access(hif_hdl,
pcie_state_targ_addr +
offsetof(struct pcie_state_s,
config_flags),
@@ -1698,7 +1710,7 @@ int hif_set_hia(struct ol_softc *scn)
#if (CONFIG_PCIE_ENABLE_AXI_CLK_GATE)
pcie_config_flags |= PCIE_CONFIG_FLAG_AXI_CLK_GATE;
#endif
rv = hif_diag_write_mem(scn,
rv = hif_diag_write_mem(hif_hdl,
pcie_state_targ_addr +
offsetof(struct pcie_state_s,
config_flags),
@@ -1716,7 +1728,7 @@ int hif_set_hia(struct ol_softc *scn)
struct host_interest_s,
hi_early_alloc));
rv = hif_diag_read_access(scn, ealloc_targ_addr,
rv = hif_diag_read_access(hif_hdl, ealloc_targ_addr,
&ealloc_value);
if (rv != CDF_STATUS_SUCCESS) {
HIF_ERROR("%s: get early alloc val (%d)", __func__, rv);
@@ -1728,7 +1740,7 @@ int hif_set_hia(struct ol_softc *scn)
((HI_EARLY_ALLOC_MAGIC << HI_EARLY_ALLOC_MAGIC_SHIFT) &
HI_EARLY_ALLOC_MAGIC_MASK);
rv = hif_diag_read_access(scn,
rv = hif_diag_read_access(hif_hdl,
CHIP_ID_ADDRESS |
RTC_SOC_BASE_ADDRESS, &chip_id);
if (rv != CDF_STATUS_SUCCESS) {
@@ -1764,7 +1776,7 @@ int hif_set_hia(struct ol_softc *scn)
((banks_switched << HI_EARLY_ALLOC_IRAM_BANKS_SHIFT)
& HI_EARLY_ALLOC_IRAM_BANKS_MASK);
rv = hif_diag_write_access(scn,
rv = hif_diag_write_access(hif_hdl,
ealloc_targ_addr,
ealloc_value);
if (rv != CDF_STATUS_SUCCESS) {
@@ -1779,7 +1791,7 @@ int hif_set_hia(struct ol_softc *scn)
struct host_interest_s,
hi_option_flag2));
rv = hif_diag_read_access(scn, flag2_targ_addr,
rv = hif_diag_read_access(hif_hdl, flag2_targ_addr,
&flag2_value);
if (rv != CDF_STATUS_SUCCESS) {
HIF_ERROR("%s: get option val (%d)", __func__, rv);
@@ -1787,7 +1799,7 @@ int hif_set_hia(struct ol_softc *scn)
}
flag2_value |= HI_OPTION_EARLY_CFG_DONE;
rv = hif_diag_write_access(scn, flag2_targ_addr,
rv = hif_diag_write_access(hif_hdl, flag2_targ_addr,
flag2_value);
if (rv != CDF_STATUS_SUCCESS) {
HIF_ERROR("%s: set option val (%d)", __func__, rv);
@@ -1823,7 +1835,8 @@ static int hif_wlan_enable(void)
sizeof(struct service_to_pipe);
cfg.ce_svc_cfg = (struct ce_svc_pipe_cfg *)target_service_to_ce_map;
cfg.num_shadow_reg_cfg = shadow_cfg_sz / sizeof(struct shadow_reg_cfg);
cfg.shadow_reg_cfg = (struct icnss_shadow_reg_cfg *) target_shadow_reg_cfg;
cfg.shadow_reg_cfg =
(struct icnss_shadow_reg_cfg *) target_shadow_reg_cfg;
if (CDF_GLOBAL_FTM_MODE == con_mode)
mode = ICNSS_FTM;
@@ -1840,7 +1853,7 @@ static int hif_wlan_enable(void)
* Initializes per-device HIF state and notifies the main
* driver that a new HIF device is present.
*/
int hif_config_ce(hif_handle_t hif_hdl)
int hif_config_ce(struct hif_softc *scn)
{
struct HIF_CE_pipe_info *pipe_info;
int pipe_num;
@@ -1849,10 +1862,10 @@ int hif_config_ce(hif_handle_t hif_hdl)
#endif
CDF_STATUS rv = CDF_STATUS_SUCCESS;
int ret;
struct ol_softc *scn = hif_hdl;
struct HIF_CE_state *hif_state = (struct HIF_CE_state *)scn;
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
struct icnss_soc_info soc_info;
struct hif_target_info *tgt_info = hif_get_target_info_handle(scn);
struct hif_target_info *tgt_info = hif_get_target_info_handle(hif_hdl);
/* if epping is enabled we need to use the epping configuration. */
if (WLAN_IS_EPPING_ENABLED(cds_get_conparam())) {
@@ -1979,7 +1992,7 @@ int hif_config_ce(hif_handle_t hif_hdl)
if (rv != CDF_STATUS_SUCCESS)
goto err;
else
init_tasklet_workers(scn);
init_tasklet_workers(hif_hdl);
HIF_TRACE("%s: X, ret = %d\n", __func__, rv);
@@ -2043,7 +2056,7 @@ void hif_ipa_get_ce_resource(struct ol_softc *hif_ctx,
uint32_t *ce_sr_ring_size,
cdf_dma_addr_t *ce_reg_paddr)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
struct HIF_CE_pipe_info *pipe_info =
&(hif_state->pipe_info[HIF_PCI_IPA_UC_ASSIGNED_CE]);
@@ -2126,7 +2139,7 @@ void hif_ipa_get_ce_resource(struct ol_softc *hif_ctx,
-----------------------------------------------------------
*/
u32 shadow_sr_wr_ind_addr(struct ol_softc *scn, u32 ctrl_addr)
u32 shadow_sr_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr)
{
u32 addr = 0;
@@ -2155,7 +2168,7 @@ u32 shadow_sr_wr_ind_addr(struct ol_softc *scn, u32 ctrl_addr)
}
u32 shadow_dst_wr_ind_addr(struct ol_softc *scn, u32 ctrl_addr)
u32 shadow_dst_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr)
{
u32 addr = 0;
@@ -2194,16 +2207,17 @@ u32 shadow_dst_wr_ind_addr(struct ol_softc *scn, u32 ctrl_addr)
*
* Return: none
*/
void ce_lro_flush_cb_register(struct ol_softc *scn,
void ce_lro_flush_cb_register(struct hif_softc *scn,
void (handler)(void *), void *data)
{
uint8_t ul, dl;
int ul_polled, dl_polled;
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
CDF_ASSERT(scn != NULL);
if (CDF_STATUS_SUCCESS !=
hif_map_service_to_pipe(scn, HTT_DATA_MSG_SVC,
hif_map_service_to_pipe(hif_hdl, HTT_DATA_MSG_SVC,
&ul, &dl, &ul_polled, &dl_polled)) {
printk("%s cannot map service to pipe\n", __FUNCTION__);
return;
@@ -2224,15 +2238,16 @@ void ce_lro_flush_cb_register(struct ol_softc *scn,
*
* Return: none
*/
void ce_lro_flush_cb_deregister(struct ol_softc *scn)
void ce_lro_flush_cb_deregister(struct hif_softc *scn)
{
uint8_t ul, dl;
int ul_polled, dl_polled;
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
CDF_ASSERT(scn != NULL);
if (CDF_STATUS_SUCCESS !=
hif_map_service_to_pipe(scn, HTT_DATA_MSG_SVC,
hif_map_service_to_pipe(hif_hdl, HTT_DATA_MSG_SVC,
&ul, &dl, &ul_polled, &dl_polled)) {
printk("%s cannot map service to pipe\n", __FUNCTION__);
return;
@@ -2248,7 +2263,7 @@ void ce_lro_flush_cb_deregister(struct ol_softc *scn)
/**
* hif_map_service_to_pipe() - returns the ce ids pertaining to
* this service
* @scn: ol_softc pointer.
* @scn: hif_softc pointer.
* @svc_id: Service ID for which the mapping is needed.
* @ul_pipe: address of the container in which ul pipe is returned.
* @dl_pipe: address of the container in which dl pipe is returned.
@@ -2262,12 +2277,11 @@ void ce_lro_flush_cb_deregister(struct ol_softc *scn)
* Return: Indicates whether this operation was successful.
*/
int hif_map_service_to_pipe(struct ol_softc *scn, uint16_t svc_id,
int hif_map_service_to_pipe(struct ol_softc *hif_hdl, uint16_t svc_id,
uint8_t *ul_pipe, uint8_t *dl_pipe, int *ul_is_polled,
int *dl_is_polled)
{
int status = CDF_STATUS_SUCCESS;
unsigned int i;
struct service_to_pipe element;
@@ -2305,7 +2319,7 @@ int hif_map_service_to_pipe(struct ol_softc *scn, uint16_t svc_id,
}
#ifdef SHADOW_REG_DEBUG
inline uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct ol_softc *scn,
inline uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct hif_softc *scn,
uint32_t CE_ctrl_addr)
{
uint32_t read_from_hw, srri_from_ddr = 0;
@@ -2324,7 +2338,7 @@ inline uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct ol_softc *scn,
}
inline uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct ol_softc *scn,
inline uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct hif_softc *scn,
uint32_t CE_ctrl_addr)
{
uint32_t read_from_hw, drri_from_ddr = 0;
@@ -2348,7 +2362,7 @@ inline uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct ol_softc *scn,
/**
* hif_get_src_ring_read_index(): Called to get the SRRI
*
* @scn: ol_softc pointer
* @scn: hif_softc pointer
* @CE_ctrl_addr: base address of the CE whose RRI is to be read
*
* This function returns the SRRI to the caller. For CEs that
@@ -2356,7 +2370,7 @@ inline uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct ol_softc *scn,
*
* Return: SRRI
*/
inline unsigned int hif_get_src_ring_read_index(struct ol_softc *scn,
inline unsigned int hif_get_src_ring_read_index(struct hif_softc *scn,
uint32_t CE_ctrl_addr)
{
struct CE_attr attr;
@@ -2372,7 +2386,7 @@ inline unsigned int hif_get_src_ring_read_index(struct ol_softc *scn,
/**
* hif_get_dst_ring_read_index(): Called to get the DRRI
*
* @scn: ol_softc pointer
* @scn: hif_softc pointer
* @CE_ctrl_addr: base address of the CE whose RRI is to be read
*
* This function returns the DRRI to the caller. For CEs that
@@ -2380,7 +2394,7 @@ inline unsigned int hif_get_src_ring_read_index(struct ol_softc *scn,
*
* Return: DRRI
*/
inline unsigned int hif_get_dst_ring_read_index(struct ol_softc *scn,
inline unsigned int hif_get_dst_ring_read_index(struct hif_softc *scn,
uint32_t CE_ctrl_addr)
{
struct CE_attr attr;
@@ -2397,7 +2411,7 @@ inline unsigned int hif_get_dst_ring_read_index(struct ol_softc *scn,
/**
* hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism
*
* @scn: ol_softc pointer
* @scn: hif_softc pointer
*
* This function allocates non cached memory on ddr and sends
* the physical address of this memory to the CE hardware. The
@@ -2405,7 +2419,7 @@ inline unsigned int hif_get_dst_ring_read_index(struct ol_softc *scn,
*
* Return: None
*/
static inline void hif_config_rri_on_ddr(struct ol_softc *scn)
static inline void hif_config_rri_on_ddr(struct hif_softc *scn)
{
unsigned int i;
cdf_dma_addr_t paddr_rri_on_ddr;
@@ -2434,14 +2448,14 @@ static inline void hif_config_rri_on_ddr(struct ol_softc *scn)
/**
* hif_config_rri_on_ddr(): Configure the RRI on DDR mechanism
*
* @scn: ol_softc pointer
* @scn: hif_softc pointer
*
* This is a dummy implementation for platforms that don't
* support this functionality.
*
* Return: None
*/
static inline void hif_config_rri_on_ddr(struct ol_softc *scn)
static inline void hif_config_rri_on_ddr(struct hif_softc *scn)
{
return;
}
@@ -2455,8 +2469,9 @@ static inline void hif_config_rri_on_ddr(struct ol_softc *scn)
*
* Return: 0 for success or error code
*/
int hif_dump_ce_registers(struct ol_softc *scn)
int hif_dump_ce_registers(struct hif_softc *scn)
{
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
uint32_t ce_reg_address = CE0_BASE_ADDRESS;
uint32_t ce_reg_values[CE_COUNT_MAX][CE_USEFUL_SIZE >> 2];
uint32_t ce_reg_word_size = CE_USEFUL_SIZE >> 2;
@@ -2464,7 +2479,7 @@ int hif_dump_ce_registers(struct ol_softc *scn)
CDF_STATUS status;
for (i = 0; i < CE_COUNT_MAX; i++, ce_reg_address += CE_OFFSET) {
status = hif_diag_read_mem(scn, ce_reg_address,
status = hif_diag_read_mem(hif_hdl, ce_reg_address,
(uint8_t *) &ce_reg_values[i][0],
ce_reg_word_size * sizeof(uint32_t));
@@ -2477,6 +2492,5 @@ int hif_dump_ce_registers(struct ol_softc *scn)
(uint8_t *) &ce_reg_values[i][0],
ce_reg_word_size * sizeof(uint32_t));
}
return 0;
}

6
hif/src/ce/ce_main.h
View File

@@ -30,7 +30,7 @@
#include "cdf_atomic.h"
#include "cdf_lock.h"
#include "hif.h"
#include "hif_main.h"
#define CE_HTT_T2H_MSG 1
#define CE_HTT_H2T_MSG 4
@@ -108,7 +108,7 @@ struct ce_tasklet_entry {
};
struct HIF_CE_state {
struct ol_softc ol_sc;
struct hif_softc ol_sc;
bool started;
struct ce_tasklet_entry tasklets[CE_COUNT_MAX];
cdf_spinlock_t keep_awake_lock;
@@ -132,5 +132,5 @@ struct HIF_CE_state {
/* Copy Engine used for Diagnostic Accesses */
struct CE_handle *ce_diag;
};
int hif_dump_ce_registers(struct ol_softc *scn);
int hif_dump_ce_registers(struct hif_softc *scn);
#endif /* __CE_H__ */

14
hif/src/ce/ce_reg.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -247,9 +247,9 @@
#define CE_DEBUG_SEL_GET(x) (((x) & CE_DEBUG_SEL_MASK) >> CE_DEBUG_SEL_LSB)
#define CE_DEBUG_SEL_SET(x) (((x) << CE_DEBUG_SEL_LSB) & CE_DEBUG_SEL_MASK)
uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct ol_softc *scn,
uint32_t DEBUG_CE_SRC_RING_READ_IDX_GET(struct hif_softc *scn,
uint32_t CE_ctrl_addr);
uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct ol_softc *scn,
uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct hif_softc *scn,
uint32_t CE_ctrl_addr);
#define BITS0_TO_31(val) ((uint32_t)((uint64_t)(paddr_rri_on_ddr)\
@@ -277,9 +277,9 @@ uint32_t DEBUG_CE_DEST_RING_READ_IDX_GET(struct ol_softc *scn,
DRRI_FROM_DDR_ADDR(VADDR_FOR_CE(scn, CE_ctrl_addr))
#endif
unsigned int hif_get_src_ring_read_index(struct ol_softc *scn,
unsigned int hif_get_src_ring_read_index(struct hif_softc *scn,
uint32_t CE_ctrl_addr);
unsigned int hif_get_dst_ring_read_index(struct ol_softc *scn,
unsigned int hif_get_dst_ring_read_index(struct hif_softc *scn,
uint32_t CE_ctrl_addr);
#define CE_SRC_RING_READ_IDX_GET(scn, CE_ctrl_addr)\
@@ -511,8 +511,8 @@ unsigned int hif_get_dst_ring_read_index(struct ol_softc *scn,
#define NUM_SHADOW_REGISTERS 24
u32 shadow_sr_wr_ind_addr(struct ol_softc *scn, u32 ctrl_addr);
u32 shadow_dst_wr_ind_addr(struct ol_softc *scn, u32 ctrl_addr);
u32 shadow_sr_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr);
u32 shadow_dst_wr_ind_addr(struct hif_softc *scn, u32 ctrl_addr);
#define CE_SRC_RING_WRITE_IDX_SET(scn, CE_ctrl_addr, n) \
A_TARGET_WRITE(scn, shadow_sr_wr_ind_addr(scn, CE_ctrl_addr), n)

55
hif/src/ce/ce_service.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2013-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -229,7 +229,7 @@ ce_completed_send_next_nolock(struct CE_state *CE_state,
unsigned int *sw_idx, unsigned int *hw_idx,
uint32_t *toeplitz_hash_result);
void war_ce_src_ring_write_idx_set(struct ol_softc *scn,
void war_ce_src_ring_write_idx_set(struct hif_softc *scn,
u32 ctrl_addr, unsigned int write_index)
{
if (hif_ce_war1) {
@@ -280,7 +280,7 @@ ce_send_nolock(struct CE_handle *copyeng,
unsigned int sw_index = src_ring->sw_index;
unsigned int write_index = src_ring->write_index;
uint64_t dma_addr = buffer;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
A_TARGET_ACCESS_BEGIN_RET(scn);
if (unlikely(CE_RING_DELTA(nentries_mask,
@@ -521,7 +521,8 @@ int ce_send_fast(struct CE_handle *copyeng, cdf_nbuf_t *msdus,
unsigned int num_msdus, unsigned int transfer_id)
{
struct CE_state *ce_state = (struct CE_state *)copyeng;
struct ol_softc *scn = ce_state->scn;
struct hif_softc *scn = ce_state->scn;
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
struct CE_ring_state *src_ring = ce_state->src_ring;
u_int32_t ctrl_addr = ce_state->ctrl_addr;
unsigned int nentries_mask = src_ring->nentries_mask;
@@ -548,7 +549,7 @@ int ce_send_fast(struct CE_handle *copyeng, cdf_nbuf_t *msdus,
struct CE_src_desc *shadow_src_desc =
CE_SRC_RING_TO_DESC(shadow_base, write_index);
hif_pm_runtime_get_noresume(scn);
hif_pm_runtime_get_noresume(hif_hdl);
msdu = msdus[i];
/*
@@ -621,13 +622,13 @@ int ce_send_fast(struct CE_handle *copyeng, cdf_nbuf_t *msdus,
if (i) {
src_ring->write_index = write_index;
if (hif_pm_runtime_get(scn) == 0) {
if (hif_pm_runtime_get(hif_hdl) == 0) {
/* Don't call WAR_XXX from here
* Just call XXX instead, that has the reqd. intel
*/
war_ce_src_ring_write_idx_set(scn, ctrl_addr,
write_index);
hif_pm_runtime_put(scn);
hif_pm_runtime_put(hif_hdl);
}
}
@@ -656,7 +657,7 @@ ce_recv_buf_enqueue(struct CE_handle *copyeng,
unsigned int sw_index;
int val = 0;
uint64_t dma_addr = buffer;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
cdf_spin_lock_bh(&CE_state->ce_index_lock);
write_index = dest_ring->write_index;
@@ -716,7 +717,7 @@ ce_send_watermarks_set(struct CE_handle *copyeng,
{
struct CE_state *CE_state = (struct CE_state *)copyeng;
uint32_t ctrl_addr = CE_state->ctrl_addr;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
CE_SRC_RING_LOWMARK_SET(scn, ctrl_addr, low_alert_nentries);
CE_SRC_RING_HIGHMARK_SET(scn, ctrl_addr, high_alert_nentries);
@@ -729,7 +730,7 @@ ce_recv_watermarks_set(struct CE_handle *copyeng,
{
struct CE_state *CE_state = (struct CE_state *)copyeng;
uint32_t ctrl_addr = CE_state->ctrl_addr;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
CE_DEST_RING_LOWMARK_SET(scn, ctrl_addr,
low_alert_nentries);
@@ -774,7 +775,7 @@ unsigned int ce_recv_entries_avail(struct CE_handle *copyeng)
* The caller takes responsibility for any necessary locking.
*/
unsigned int
ce_send_entries_done_nolock(struct ol_softc *scn,
ce_send_entries_done_nolock(struct hif_softc *scn,
struct CE_state *CE_state)
{
struct CE_ring_state *src_ring = CE_state->src_ring;
@@ -806,7 +807,7 @@ unsigned int ce_send_entries_done(struct CE_handle *copyeng)
* The caller takes responsibility for any necessary locking.
*/
unsigned int
ce_recv_entries_done_nolock(struct ol_softc *scn,
ce_recv_entries_done_nolock(struct hif_softc *scn,
struct CE_state *CE_state)
{
struct CE_ring_state *dest_ring = CE_state->dest_ring;
@@ -945,7 +946,7 @@ ce_revoke_recv_next(struct CE_handle *copyeng,
unsigned int sw_index;
unsigned int write_index;
CDF_STATUS status;
struct ol_softc *scn;
struct hif_softc *scn;
CE_state = (struct CE_state *)copyeng;
dest_ring = CE_state->dest_ring;
@@ -1012,7 +1013,7 @@ ce_completed_send_next_nolock(struct CE_state *CE_state,
unsigned int nentries_mask = src_ring->nentries_mask;
unsigned int sw_index = src_ring->sw_index;
unsigned int read_index;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
if (src_ring->hw_index == sw_index) {
/*
@@ -1096,7 +1097,7 @@ ce_cancel_send_next(struct CE_handle *copyeng,
unsigned int sw_index;
unsigned int write_index;
CDF_STATUS status;
struct ol_softc *scn;
struct hif_softc *scn;
CE_state = (struct CE_state *)copyeng;
src_ring = CE_state->src_ring;
@@ -1187,7 +1188,7 @@ ce_completed_send_next(struct CE_handle *copyeng,
* within it .
*/
void ce_per_engine_servicereap(struct ol_softc *scn, unsigned int ce_id)
void ce_per_engine_servicereap(struct hif_softc *scn, unsigned int ce_id)
{
void *CE_context;
void *transfer_context;
@@ -1282,7 +1283,7 @@ void ce_per_engine_servicereap(struct ol_softc *scn, unsigned int ce_id)
* Returns: number of messages processed
*/
int ce_per_engine_service(struct ol_softc *scn, unsigned int CE_id)
int ce_per_engine_service(struct hif_softc *scn, unsigned int CE_id)
{
struct CE_state *CE_state = scn->ce_id_to_state[CE_id];
uint32_t ctrl_addr = CE_state->ctrl_addr;
@@ -1496,7 +1497,7 @@ more_watermarks:
* single interrput for all CEs
*/
void ce_per_engine_service_any(int irq, struct ol_softc *scn)
void ce_per_engine_service_any(int irq, struct hif_softc *scn)
{
int CE_id;
uint32_t intr_summary;
@@ -1542,7 +1543,7 @@ ce_per_engine_handler_adjust(struct CE_state *CE_state,
int disable_copy_compl_intr)
{
uint32_t ctrl_addr = CE_state->ctrl_addr;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
CE_state->disable_copy_compl_intr = disable_copy_compl_intr;
A_TARGET_ACCESS_BEGIN(scn);
@@ -1565,7 +1566,7 @@ ce_per_engine_handler_adjust(struct CE_state *CE_state,
/*Iterate the CE_state list and disable the compl interrupt
* if it has been registered already.
*/
void ce_disable_any_copy_compl_intr_nolock(struct ol_softc *scn)
void ce_disable_any_copy_compl_intr_nolock(struct hif_softc *scn)
{
int CE_id;
@@ -1587,7 +1588,7 @@ void ce_disable_any_copy_compl_intr_nolock(struct ol_softc *scn)
A_TARGET_ACCESS_END(scn);
}
void ce_enable_any_copy_compl_intr_nolock(struct ol_softc *scn)
void ce_enable_any_copy_compl_intr_nolock(struct hif_softc *scn)
{
int CE_id;
@@ -1703,7 +1704,7 @@ ce_watermark_cb_register(struct CE_handle *copyeng,
*/
void ce_pkt_dl_len_set(void *hif_sc, u_int32_t pkt_download_len)
{
struct ol_softc *sc = (struct ol_softc *)(hif_sc);
struct hif_softc *sc = (struct hif_softc *)(hif_sc);
struct CE_state *ce_state = sc->ce_id_to_state[CE_HTT_H2T_MSG];
cdf_assert_always(ce_state);
@@ -1719,7 +1720,7 @@ void ce_pkt_dl_len_set(void *hif_sc, u_int32_t pkt_download_len)
}
#endif /* WLAN_FEATURE_FASTPATH */
bool ce_get_rx_pending(struct ol_softc *scn)
bool ce_get_rx_pending(struct hif_softc *scn)
{
int CE_id;
@@ -1734,12 +1735,12 @@ bool ce_get_rx_pending(struct ol_softc *scn)
/**
* ce_check_rx_pending() - ce_check_rx_pending
* @scn: ol_softc
* @scn: hif_softc
* @ce_id: ce_id
*
* Return: bool
*/
bool ce_check_rx_pending(struct ol_softc *scn, int ce_id)
bool ce_check_rx_pending(struct hif_softc *scn, int ce_id)
{
struct CE_state *CE_state = scn->ce_id_to_state[ce_id];
if (cdf_atomic_read(&CE_state->rx_pending))
@@ -1758,7 +1759,7 @@ bool ce_check_rx_pending(struct ol_softc *scn, int ce_id)
*
* should be done in the initialization sequence so no locking would be needed
*/
void ce_enable_msi(struct ol_softc *scn, unsigned int CE_id,
void ce_enable_msi(struct hif_softc *scn, unsigned int CE_id,
uint32_t msi_addr_lo, uint32_t msi_addr_hi,
uint32_t msi_data)
{
@@ -1809,7 +1810,7 @@ void ce_ipa_get_resource(struct CE_handle *ce,
uint32_t ring_loop;
struct CE_src_desc *ce_desc;
cdf_dma_addr_t phy_mem_base;
struct ol_softc *scn = CE_state->scn;
struct hif_softc *scn = CE_state->scn;
if (CE_RUNNING != CE_state->state) {
*ce_sr_base_paddr = 0;

19
hif/src/ce/ce_tasklet.c
View File

@@ -57,13 +57,13 @@
/**
* ce_irq_status() - read CE IRQ status
* @scn: struct ol_softc
* @scn: struct hif_softc
* @ce_id: ce_id
* @host_status: host_status
*
* Return: IRQ status
*/
static inline void ce_irq_status(struct ol_softc *scn,
static inline void ce_irq_status(struct hif_softc *scn,
int ce_id, uint32_t *host_status)
{
uint32_t offset = HOST_IS_ADDRESS + CE_BASE_ADDRESS(ce_id);
@@ -94,7 +94,7 @@ static void reschedule_ce_tasklet_work_handler(struct work_struct *work)
{
struct tasklet_work *ce_work = container_of(work, struct tasklet_work,
work);
struct ol_softc *scn = ce_work->data;
struct hif_softc *scn = ce_work->data;
struct HIF_CE_state *hif_ce_state;
if (NULL == scn) {
@@ -194,7 +194,7 @@ static void ce_tasklet(unsigned long data)
struct ce_tasklet_entry *tasklet_entry =
(struct ce_tasklet_entry *)data;
struct HIF_CE_state *hif_ce_state = tasklet_entry->hif_ce_state;
struct ol_softc *scn = HIF_GET_SOFTC(hif_ce_state);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ce_state);
struct CE_state *CE_state = scn->ce_id_to_state[tasklet_entry->ce_id];
hif_record_ce_desc_event(tasklet_entry->ce_id, HIF_CE_TASKLET_ENTRY,
@@ -260,10 +260,10 @@ void ce_tasklet_init(struct HIF_CE_state *hif_ce_state, uint32_t mask)
*
* Return: N/A
*/
void ce_tasklet_kill(struct HIF_CE_state *hif_ce_state)
void ce_tasklet_kill(struct hif_softc *scn)
{
int i;
struct ol_softc *scn = HIF_GET_SOFTC(hif_ce_state);
struct HIF_CE_state *hif_ce_state = HIF_GET_CE_STATE(scn);
for (i = 0; i < CE_COUNT_MAX; i++)
if (hif_ce_state->tasklets[i].inited) {
@@ -283,7 +283,8 @@ static irqreturn_t ce_irq_handler(int irq, void *context)
{
struct ce_tasklet_entry *tasklet_entry = context;
struct HIF_CE_state *hif_ce_state = tasklet_entry->hif_ce_state;
struct ol_softc *scn = HIF_GET_SOFTC(hif_ce_state);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ce_state);
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
uint32_t host_status;
int ce_id = icnss_get_ce_id(irq);
@@ -304,8 +305,8 @@ static irqreturn_t ce_irq_handler(int irq, void *context)
ce_irq_status(scn, ce_id, &host_status);
cdf_atomic_inc(&scn->active_tasklet_cnt);
hif_record_ce_desc_event(ce_id, HIF_IRQ_EVENT, NULL, NULL, 0);
if (hif_napi_enabled(scn, ce_id))
hif_napi_schedule(scn, ce_id);
if (hif_napi_enabled(hif_hdl, ce_id))
hif_napi_schedule(hif_hdl, ce_id);
else
tasklet_schedule(&tasklet_entry->intr_tq);

4
hif/src/ce/ce_tasklet.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -30,7 +30,7 @@
#include "ce_main.h"
void init_tasklet_workers(struct ol_softc *scn);
void ce_tasklet_init(struct HIF_CE_state *hif_ce_state, uint32_t mask);
void ce_tasklet_kill(struct HIF_CE_state *hif_ce_state);
void ce_tasklet_kill(struct hif_softc *scn);
CDF_STATUS ce_register_irq(struct HIF_CE_state *hif_ce_state, uint32_t mask);
CDF_STATUS ce_unregister_irq(struct HIF_CE_state *hif_ce_state, uint32_t mask);
#endif /* __CE_TASKLET_H__ */

137
hif/src/hif_main.c
View File

@@ -69,8 +69,9 @@
#define PCIE_ACCESS_DUMP 4
#endif
void hif_dump(struct ol_softc *scn, uint8_t cmd_id, bool start)
void hif_dump(struct ol_softc *hif_ctx, uint8_t cmd_id, bool start)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
switch (cmd_id) {
case AGC_DUMP:
if (start)
@@ -126,8 +127,10 @@ void hif_shut_down_device(struct ol_softc *scn)
*
* Return: void
*/
void hif_cancel_deferred_target_sleep(struct ol_softc *scn)
void hif_cancel_deferred_target_sleep(struct ol_softc *hif_ctx)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
hif_pci_cancel_deferred_target_sleep(scn);
}
@@ -136,11 +139,11 @@ void hif_cancel_deferred_target_sleep(struct ol_softc *scn)
*
* Return the virtual memory base address to the caller
*
* @scn: ol_softc
* @scn: hif_softc
*
* Return: A_target_id_t
*/
A_target_id_t hif_get_target_id(struct ol_softc *scn)
A_target_id_t hif_get_target_id(struct hif_softc *scn)
{
return scn->mem;
}
@@ -153,9 +156,10 @@ A_target_id_t hif_get_target_id(struct ol_softc *scn)
*
* Return: void
*/
void hif_set_target_sleep(struct ol_softc *scn,
void hif_set_target_sleep(struct ol_softc *hif_ctx,
bool sleep_ok, bool wait_for_it)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
hif_target_sleep_state_adjust(scn,
sleep_ok, wait_for_it);
}
@@ -166,7 +170,7 @@ void hif_set_target_sleep(struct ol_softc *scn,
*
* Return: bool
*/
bool hif_target_forced_awake(struct ol_softc *scn)
bool hif_target_forced_awake(struct hif_softc *scn)
{
A_target_id_t addr = scn->mem;
bool awake;
@@ -208,7 +212,7 @@ static inline void hif_fw_event_handler(struct HIF_CE_state *hif_state)
#ifndef QCA_WIFI_3_0
irqreturn_t hif_fw_interrupt_handler(int irq, void *arg)
{
struct ol_softc *scn = arg;
struct hif_softc *scn = arg;
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
uint32_t fw_indicator_address, fw_indicator;
@@ -256,7 +260,8 @@ irqreturn_t hif_fw_interrupt_handler(int irq, void *arg)
*/
void *hif_get_targetdef(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
return scn->targetdef;
}
@@ -274,9 +279,9 @@ void *hif_get_targetdef(struct ol_softc *hif_ctx)
*
* Return: n/a
*/
void hif_vote_link_down(void *hif_ctx)
void hif_vote_link_down(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
CDF_BUG(scn);
scn->linkstate_vote--;
@@ -295,9 +300,9 @@ void hif_vote_link_down(void *hif_ctx)
*
* Return: n/a
*/
void hif_vote_link_up(void *hif_ctx)
void hif_vote_link_up(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
CDF_BUG(scn);
scn->linkstate_vote++;
@@ -317,9 +322,9 @@ void hif_vote_link_up(void *hif_ctx)
*
* Return: false if hif will guarantee link up durring suspend.
*/
bool hif_can_suspend_link(void *hif_ctx)
bool hif_can_suspend_link(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
CDF_BUG(scn);
return scn->linkstate_vote == 0;
@@ -396,9 +401,8 @@ cdf_size_t init_buffer_count(cdf_size_t maxSize)
*
* Return: int
*/
int hif_init_cdf_ctx(void *hif_ctx)
int hif_init_cdf_ctx(struct hif_softc *scn)
{
struct ol_softc *scn = (struct ol_softc *)hif_ctx;
cdf_device_t cdf_ctx = scn->cdf_dev;
cdf_ctx->drv = &scn->aps_osdev;
@@ -413,10 +417,8 @@ int hif_init_cdf_ctx(void *hif_ctx)
*
* Return: void
*/
void hif_deinit_cdf_ctx(void *hif_ctx)
void hif_deinit_cdf_ctx(struct hif_softc *scn)
{
struct ol_softc *scn = (struct ol_softc *)hif_ctx;
if (scn == NULL || !scn->cdf_dev)
return;
scn->cdf_dev = NULL;
@@ -429,9 +431,10 @@ void hif_deinit_cdf_ctx(void *hif_ctx)
*
* Return: void
*/
void hif_save_htc_htt_config_endpoint(void *hif_ctx, int htc_endpoint)
void
hif_save_htc_htt_config_endpoint(struct ol_softc *hif_ctx, int htc_endpoint)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (!scn) {
HIF_ERROR("%s: error: scn or scn->hif_sc is NULL!",
@@ -486,7 +489,8 @@ void hif_get_hw_info(struct ol_softc *scn, u32 *version, u32 *revision,
*/
CDF_STATUS hif_open(cdf_device_t cdf_ctx, enum ath_hal_bus_type bus_type)
{
struct ol_softc *scn;
struct ol_softc *hif_hdl;
struct hif_softc *scn;
v_CONTEXT_t cds_context;
CDF_STATUS status = CDF_STATUS_SUCCESS;
struct hif_config_info *cfg;
@@ -501,10 +505,11 @@ CDF_STATUS hif_open(cdf_device_t cdf_ctx, enum ath_hal_bus_type bus_type)
}
cdf_mem_zero(scn, bus_context_size);
hif_hdl = GET_HIF_OPAQUE_HDL(scn);
scn->cdf_dev = cdf_ctx;
cfg = hif_get_ini_handle(scn);
hif_hdl->cdf_dev = cdf_ctx;
cfg = hif_get_ini_handle(hif_hdl);
cfg->max_no_of_peers = 1;
cdf_atomic_init(&scn->wow_done);
cdf_atomic_init(&scn->active_tasklet_cnt);
cdf_atomic_init(&scn->link_suspended);
cdf_atomic_init(&scn->tasklet_from_intr);
@@ -527,9 +532,9 @@ CDF_STATUS hif_open(cdf_device_t cdf_ctx, enum ath_hal_bus_type bus_type)
*
* Return: n/a
*/
void hif_close(void *hif_ctx)
void hif_close(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (scn == NULL) {
HIF_ERROR("%s: ol_softc is NULL", __func__);
@@ -546,6 +551,16 @@ void hif_close(void *hif_ctx)
CDF_MODULE_ID_HIF, hif_ctx);
}
void hif_init_opaque_handle(struct hif_softc *scn)
{
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
cdf_mem_copy(&hif_hdl->aps_osdev, &scn->aps_osdev,
sizeof(hif_hdl->aps_osdev));
hif_hdl->cdf_dev = scn->cdf_dev;
hif_hdl->targetdef = scn->targetdef;
}
/**
* hif_enable(): hif_enable
* @hif_ctx: hif_ctx
@@ -557,13 +572,13 @@ void hif_close(void *hif_ctx)
*
* Return: CDF_STATUS
*/
CDF_STATUS hif_enable(void *hif_ctx, struct device *dev,
CDF_STATUS hif_enable(struct ol_softc *hif_ctx, struct device *dev,
void *bdev, const hif_bus_id *bid,
enum ath_hal_bus_type bus_type,
enum hif_enable_type type)
{
CDF_STATUS status;
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (scn == NULL) {
HIF_ERROR("%s: hif_ctx = NULL", __func__);
@@ -577,6 +592,8 @@ CDF_STATUS hif_enable(void *hif_ctx, struct device *dev,
return status;
}
hif_init_opaque_handle(scn);
if (ADRASTEA_BU)
hif_vote_link_up(hif_ctx);
@@ -595,7 +612,7 @@ CDF_STATUS hif_enable(void *hif_ctx, struct device *dev,
*/
#ifdef HIF_PCI
status = hif_configure_irq(hif_ctx);
status = hif_configure_irq(scn);
if (status < 0) {
HIF_ERROR("%s: ERROR - configure_IRQ_and_CE failed, status = %d",
__func__, status);
@@ -633,18 +650,18 @@ void hif_wlan_disable(void)
icnss_wlan_disable(mode);
}
void hif_disable(void *hif_ctx, enum hif_disable_type type)
void hif_disable(struct ol_softc *hif_ctx, enum hif_disable_type type)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (!scn)
return;
hif_nointrs(scn);
if (scn->hif_init_done == false)
hif_shut_down_device(scn);
hif_shut_down_device(hif_ctx);
else
hif_stop(scn);
hif_stop(hif_ctx);
if (ADRASTEA_BU)
hif_vote_link_down(hif_ctx);
@@ -689,9 +706,9 @@ static void hif_crash_shutdown_dump_bus_register(void *hif_ctx)
*
* Return: n/a
*/
void hif_crash_shutdown(void *hif_ctx)
void hif_crash_shutdown(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(hif_ctx);
if (!hif_state)
@@ -711,7 +728,7 @@ void hif_crash_shutdown(void *hif_ctx)
hif_crash_shutdown_dump_bus_register(hif_ctx);
if (ol_copy_ramdump(scn))
if (ol_copy_ramdump(hif_ctx))
goto out;
HIF_INFO_MED("%s: RAM dump collecting completed!", __func__);
@@ -720,7 +737,7 @@ out:
return;
}
#else
void hif_crash_shutdown(void *hif_ctx)
void hif_crash_shutdown(struct ol_softc *hif_ctx)
{
HIF_INFO_MED("%s: Collecting target RAM dump disabled",
__func__);
@@ -750,7 +767,7 @@ int hif_check_fw_reg(struct ol_softc *scn)
*
* Return: n/a
*/
void hif_read_phy_mem_base(struct ol_softc *scn, cdf_dma_addr_t *phy_mem_base)
void hif_read_phy_mem_base(struct hif_softc *scn, cdf_dma_addr_t *phy_mem_base)
{
*phy_mem_base = scn->mem_pa;
}
@@ -833,24 +850,29 @@ end:
/**
* hif_get_ini_handle() - API to get hif_config_param handle
* @scn: HIF Context
* @hif_ctx: HIF Context
*
* Return: pointer to hif_config_info
*/
struct hif_config_info *hif_get_ini_handle(struct ol_softc *scn)
struct hif_config_info *hif_get_ini_handle(struct ol_softc *hif_ctx)
{
return &scn->hif_config;
struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx);
return &sc->hif_config;
}
/**
* hif_get_target_info_handle() - API to get hif_target_info handle
* @scn: HIF context
* @hif_ctx: HIF context
*
* Return: Pointer to hif_target_info
*/
struct hif_target_info *hif_get_target_info_handle(struct ol_softc *scn)
struct hif_target_info *hif_get_target_info_handle(struct ol_softc *hif_ctx)
{
return &scn->target_info;
struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx);
return &sc->target_info;
}
#if defined(FEATURE_LRO)
@@ -879,3 +901,30 @@ void hif_lro_flush_cb_deregister(struct ol_softc *scn)
ce_lro_flush_cb_deregister(scn);
}
#endif
/**
* hif_get_target_status - API to get target status
* @hif_ctx: HIF Context
*
* Return: enum ol_target_status
*/
ol_target_status hif_get_target_status(struct ol_softc *hif_ctx)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
return scn->target_status;
}
/**
* hif_set_target_status - API to set target status
* @hif_ctx: HIF Context
* @status: Target Status
*
* Return: void
*/
void hif_set_target_status(struct ol_softc *hif_ctx, ol_target_status status)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
scn->target_status = status;
}

76
hif/src/hif_main.h
View File

@@ -100,14 +100,61 @@
#define HIF_GET_PCI_SOFTC(scn) ((struct hif_pci_softc *)scn)
#define HIF_GET_CE_STATE(scn) ((struct HIF_CE_state *)scn)
#define HIF_GET_SOFTC(scn) ((struct ol_softc *)scn)
#define HIF_GET_SOFTC(scn) ((struct hif_softc *)scn)
#define GET_HIF_OPAQUE_HDL(scn) ((struct ol_softc *)scn)
A_target_id_t hif_get_target_id(struct ol_softc *scn);
void hif_dump_pipe_debug_count(struct ol_softc *scn);
struct hif_ce_stats {
int hif_pipe_no_resrc_count;
int ce_ring_delta_fail_count;
};
bool hif_target_forced_awake(struct ol_softc *scn);
struct hif_softc {
struct ol_softc osc;
struct hif_config_info hif_config;
struct hif_target_info target_info;
struct bmi_info bmi_ctx;
void __iomem *mem;
enum ath_hal_bus_type bus_type;
void *ce_id_to_state[CE_COUNT_MAX];
cdf_device_t cdf_dev;
struct _NIC_DEV aps_osdev;
bool hif_init_done;
bool request_irq_done;
/* Packet statistics */
struct hif_ce_stats pkt_stats;
ol_target_status target_status;
struct targetdef_s *targetdef;
struct ce_reg_def *target_ce_def;
struct hostdef_s *hostdef;
struct host_shadow_regs_s *host_shadow_regs;
bool recovery;
bool notice_send;
uint32_t ce_irq_summary;
/* No of copy engines supported */
unsigned int ce_count;
atomic_t active_tasklet_cnt;
atomic_t link_suspended;
uint32_t *vaddr_rri_on_ddr;
int linkstate_vote;
int fastpath_mode_on;
atomic_t tasklet_from_intr;
int htc_endpoint;
cdf_dma_addr_t mem_pa;
bool athdiag_procfs_inited;
#ifdef FEATURE_NAPI
struct qca_napi_data napi_data;
#endif /* FEATURE_NAPI */
};
A_target_id_t hif_get_target_id(struct hif_softc *scn);
void hif_dump_pipe_debug_count(struct hif_softc *scn);
bool hif_target_forced_awake(struct hif_softc *scn);
bool hif_max_num_receives_reached(unsigned int count);
int hif_config_ce(hif_handle_t hif_hdl);
int hif_config_ce(struct hif_softc *scn);
int athdiag_procfs_init(void *scn);
void athdiag_procfs_remove(void);
/* routine to modify the initial buffer count to be allocated on an os
@@ -116,23 +163,24 @@ void athdiag_procfs_remove(void);
cdf_size_t init_buffer_count(cdf_size_t maxSize);
irqreturn_t hif_fw_interrupt_handler(int irq, void *arg);
int hif_get_target_type(struct ol_softc *ol_sc, struct device *dev,
int hif_get_target_type(struct hif_softc *ol_sc, struct device *dev,
void *bdev, const hif_bus_id *bid, uint32_t *hif_type,
uint32_t *target_type);
int hif_get_device_type(uint32_t device_id,
uint32_t revision_id,
uint32_t *hif_type, uint32_t *target_type);
/*These functions are exposed to HDD*/
int hif_init_cdf_ctx(void *ol_sc);
void hif_deinit_cdf_ctx(void *ol_sc);
bool hif_targ_is_awake(struct ol_softc *scn, void *__iomem *mem);
void hif_nointrs(struct ol_softc *scn);
void hif_bus_close(struct ol_softc *ol_sc);
CDF_STATUS hif_bus_open(struct ol_softc *ol_sc,
int hif_init_cdf_ctx(struct hif_softc *ol_sc);
void hif_deinit_cdf_ctx(struct hif_softc *ol_sc);
bool hif_targ_is_awake(struct hif_softc *scn, void *__iomem *mem);
void hif_nointrs(struct hif_softc *scn);
void hif_bus_close(struct hif_softc *ol_sc);
CDF_STATUS hif_bus_open(struct hif_softc *ol_sc,
enum ath_hal_bus_type bus_type);
CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc, struct device *dev,
CDF_STATUS hif_enable_bus(struct hif_softc *ol_sc, struct device *dev,
void *bdev, const hif_bus_id *bid, enum hif_enable_type type);
void hif_disable_bus(void *bdev);
void hif_bus_prevent_linkdown(struct ol_softc *scn, bool flag);
void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag);
int hif_bus_get_context_size(void);
void hif_read_phy_mem_base(struct hif_softc *scn, cdf_dma_addr_t *bar_value);
#endif /* __HIF_MAIN_H__ */

33
hif/src/hif_napi.c
View File

@@ -67,7 +67,7 @@ enum napi_decision_vector {
* = 0: <should never happen>
* > 0: id of the created object (for multi-NAPI, number of objects created)
*/
int hif_napi_create(struct ol_softc *hif,
int hif_napi_create(struct ol_softc *hif_ctx,
uint8_t pipe_id,
int (*poll)(struct napi_struct *, int),
int budget,
@@ -75,6 +75,7 @@ int hif_napi_create(struct ol_softc *hif,
{
struct qca_napi_data *napid;
struct qca_napi_info *napii;
struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
NAPI_DEBUG("-->(pipe=%d, budget=%d, scale=%d)\n",
pipe_id, budget, scale);
@@ -143,12 +144,13 @@ int hif_napi_create(struct ol_softc *hif,
* 0 < : error
* 0 = : success
*/
int hif_napi_destroy(struct ol_softc *hif,
int hif_napi_destroy(struct ol_softc *hif_ctx,
uint8_t id,
int force)
{
uint8_t ce = NAPI_ID2PIPE(id);
int rc = 0;
struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
NAPI_DEBUG("-->(id=%d, force=%d)\n", id, force);
@@ -222,8 +224,10 @@ int hif_napi_destroy(struct ol_softc *hif,
* Return:
* <addr>: address of the whole HIF NAPI structure
*/
inline struct qca_napi_data *hif_napi_get_all(struct ol_softc *hif)
inline struct qca_napi_data *hif_napi_get_all(struct ol_softc *hif_ctx)
{
struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
return &(hif->napi_data);
}
@@ -246,12 +250,15 @@ inline struct qca_napi_data *hif_napi_get_all(struct ol_softc *hif)
* = 0: NAPI is now disabled
* = 1: NAPI is now enabled
*/
int hif_napi_event(struct ol_softc *hif, enum qca_napi_event event, void *data)
int hif_napi_event(struct ol_softc *hif_ctx,
enum qca_napi_event event,
void *data)
{
int rc;
uint32_t prev_state;
int i;
struct napi_struct *napi;
struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
NAPI_DEBUG("-->(event=%d, aux=%p)\n", event, data);
@@ -332,9 +339,10 @@ int hif_napi_event(struct ol_softc *hif, enum qca_napi_event event, void *data)
*
* Return: bool
*/
int hif_napi_enabled(struct ol_softc *hif, int ce)
int hif_napi_enabled(struct ol_softc *hif_ctx, int ce)
{
int rc;
struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
if (-1 == ce)
rc = ((hif->napi_data.state == ENABLE_NAPI_MASK));
@@ -354,7 +362,9 @@ int hif_napi_enabled(struct ol_softc *hif, int ce)
*/
inline void hif_napi_enable_irq(struct ol_softc *hif, int id)
{
ce_irq_enable(hif, NAPI_ID2PIPE(id));
struct hif_softc *scn = HIF_GET_SOFTC(hif);
ce_irq_enable(scn, NAPI_ID2PIPE(id));
}
@@ -365,9 +375,10 @@ inline void hif_napi_enable_irq(struct ol_softc *hif, int id)
*
* Return: void
*/
int hif_napi_schedule(struct ol_softc *scn, int ce_id)
int hif_napi_schedule(struct ol_softc *hif_ctx, int ce_id)
{
int cpu = smp_processor_id();
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
scn->napi_data.napis[ce_id].stats[cpu].napi_schedules++;
NAPI_DEBUG("scheduling napi %d (ce:%d)\n",
@@ -398,12 +409,13 @@ int hif_napi_schedule(struct ol_softc *scn, int ce_id)
* Returns:
* int: the amount of work done in this poll ( <= budget)
*/
int hif_napi_poll(void *hif_ctx, struct napi_struct *napi, int budget)
int
hif_napi_poll(struct ol_softc *hif_ctx, struct napi_struct *napi, int budget)
{
int rc = 0; /* default: no work done, also takes care of error */
int normalized, bucket;
int cpu = smp_processor_id();
struct ol_softc *hif;
struct hif_softc *hif = HIF_GET_SOFTC(hif_ctx);
struct qca_napi_info *napi_info;
struct CE_state *ce_state;
@@ -413,7 +425,6 @@ int hif_napi_poll(void *hif_ctx, struct napi_struct *napi, int budget)
container_of(napi, struct qca_napi_info, napi);
napi_info->stats[cpu].napi_polls++;
hif = hif_ctx;
if (unlikely(NULL == hif))
CDF_ASSERT(hif != NULL); /* emit a warning if hif NULL */
else {
@@ -449,7 +460,7 @@ int hif_napi_poll(void *hif_ctx, struct napi_struct *napi, int budget)
/* enable interrupts */
napi_complete(napi);
if (NULL != hif) {
hif_napi_enable_irq(hif, napi_info->id);
hif_napi_enable_irq(hif_ctx, napi_info->id);
/* support suspend/resume */
cdf_atomic_dec(&(hif->active_tasklet_cnt));

4
hif/src/icnss_stub/icnss_stub.c
View File

@@ -281,7 +281,7 @@ static irqreturn_t icnss_dispatch_one_ce_irq(int ce_id)
*
* Return: N/A
*/
void icnss_dispatch_ce_irq(struct ol_softc *scn)
void icnss_dispatch_ce_irq(struct hif_softc *scn)
{
uint32_t intr_summary;
int id;
@@ -333,7 +333,7 @@ void icnss_dispatch_ce_irq(struct ol_softc *scn)
*/
int icnss_get_soc_info(void *hif_ctx, struct icnss_soc_info *info)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = hif_ctx;
if (!scn) {
HIF_ERROR("%s: SCN = NULL", __func__);

14
hif/src/mp_dev.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2014 The Linux Foundation. All rights reserved.
* Copyright (c) 2013-2014, 2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -101,13 +101,13 @@ static INLINE uint32_t get_target_reg_bits(void __iomem *mem,
return (value >> shift) & bitmask;
}
void priv_start_cap_chaninfo(struct ol_softc *scn)
void priv_start_cap_chaninfo(struct hif_softc *scn)
{
set_target_reg_bits(scn->mem, BB_chaninfo_ctrl,
CHANINFO_CTRL_CAPTURE_CHAN_INFO_MASK, 1);
}
void priv_start_agc(struct ol_softc *scn)
void priv_start_agc(struct hif_softc *scn)
{
g_priv_dump_ctx.gain_min_offsets_orig =
hif_read32_mb(scn->mem + BB_gains_min_offsets);
@@ -116,14 +116,14 @@ void priv_start_agc(struct ol_softc *scn)
0x0f);
}
void priv_stop_agc(struct ol_softc *scn)
void priv_stop_agc(struct hif_softc *scn)
{
set_target_reg_bits(scn->mem, BB_gains_min_offsets,
AGC_HISTORY_DUMP_MASK,
0);
}
void priv_dump_chaninfo(struct ol_softc *scn)
void priv_dump_chaninfo(struct hif_softc *scn)
{
uint32_t bw, val;
uint32_t len, i, tmp;
@@ -256,7 +256,7 @@ void priv_dump_chaninfo(struct ol_softc *scn)
HIF_TRACE("%s: X", __func__);
}
void priv_dump_agc(struct ol_softc *scn)
void priv_dump_agc(struct hif_softc *scn)
{
int i, len = 30; /* check this value for Rome and Peregrine */
uint32_t chain0, chain1, chain_mask, val;
@@ -310,7 +310,7 @@ void priv_dump_agc(struct ol_softc *scn)
return;
}
void priv_dump_bbwatchdog(struct ol_softc *scn)
void priv_dump_bbwatchdog(struct hif_softc *scn)
{
uint32_t val;

12
hif/src/mp_dev.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -27,10 +27,10 @@
#ifndef __MP_DEV_H__
#define __MP_DEV_H__
void priv_start_agc(struct ol_softc *scn);
void priv_dump_agc(struct ol_softc *scn);
void priv_start_cap_chaninfo(struct ol_softc *scn);
void priv_dump_chaninfo(struct ol_softc *scn);
void priv_dump_bbwatchdog(struct ol_softc *scn);
void priv_start_agc(struct hif_softc *scn);
void priv_dump_agc(struct hif_softc *scn);
void priv_start_cap_chaninfo(struct hif_softc *scn);
void priv_dump_chaninfo(struct hif_softc *scn);
void priv_dump_bbwatchdog(struct hif_softc *scn);
void hif_shut_down_device(struct ol_softc *scn);
#endif /* __MP_DEV_H__ */

38
hif/src/pcie/hif_io32_pci.h
View File

@@ -88,27 +88,27 @@
#define hif_write32_mb(addr, value) \
iowrite32((u32)(value), (void __iomem *)(addr))
extern int hif_target_sleep_state_adjust(struct ol_softc *scn,
extern int hif_target_sleep_state_adjust(struct hif_softc *scn,
bool sleep_ok,
bool wait_for_it);
#if CONFIG_ATH_PCIE_MAX_PERF
#define A_TARGET_ACCESS_BEGIN(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_END(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_OK(scn) 1
#define A_TARGET_ACCESS_LIKELY(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_UNLIKELY(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_READ(scn, offset) \
@@ -119,27 +119,27 @@ void war_pci_write32(char *addr, u32 offset, u32 value);
war_pci_write32(scn->mem, (offset), (value))
#define A_TARGET_ACCESS_BEGIN_RET(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_BEGIN_RET_EXT(scn, val) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_BEGIN_RET_PTR(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_END_RET(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_END_RET_EXT(scn, val) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#define A_TARGET_ACCESS_END_RET_PTR(scn) \
do {struct ol_softc *unused = scn; \
do {struct hif_softc *unused = scn; \
unused = unused; } while (0)
#else /* CONFIG_ATH_PCIE_MAX_PERF */
@@ -227,9 +227,9 @@ do { \
#endif /* CONFIG_ATH_PCIE_ACCESS_LIKELY */
#ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
extern uint32_t hif_target_read_checked(struct ol_softc *scn,
extern uint32_t hif_target_read_checked(struct hif_softc *scn,
uint32_t offset);
extern void hif_target_write_checked(struct ol_softc *scn, uint32_t offset,
extern void hif_target_write_checked(struct hif_softc *scn, uint32_t offset,
uint32_t value);
#define A_TARGET_READ(scn, offset) \
hif_target_read_checked(scn, (offset))
@@ -248,12 +248,12 @@ irqreturn_t hif_fw_interrupt_handler(int irq, void *arg);
/**
* ce_irq_enable() - ce_irq_enable
* @scn: ol_softc
* @scn: hif_softc
* @ce_id: ce_id
*
* Return: void
*/
static inline void ce_irq_enable(struct ol_softc *scn, int ce_id)
static inline void ce_irq_enable(struct hif_softc *scn, int ce_id)
{
uint32_t tmp = 1 << ce_id;
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
@@ -285,23 +285,23 @@ static inline void ce_irq_enable(struct ol_softc *scn, int ce_id)
}
/**
* ce_irq_disable() - ce_irq_disable
* @scn: ol_softc
* @scn: hif_softc
* @ce_id: ce_id
*
* Return: void
*/
static inline void ce_irq_disable(struct ol_softc *scn, int ce_id)
static inline void ce_irq_disable(struct hif_softc *scn, int ce_id)
{
/* For Rome only need to wake up target */
A_TARGET_ACCESS_BEGIN(scn);
}
/**
* soc_wake_reset() - soc_wake_reset
* @scn: ol_softc
* @scn: hif_softc
*
* Return: void
*/
static inline void soc_wake_reset(struct ol_softc *scn)
static inline void soc_wake_reset(struct hif_softc *scn)
{
hif_write32_mb(scn->mem +
PCIE_LOCAL_BASE_ADDRESS +

252
hif/src/pcie/if_pci.c
View File

@@ -123,7 +123,7 @@ static inline void hif_pci_route_adrastea_interrupt(struct hif_pci_softc *sc)
#else
void hif_pci_route_adrastea_interrupt(struct hif_pci_softc *sc)
{
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
unsigned int target_enable0, target_enable1;
unsigned int target_cause0, target_cause1;
@@ -146,7 +146,7 @@ void hif_pci_route_adrastea_interrupt(struct hif_pci_softc *sc)
static irqreturn_t hif_pci_interrupt_handler(int irq, void *arg)
{
struct hif_pci_softc *sc = (struct hif_pci_softc *)arg;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(arg);
volatile int tmp;
uint16_t val;
@@ -283,24 +283,24 @@ static irqreturn_t hif_pci_msi_fw_handler(int irq, void *arg)
return IRQ_HANDLED;
}
bool hif_targ_is_awake(struct ol_softc *scn, void *__iomem *mem)
bool hif_targ_is_awake(struct hif_softc *scn, void *__iomem *mem)
{
HIF_PCI_TARG_IS_AWAKE(scn, mem);
}
bool hif_pci_targ_is_present(struct ol_softc *scn, void *__iomem *mem)
bool hif_pci_targ_is_present(struct hif_softc *scn, void *__iomem *mem)
{
return 1; /* FIX THIS */
}
/**
* hif_pci_cancel_deferred_target_sleep() - cancels the defered target sleep
* @scn: ol_softc
* @scn: hif_softc
*
* Return: void
*/
#if CONFIG_ATH_PCIE_MAX_PERF == 0
void hif_pci_cancel_deferred_target_sleep(struct ol_softc *scn)
void hif_pci_cancel_deferred_target_sleep(struct hif_softc *scn)
{
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
A_target_id_t pci_addr = scn->mem;
@@ -322,7 +322,7 @@ void hif_pci_cancel_deferred_target_sleep(struct ol_softc *scn)
cdf_spin_unlock_irqrestore(&hif_state->keep_awake_lock);
}
#else
inline void hif_pci_cancel_deferred_target_sleep(struct ol_softc *scn)
inline void hif_pci_cancel_deferred_target_sleep(struct hif_softc *scn)
{
return;
}
@@ -342,7 +342,7 @@ static void hif_pci_device_reset(struct hif_pci_softc *sc)
void __iomem *mem = sc->mem;
int i;
uint32_t val;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
if (!scn->hostdef)
return;
@@ -415,7 +415,7 @@ void hif_pci_device_warm_reset(struct hif_pci_softc *sc)
int i;
uint32_t val;
uint32_t fw_indicator;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
/* NB: Don't check resetok here. This form of reset is
* integral to correct operation. */
@@ -533,7 +533,7 @@ void hif_pci_device_warm_reset(struct hif_pci_softc *sc)
#ifndef QCA_WIFI_3_0
int hif_check_fw_reg(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
void __iomem *mem = sc->mem;
uint32_t val;
@@ -553,7 +553,7 @@ int hif_check_fw_reg(struct ol_softc *hif_ctx)
int hif_check_soc_status(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
uint16_t device_id;
uint32_t val;
uint16_t timeout_count = 0;
@@ -617,7 +617,7 @@ int hif_check_soc_status(struct ol_softc *hif_ctx)
*
* Return: void
*/
static void hif_dump_pci_registers(struct ol_softc *scn)
static void hif_dump_pci_registers(struct hif_softc *scn)
{
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
void __iomem *mem = sc->mem;
@@ -750,9 +750,10 @@ static void hif_dump_pci_registers(struct ol_softc *scn)
*
* Return: 0 for success or error code
*/
int hif_dump_registers(struct ol_softc *scn)
int hif_dump_registers(struct ol_softc *hif_ctx)
{
int status;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
status = hif_dump_ce_registers(scn);
@@ -793,10 +794,10 @@ static irqreturn_t ce_per_engine_handler(int irq, void *arg)
static void reschedule_tasklet_work_handler(void *arg)
{
struct hif_pci_softc *sc = arg;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
if (!scn) {
HIF_ERROR("%s: ol_softc is NULL", __func__);
HIF_ERROR("%s: hif_softc is NULL\n", __func__);
return;
}
@@ -828,7 +829,7 @@ static void hif_init_reschedule_tasklet_work(struct hif_pci_softc *sc) { }
static void wlan_tasklet(unsigned long data)
{
struct hif_pci_softc *sc = (struct hif_pci_softc *)data;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
if (scn->hif_init_done == false)
goto end;
@@ -1043,7 +1044,7 @@ static void hif_pm_runtime_lock_timeout_fn(unsigned long data);
*/
static void hif_pm_runtime_start(struct hif_pci_softc *sc)
{
struct ol_softc *ol_sc = HIF_GET_SOFTC(sc);
struct hif_softc *ol_sc = HIF_GET_SOFTC(sc);
if (!ol_sc->enable_runtime_pm) {
HIF_INFO("%s: RUNTIME PM is disabled in ini\n", __func__);
@@ -1077,7 +1078,7 @@ static void hif_pm_runtime_start(struct hif_pci_softc *sc)
*/
static void hif_pm_runtime_stop(struct hif_pci_softc *sc)
{
struct ol_softc *ol_sc = HIF_GET_PCI_SOFTC(sc);
struct hif_softc *ol_sc = HIF_GET_PCI_SOFTC(sc);
if (!ol_sc->enable_runtime_pm)
return;
@@ -1145,7 +1146,7 @@ static void hif_pm_runtime_stop(struct hif_pci_softc *sc) {}
* the soc sleep after the driver finishes loading and re-enabling
* aspm (hif_enable_power_gating).
*/
void hif_enable_power_management(void *hif_ctx)
void hif_enable_power_management(struct ol_softc *hif_ctx)
{
struct hif_pci_softc *pci_ctx = HIF_GET_PCI_SOFTC(hif_ctx);
@@ -1165,7 +1166,7 @@ void hif_enable_power_management(void *hif_ctx)
* if runtime pm is not started. Should be updated to take care
* of aspm and soc sleep for driver load.
*/
void hif_disable_power_management(void *hif_ctx)
void hif_disable_power_management(struct ol_softc *hif_ctx)
{
struct hif_pci_softc *pci_ctx = HIF_GET_PCI_SOFTC(hif_ctx);
@@ -1195,7 +1196,7 @@ int hif_bus_get_context_size(void)
*
* Return: n/a
*/
CDF_STATUS hif_bus_open(struct ol_softc *ol_sc, enum ath_hal_bus_type bus_type)
CDF_STATUS hif_bus_open(struct hif_softc *ol_sc, enum ath_hal_bus_type bus_type)
{
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(ol_sc);
@@ -1212,7 +1213,7 @@ CDF_STATUS hif_bus_open(struct ol_softc *ol_sc, enum ath_hal_bus_type bus_type)
*
* Return: n/a
*/
void hif_bus_close(struct ol_softc *ol_sc)
void hif_bus_close(struct hif_softc *ol_sc)
{
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(ol_sc);
@@ -1228,7 +1229,7 @@ int hif_enable_pci(struct hif_pci_softc *sc,
void __iomem *mem;
int ret = 0;
uint16_t device_id;
struct ol_softc *ol_sc = HIF_GET_SOFTC(sc);
struct hif_softc *ol_sc = HIF_GET_SOFTC(sc);
pci_read_config_word(pdev,PCI_DEVICE_ID,&device_id);
if(device_id != id->device) {
@@ -1324,7 +1325,8 @@ err_region:
void hif_disable_pci(struct hif_pci_softc *sc)
{
struct ol_softc *ol_sc = HIF_GET_SOFTC(sc);
struct hif_softc *ol_sc = HIF_GET_SOFTC(sc);
if (ol_sc == NULL) {
HIF_ERROR("%s: ol_sc = NULL", __func__);
return;
@@ -1346,7 +1348,8 @@ int hif_pci_probe_tgt_wakeup(struct hif_pci_softc *sc)
#ifndef QCA_WIFI_3_0
uint32_t fw_indicator;
#endif
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
/*
* Verify that the Target was started cleanly.*
* The case where this is most likely is with an AUX-powered
@@ -1410,7 +1413,7 @@ static void wlan_tasklet_msi(unsigned long data)
{
struct hif_tasklet_entry *entry = (struct hif_tasklet_entry *)data;
struct hif_pci_softc *sc = (struct hif_pci_softc *) entry->hif_handler;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
if (scn->hif_init_done == false)
goto irq_handled;
@@ -1443,7 +1446,7 @@ int hif_configure_msi(struct hif_pci_softc *sc)
int ret = 0;
int num_msi_desired;
int rv = -1;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
HIF_TRACE("%s: E", __func__);
@@ -1559,7 +1562,7 @@ if (sc->num_msi_intrs >= 1)
static int hif_pci_configure_legacy_irq(struct hif_pci_softc *sc)
{
int ret = 0;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_softc *scn = HIF_GET_SOFTC(sc);
HIF_TRACE("%s: E", __func__);
@@ -1590,11 +1593,11 @@ end:
*
* This function stops interrupt(s)
*
* @scn: struct ol_softc
* @scn: struct hif_softc
*
* Return: none
*/
void hif_nointrs(struct ol_softc *scn)
void hif_nointrs(struct hif_softc *scn)
{
int i;
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
@@ -1629,7 +1632,7 @@ void hif_disable_bus(void *bdev)
{
struct pci_dev *pdev = bdev;
struct hif_pci_softc *sc = pci_get_drvdata(pdev);
struct ol_softc *scn;
struct hif_softc *scn;
void __iomem *mem;
/* Attach did not succeed, all resources have been
@@ -1675,17 +1678,20 @@ void hif_disable_bus(void *bdev)
*
* this api should only be called as part of bus prevent linkdown
*/
static void hif_runtime_prevent_linkdown(struct ol_softc *scn, bool flag)
static void hif_runtime_prevent_linkdown(struct hif_softc *scn, bool flag)
{
struct hif_pci_softc *sc = scn->hif_sc;
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
if (flag)
hif_pm_runtime_prevent_suspend(scn, sc->prevent_linkdown_lock);
hif_pm_runtime_prevent_suspend(hif_hdl,
sc->prevent_linkdown_lock);
else
hif_pm_runtime_allow_suspend(scn, sc->prevent_linkdown_lock);
hif_pm_runtime_allow_suspend(hif_hdl,
sc->prevent_linkdown_lock);
}
#else
static void hif_runtime_prevent_linkdown(struct ol_softc *scn, bool flag)
static void hif_runtime_prevent_linkdown(struct hif_softc *scn, bool flag)
{
}
#endif
@@ -1700,7 +1706,7 @@ static void hif_runtime_prevent_linkdown(struct ol_softc *scn, bool flag)
*
* Return: n/a
*/
void hif_bus_prevent_linkdown(struct ol_softc *scn, bool flag)
void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag)
{
HIF_ERROR("wlan: %s pcie power collapse",
(flag ? "disable" : "enable"));
@@ -1725,7 +1731,7 @@ void hif_bus_prevent_linkdown(struct ol_softc *scn, bool flag)
* Return: 0 if no bottom half is in progress when it returns.
* -EFAULT if it times out.
*/
static inline int hif_drain_tasklets(struct ol_softc *scn)
static inline int hif_drain_tasklets(struct hif_softc *scn)
{
uint32_t ce_drain_wait_cnt = 0;
@@ -1749,7 +1755,7 @@ static inline int hif_drain_tasklets(struct ol_softc *scn)
*
* Return: 0 for success and non-zero for failure
*/
static int hif_bus_suspend_link_up(struct ol_softc *scn)
static int hif_bus_suspend_link_up(struct hif_softc *scn)
{
struct pci_dev *pdev;
int status;
@@ -1778,7 +1784,7 @@ static int hif_bus_suspend_link_up(struct ol_softc *scn)
*
* Return: 0 for success and non-zero for failure
*/
static int hif_bus_resume_link_up(struct ol_softc *scn)
static int hif_bus_resume_link_up(struct hif_softc *scn)
{
struct pci_dev *pdev;
@@ -1809,10 +1815,11 @@ static int hif_bus_resume_link_up(struct ol_softc *scn)
*
* Return: 0 for success and non-zero for failure
*/
static int hif_bus_suspend_link_down(struct ol_softc *scn)
static int hif_bus_suspend_link_down(struct hif_softc *scn)
{
struct pci_dev *pdev;
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
int status = 0;
if (!hif_state) {
@@ -1831,7 +1838,7 @@ static int hif_bus_suspend_link_down(struct ol_softc *scn)
}
/* Stop the HIF Sleep Timer */
hif_cancel_deferred_target_sleep(scn);
hif_cancel_deferred_target_sleep(hif_hdl);
cdf_atomic_set(&scn->link_suspended, 1);
@@ -1845,7 +1852,7 @@ static int hif_bus_suspend_link_down(struct ol_softc *scn)
*
* Return: 0 for success and non-zero for failure
*/
static int hif_bus_resume_link_down(struct ol_softc *scn)
static int hif_bus_resume_link_down(struct hif_softc *scn)
{
struct pci_dev *pdev;
@@ -1872,10 +1879,11 @@ static int hif_bus_resume_link_down(struct ol_softc *scn)
*
* Return: 0 for success and non-zero error code for failure
*/
int hif_bus_suspend(void *hif_ctx)
int hif_bus_suspend(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
if (hif_can_suspend_link(scn))
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (hif_can_suspend_link(hif_ctx))
return hif_bus_suspend_link_down(scn);
else
return hif_bus_suspend_link_up(scn);
@@ -1888,10 +1896,11 @@ int hif_bus_suspend(void *hif_ctx)
*
* Return: 0 for success and non-zero error code for failure
*/
int hif_bus_resume(void *hif_ctx)
int hif_bus_resume(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
if (hif_can_suspend_link(scn))
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (hif_can_suspend_link(hif_ctx))
return hif_bus_resume_link_down(scn);
else
return hif_bus_resume_link_up(scn);
@@ -1904,7 +1913,7 @@ int hif_bus_resume(void *hif_ctx)
*
* indexes into the runtime pm state and sets it.
*/
static void __hif_runtime_pm_set_state(struct ol_softc *scn,
static void __hif_runtime_pm_set_state(struct hif_softc *scn,
enum hif_pm_runtime_state state)
{
struct hif_pci_softc *sc;
@@ -1925,7 +1934,7 @@ static void __hif_runtime_pm_set_state(struct ol_softc *scn,
*
* Notify hif that a runtime pm opperation has started
*/
static void hif_runtime_pm_set_state_inprogress(struct ol_softc *scn)
static void hif_runtime_pm_set_state_inprogress(struct hif_softc *scn)
{
__hif_runtime_pm_set_state(scn, HIF_PM_RUNTIME_STATE_INPROGRESS);
}
@@ -1935,7 +1944,7 @@ static void hif_runtime_pm_set_state_inprogress(struct ol_softc *scn)
*
* Notify hif that a the runtime pm state should be on
*/
static void hif_runtime_pm_set_state_on(struct ol_softc *scn)
static void hif_runtime_pm_set_state_on(struct hif_softc *scn)
{
__hif_runtime_pm_set_state(scn, HIF_PM_RUNTIME_STATE_ON);
}
@@ -1945,14 +1954,14 @@ static void hif_runtime_pm_set_state_on(struct ol_softc *scn)
*
* Notify hif that a runtime suspend attempt has been completed successfully
*/
static void hif_runtime_pm_set_state_suspended(struct ol_softc *scn)
static void hif_runtime_pm_set_state_suspended(struct hif_softc *scn)
{
__hif_runtime_pm_set_state(scn, HIF_PM_RUNTIME_STATE_SUSPENDED);
}
static inline struct hif_pci_softc *get_sc(void *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
struct hif_pci_softc *scn = HIF_GET_PCI_SOFTC(hif_ctx)
if (NULL == scn) {
HIF_ERROR("%s: Could not disable ASPM scn is null",
@@ -1960,13 +1969,13 @@ static inline struct hif_pci_softc *get_sc(void *hif_ctx)
return NULL;
}
return scn->hif_sc;
return scn;
}
/**
* hif_log_runtime_suspend_success() - log a successful runtime suspend
*/
static void hif_log_runtime_suspend_success(void *hif_ctx)
static void hif_log_runtime_suspend_success(struct hif_softc *hif_ctx)
{
struct hif_pci_softc *sc = get_sc(hif_ctx);
if (sc == NULL)
@@ -2013,7 +2022,7 @@ static void hif_log_runtime_resume_success(void *hif_ctx)
* mark last busy to delay a retry.
* adjust the runtime_pm state.
*/
void hif_process_runtime_suspend_failure(void *hif_ctx)
void hif_process_runtime_suspend_failure(struct ol_softc *hif_ctx)
{
struct hif_pci_softc *sc = get_sc(hif_ctx);
@@ -2034,14 +2043,16 @@ void hif_process_runtime_suspend_failure(void *hif_ctx)
*
* return -EINVAL if the bus won't go down. otherwise return 0
*/
int hif_pre_runtime_suspend(void *hif_ctx)
int hif_pre_runtime_suspend(struct ol_softc *hif_ctx)
{
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
if (!hif_can_suspend_link(hif_ctx)) {
HIF_ERROR("Runtime PM not supported for link up suspend");
return -EINVAL;
}
hif_runtime_pm_set_state_inprogress(hif_ctx);
hif_runtime_pm_set_state_inprogress(scn);
return 0;
}
@@ -2051,10 +2062,12 @@ int hif_pre_runtime_suspend(void *hif_ctx)
* Record the success.
* adjust the runtime_pm state
*/
void hif_process_runtime_suspend_success(void *hif_ctx)
void hif_process_runtime_suspend_success(struct ol_softc *hif_ctx)
{
hif_runtime_pm_set_state_suspended(hif_ctx);
hif_log_runtime_suspend_success(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
hif_runtime_pm_set_state_suspended(scn);
hif_log_runtime_suspend_success(scn);
}
/**
@@ -2062,9 +2075,11 @@ void hif_process_runtime_suspend_success(void *hif_ctx)
*
* update the runtime pm state.
*/
void hif_pre_runtime_resume(void *hif_ctx)
void hif_pre_runtime_resume(struct ol_softc *hif_ctx)
{
hif_runtime_pm_set_state_inprogress(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
hif_runtime_pm_set_state_inprogress(scn);
}
/**
@@ -2073,7 +2088,7 @@ void hif_pre_runtime_resume(void *hif_ctx)
* record the success.
* adjust the runtime_pm state
*/
void hif_process_runtime_resume_success(void *hif_ctx)
void hif_process_runtime_resume_success(struct ol_softc *hif_ctx)
{
struct hif_pci_softc *sc = get_sc(hif_ctx);
@@ -2089,7 +2104,7 @@ void hif_process_runtime_resume_success(void *hif_ctx)
*
* Return: 0 for success and non-zero error code for failure
*/
int hif_runtime_suspend(void *hif_ctx)
int hif_runtime_suspend(struct ol_softc *hif_ctx)
{
return hif_bus_suspend(hif_ctx);
}
@@ -2102,9 +2117,9 @@ int hif_runtime_suspend(void *hif_ctx)
* since runtime pm may cause ce_send_fast to skip the register
* write.
*/
static void hif_fastpath_resume(void *hif_ctx)
static void hif_fastpath_resume(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct CE_state *ce_state;
if (!scn)
@@ -2124,7 +2139,7 @@ static void hif_fastpath_resume(void *hif_ctx)
}
}
#else
static void hif_fastpath_resume(void *hif_ctx) {}
static void hif_fastpath_resume(struct ol_softc *hif_ctx) {}
#endif
@@ -2133,7 +2148,7 @@ static void hif_fastpath_resume(void *hif_ctx) {}
*
* Return: 0 for success and non-zero error code for failure
*/
int hif_runtime_resume(void *hif_ctx)
int hif_runtime_resume(struct ol_softc *hif_ctx)
{
int status = hif_bus_resume(hif_ctx);
@@ -2143,7 +2158,7 @@ int hif_runtime_resume(void *hif_ctx)
}
#if CONFIG_PCIE_64BIT_MSI
static void hif_free_msi_ctx(struct ol_softc *scn)
static void hif_free_msi_ctx(struct hif_softc *scn)
{
struct hif_pci_softc *sc = scn->hif_sc;
struct hif_msi_info *info = &sc->msi_info;
@@ -2155,30 +2170,29 @@ static void hif_free_msi_ctx(struct ol_softc *scn)
info->magic_dma = 0;
}
#else
static void hif_free_msi_ctx(struct ol_softc *scn)
static void hif_free_msi_ctx(struct hif_softc *scn)
{
}
#endif
void hif_disable_isr(void *ol_sc)
void hif_disable_isr(struct ol_softc *ol_sc)
{
struct ol_softc *scn = HIF_GET_SOFTC(ol_sc);
struct hif_softc *scn = HIF_GET_SOFTC(ol_sc);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
hif_nointrs(ol_sc);
hif_nointrs(scn);
hif_free_msi_ctx(scn);
/* Cancel the pending tasklet */
ce_tasklet_kill(ol_sc);
ce_tasklet_kill(scn);
tasklet_kill(&sc->intr_tq);
cdf_atomic_set(&scn->active_tasklet_cnt, 0);
}
/* Function to reset SoC */
void hif_reset_soc(void *ol_sc)
void hif_reset_soc(struct ol_softc *ol_sc)
{
struct ol_softc *scn = HIF_GET_SOFTC(ol_sc);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(ol_sc);
struct hif_target_info *tgt_info = hif_get_target_info_handle(scn);
struct hif_target_info *tgt_info = hif_get_target_info_handle(ol_sc);
#if defined(CPU_WARM_RESET_WAR)
/* Currently CPU warm reset sequence is tested only for AR9888_REV2
@@ -2194,9 +2208,9 @@ void hif_reset_soc(void *ol_sc)
#endif
}
void hif_disable_aspm(void *hif_ctx)
void hif_disable_aspm(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(hif_ctx);
if (NULL == scn) {
@@ -2217,9 +2231,9 @@ void hif_disable_aspm(void *hif_ctx)
*
* Return: none
*/
void hif_enable_power_gating(void *hif_ctx)
void hif_enable_power_gating(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(hif_ctx);
if (NULL == scn) {
@@ -2270,7 +2284,7 @@ static inline void hif_msm_pcie_debug_info(struct hif_pci_softc *sc) {};
*/
/**
* hif_target_sleep_state_adjust() - on-demand sleep/wake
* @scn: ol_softc pointer.
* @scn: hif_softc pointer.
* @sleep_ok: bool
* @wait_for_it: bool
*
@@ -2280,15 +2294,17 @@ static inline void hif_msm_pcie_debug_info(struct hif_pci_softc *sc) {};
*/
#if ((CONFIG_ATH_PCIE_MAX_PERF == 0) && CONFIG_ATH_PCIE_AWAKE_WHILE_DRIVER_LOAD)
int
hif_target_sleep_state_adjust(struct ol_softc *scn,
hif_target_sleep_state_adjust(struct hif_softc *scn,
bool sleep_ok, bool wait_for_it)
{
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
A_target_id_t pci_addr = scn->mem;
static int max_delay;
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(scn);
static int debug;
struct hif_config_info *cfg = hif_get_ini_handle(scn);
struct hif_config_info *cfg = hif_get_ini_handle(hif_hdl);
if (scn->recovery)
return -EACCES;
@@ -2450,7 +2466,7 @@ hif_target_sleep_state_adjust(struct ol_softc *scn,
}
#else
inline int
hif_target_sleep_state_adjust(struct ol_softc *scn,
hif_target_sleep_state_adjust(struct hif_softc *scn,
bool sleep_ok, bool wait_for_it)
{
return 0;
@@ -2458,7 +2474,7 @@ hif_target_sleep_state_adjust(struct ol_softc *scn,
#endif
#ifdef CONFIG_ATH_PCIE_ACCESS_DEBUG
uint32_t hif_target_read_checked(struct ol_softc *scn, uint32_t offset)
uint32_t hif_target_read_checked(struct hif_softc *scn, uint32_t offset)
{
uint32_t value;
void *addr;
@@ -2486,7 +2502,7 @@ uint32_t hif_target_read_checked(struct ol_softc *scn, uint32_t offset)
}
void
hif_target_write_checked(struct ol_softc *scn, uint32_t offset, uint32_t value)
hif_target_write_checked(struct hif_softc *scn, uint32_t offset, uint32_t value)
{
void *addr;
@@ -2595,10 +2611,10 @@ void war_pci_write32(char *addr, uint32_t offset, uint32_t value)
*
* Return: 0 - for success
*/
int hif_configure_irq(struct hif_pci_softc *sc)
int hif_configure_irq(struct hif_softc *scn)
{
int ret = 0;
struct ol_softc *scn = HIF_GET_SOFTC(sc);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(scn);
HIF_TRACE("%s: E", __func__);
@@ -2632,7 +2648,7 @@ end:
*
* Return: none
*/
void hif_target_sync(struct ol_softc *scn)
void hif_target_sync(struct hif_softc *scn)
{
hif_write32_mb(scn->mem+(SOC_CORE_BASE_ADDRESS |
PCIE_INTR_ENABLE_ADDRESS),
@@ -2684,7 +2700,7 @@ void hif_target_sync(struct ol_softc *scn)
* type: enum hif_enable_type such as HIF_ENABLE_TYPE_PROBE
* Return: CDF_STATUS
*/
CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc,
CDF_STATUS hif_enable_bus(struct hif_softc *ol_sc,
struct device *dev, void *bdev,
const hif_bus_id *bid,
enum hif_enable_type type)
@@ -2692,6 +2708,7 @@ CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc,
int ret = 0;
uint32_t hif_type, target_type;
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(ol_sc);
struct ol_softc *hif_hdl = GET_HIF_OPAQUE_HDL(ol_sc);
uint16_t revision_id;
uint32_t lcr_val;
int probe_again = 0;
@@ -2706,7 +2723,6 @@ CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc,
HIF_ERROR("%s: hif_ctx is NULL", __func__);
return CDF_STATUS_E_NOMEM;
}
ol_sc->aps_osdev.bdev = pdev;
sc->pdev = pdev;
sc->dev = &pdev->dev;
@@ -2716,7 +2732,7 @@ CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc,
ol_sc->aps_osdev.bc.bc_bustype = type;
sc->devid = id->device;
sc->cacheline_sz = dma_get_cache_alignment();
tgt_info = hif_get_target_info_handle(ol_sc);
tgt_info = hif_get_target_info_handle(hif_hdl);
again:
ret = hif_enable_pci(sc, pdev, id);
if (ret < 0) {
@@ -2804,7 +2820,7 @@ err_enable_pci:
*
* This function is used to query the target type.
*
* @ol_sc: ol_softc struct pointer
* @ol_sc: hif_softc struct pointer
* @dev: device pointer
* @bdev: bus dev pointer
* @bid: bus id pointer
@@ -2813,7 +2829,7 @@ err_enable_pci:
*
* Return: 0 for success
*/
int hif_get_target_type(struct ol_softc *ol_sc, struct device *dev,
int hif_get_target_type(struct hif_softc *ol_sc, struct device *dev,
void *bdev, const hif_bus_id *bid, uint32_t *hif_type,
uint32_t *target_type)
{
@@ -2828,9 +2844,9 @@ int hif_get_target_type(struct ol_softc *ol_sc, struct device *dev,
#ifdef FEATURE_RUNTIME_PM
void hif_pm_runtime_get_noresume(void *hif_ctx)
void hif_pm_runtime_get_noresume(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(hif_ctx);
if (NULL == sc)
@@ -2853,9 +2869,9 @@ void hif_pm_runtime_get_noresume(void *hif_ctx)
* return: success if the bus is up and a get has been issued
* otherwise an error code.
*/
int hif_pm_runtime_get(void *hif_ctx)
int hif_pm_runtime_get(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(hif_ctx);
int ret;
int pm_state;
@@ -2909,9 +2925,9 @@ int hif_pm_runtime_get(void *hif_ctx)
*
* return: CDF_STATUS_SUCCESS if the put is performed
*/
int hif_pm_runtime_put(void *hif_ctx)
int hif_pm_runtime_put(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_pci_softc *sc = HIF_GET_PCI_SOFTC(hif_ctx);
int pm_state, usage_count;
unsigned long flags;
@@ -3097,11 +3113,11 @@ static void hif_pm_runtime_lock_timeout_fn(unsigned long data)
spin_unlock_irqrestore(&hif_sc->runtime_lock, flags);
}
int hif_pm_runtime_prevent_suspend(void *ol_sc,
int hif_pm_runtime_prevent_suspend(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *data)
{
struct ol_softc *sc = (struct ol_softc *)ol_sc;
struct hif_pci_softc *hif_sc = sc->hif_sc;
struct hif_softc *sc = HIF_GET_SOFTC(ol_sc);
struct hif_pci_softc *hif_sc = HIF_GET_PCI_SOFTC(ol_sc);
struct hif_pm_runtime_lock *context = data;
unsigned long flags;
@@ -3119,10 +3135,11 @@ int hif_pm_runtime_prevent_suspend(void *ol_sc,
return 0;
}
int hif_pm_runtime_allow_suspend(void *ol_sc, struct hif_pm_runtime_lock *data)
int hif_pm_runtime_allow_suspend(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *data)
{
struct ol_softc *sc = (struct ol_softc *)ol_sc;
struct hif_pci_softc *hif_sc = sc->hif_sc;
struct hif_softc *sc = HIF_GET_SOFTC(ol_sc);
struct hif_pci_softc *hif_sc = HIF_GET_PCI_SOFTC(ol_sc);
struct hif_pm_runtime_lock *context = data;
unsigned long flags;
@@ -3170,11 +3187,12 @@ int hif_pm_runtime_allow_suspend(void *ol_sc, struct hif_pm_runtime_lock *data)
*
* Return: 0 on success and negative error code on failure
*/
int hif_pm_runtime_prevent_suspend_timeout(void *ol_sc,
int hif_pm_runtime_prevent_suspend_timeout(struct ol_softc *ol_sc,
struct hif_pm_runtime_lock *lock, unsigned int delay)
{
struct ol_softc *sc = (struct ol_softc *)ol_sc;
struct hif_pci_softc *hif_sc = sc->hif_sc;
struct hif_softc *sc = HIF_GET_SOFTC(ol_sc);
struct hif_pci_softc *hif_sc = HIF_GET_PCI_SOFTC(sc);
int ret = 0;
unsigned long expires;
unsigned long flags;
@@ -3262,11 +3280,12 @@ struct hif_pm_runtime_lock *hif_runtime_lock_init(const char *name)
*
* Return: void
*/
void hif_runtime_lock_deinit(void *hif_ctx, struct hif_pm_runtime_lock *data)
void hif_runtime_lock_deinit(struct ol_softc *hif_ctx,
struct hif_pm_runtime_lock *data)
{
unsigned long flags;
struct hif_pm_runtime_lock *context = data;
struct ol_softc *scn = hif_ctx;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx);
struct hif_pci_softc *sc;
if (!scn)
@@ -3299,8 +3318,9 @@ void hif_runtime_lock_deinit(void *hif_ctx, struct hif_pm_runtime_lock *data)
*
* Return: Pointer to BMI Context
*/
struct bmi_info *hif_get_bmi_ctx(void *hif_ctx)
struct bmi_info *hif_get_bmi_ctx(struct ol_softc *hif_ctx)
{
struct ol_softc *sc = hif_ctx;
struct hif_softc *sc = HIF_GET_SOFTC(hif_ctx);
return &sc->bmi_ctx;
}

8
hif/src/pcie/if_pci.h
View File

@@ -148,10 +148,10 @@ struct hif_pci_softc {
#endif
};
bool hif_pci_targ_is_present(struct ol_softc *scn, void *__iomem *mem);
void icnss_dispatch_ce_irq(struct ol_softc *scn);
int hif_configure_irq(struct hif_pci_softc *sc);
void hif_pci_cancel_deferred_target_sleep(struct ol_softc *scn);
bool hif_pci_targ_is_present(struct hif_softc *scn, void *__iomem *mem);
void icnss_dispatch_ce_irq(struct hif_softc *scn);
int hif_configure_irq(struct hif_softc *sc);
void hif_pci_cancel_deferred_target_sleep(struct hif_softc *scn);
/*
* A firmware interrupt to the Host is indicated by the

8
hif/src/regtable.c
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2013-2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2013-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -34,10 +34,10 @@
#include "ar6320v2def.h"
#include "qca6180def.h"
#include "ol_if_athvar.h"
#include "hif.h"
#include "hif_main.h"
#include "adrastea_reg_def.h"
void target_register_tbl_attach(struct ol_softc *scn, u32 target_type)
void target_register_tbl_attach(struct hif_softc *scn, u32 target_type)
{
switch (target_type) {
case TARGET_TYPE_AR9888:
@@ -65,7 +65,7 @@ void target_register_tbl_attach(struct ol_softc *scn, u32 target_type)
}
}
void hif_register_tbl_attach(struct ol_softc *scn, u32 hif_type)
void hif_register_tbl_attach(struct hif_softc *scn, u32 hif_type)
{
switch (hif_type) {
case HIF_TYPE_AR9888:

30
hif/src/snoc/hif_io32_snoc.h
View File

@@ -1,5 +1,5 @@
/*
* Copyright (c) 2015 The Linux Foundation. All rights reserved.
* Copyright (c) 2015-2016 The Linux Foundation. All rights reserved.
*
* Previously licensed under the ISC license by Qualcomm Atheros, Inc.
*
@@ -70,12 +70,12 @@
#define Q_TARGET_ACCESS_BEGIN(scn) 0
#define Q_TARGET_ACCESS_END(scn) 0
static inline void hif_pci_cancel_deferred_target_sleep(struct ol_softc *scn)
static inline void hif_pci_cancel_deferred_target_sleep(struct hif_softc *scn)
{
return;
}
static inline void hif_target_sleep_state_adjust(struct ol_softc *scn,
static inline void hif_target_sleep_state_adjust(struct hif_softc *scn,
bool sleep_ok, bool wait_for_it)
{
return;
@@ -83,11 +83,11 @@ static inline void hif_target_sleep_state_adjust(struct ol_softc *scn,
/**
* soc_wake_reset() - soc_wake_reset
* @scn: ol_softc
* @scn: hif_softc
*
* Return: void
*/
static inline void soc_wake_reset(struct ol_softc *scn)
static inline void soc_wake_reset(struct hif_softc *scn)
{
}
@@ -131,7 +131,7 @@ static inline uint32_t hif_read32_mb(void __iomem *addr)
#define ADRASTEA_CE_INTR_STATUS 0x002F00AC
static inline void ce_enable_irq_in_individual_register(struct ol_softc *scn,
static inline void ce_enable_irq_in_individual_register(struct hif_softc *scn,
int ce_id)
{
uint32_t offset;
@@ -140,7 +140,7 @@ static inline void ce_enable_irq_in_individual_register(struct ol_softc *scn,
hif_read32_mb(scn->mem + offset);
}
static inline void ce_disable_irq_in_individual_register(struct ol_softc *scn,
static inline void ce_disable_irq_in_individual_register(struct hif_softc *scn,
int ce_id)
{
uint32_t offset;
@@ -149,14 +149,14 @@ static inline void ce_disable_irq_in_individual_register(struct ol_softc *scn,
hif_read32_mb(scn->mem + offset);
}
static inline void ce_read_irq_group_status(struct ol_softc *scn)
static inline void ce_read_irq_group_status(struct hif_softc *scn)
{
uint32_t group_status = 0;
group_status = hif_read32_mb(scn->mem +
ADRASTEA_CE_INTR_STATUS);
}
static inline void ce_clear_irq_group_status(struct ol_softc *scn, int mask)
static inline void ce_clear_irq_group_status(struct hif_softc *scn, int mask)
{
uint32_t group_status = 0;
group_status = hif_read32_mb(scn->mem +
@@ -172,7 +172,7 @@ static inline void ce_clear_irq_group_status(struct ol_softc *scn, int mask)
/* this will need to be changed when we move to reg set 36
* because we will have set & clear registers provided
*/
static inline void ce_enable_irq_in_group_reg(struct ol_softc *scn,
static inline void ce_enable_irq_in_group_reg(struct hif_softc *scn,
int mask)
{
int new_mask = 0;
@@ -190,7 +190,7 @@ static inline void ce_enable_irq_in_group_reg(struct ol_softc *scn,
/* this will need to be changed when we move to reg set 36
* because we will have set & clear registers provided
*/
static inline void ce_disable_irq_in_group_reg(struct ol_softc *scn,
static inline void ce_disable_irq_in_group_reg(struct hif_softc *scn,
int mask)
{
int new_mask = 0;
@@ -207,12 +207,12 @@ static inline void ce_disable_irq_in_group_reg(struct ol_softc *scn,
/**
* ce_irq_enable() - enable copy engine IRQ
* @scn: struct ol_softc
* @scn: struct hif_softc
* @ce_id: ce_id
*
* Return: N/A
*/
static inline void ce_irq_enable(struct ol_softc *scn,
static inline void ce_irq_enable(struct hif_softc *scn,
int ce_id)
{
icnss_enable_irq(ce_id);
@@ -222,12 +222,12 @@ static inline void ce_irq_enable(struct ol_softc *scn,
/**
* ce_irq_disable() - disable copy engine IRQ
* @scn: struct ol_softc
* @scn: struct hif_softc
* @ce_id: ce_id
*
* Return: N/A
*/
static inline void ce_irq_disable(struct ol_softc *scn, int ce_id)
static inline void ce_irq_disable(struct hif_softc *scn, int ce_id)
{
ce_disable_irq_in_group_reg(scn, 1<<ce_id);
ce_clear_irq_group_status(scn, 1<<ce_id);

44
hif/src/snoc/if_snoc.c
View File

@@ -47,7 +47,7 @@
* This is duplicated here because CONFIG_CNSS can be defined
* even though it is not used for the snoc bus.
*/
void hif_bus_prevent_linkdown(struct ol_softc *scn, bool flag)
void hif_bus_prevent_linkdown(struct hif_softc *scn, bool flag)
{
HIF_ERROR("wlan: %s pcie power collapse ignored",
(flag ? "disable" : "enable"));
@@ -58,12 +58,12 @@ void hif_bus_prevent_linkdown(struct ol_softc *scn, bool flag)
*
* This function returns true if the target is awake
*
* @scn: struct ol_softc
* @scn: struct hif_softc
* @mem: mapped mem base
*
* Return: bool
*/
bool hif_targ_is_awake(struct ol_softc *scn, void *__iomem *mem)
bool hif_targ_is_awake(struct hif_softc *scn, void *__iomem *mem)
{
return true;
}
@@ -78,7 +78,7 @@ bool hif_targ_is_awake(struct ol_softc *scn, void *__iomem *mem)
* Return: void
*/
/* Function to reset SoC */
void hif_reset_soc(void *hif_ctx)
void hif_reset_soc(struct ol_softc *hif_ctx)
{
}
@@ -87,14 +87,13 @@ void hif_reset_soc(void *hif_ctx)
*
* This function disables isr and kills tasklets
*
* @hif_ctx: struct ol_softc
* @hif_ctx: struct hif_softc
*
* Return: void
*/
void hif_disable_isr(void *hif_ctx)
void hif_disable_isr(struct ol_softc *hif_ctx)
{
struct ol_softc *scn = (struct ol_softc *)hif_ctx;
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx)
hif_nointrs(scn);
ce_tasklet_kill(scn);
@@ -103,13 +102,13 @@ void hif_disable_isr(void *hif_ctx)
/**
* hif_dump_snoc_registers(): dump CE debug registers
* @scn: struct ol_softc
* @scn: struct hif_softc
*
* This function dumps SNOC debug registers
*
* Return: void
*/
static void hif_dump_snoc_registers(struct ol_softc *scn)
static void hif_dump_snoc_registers(struct hif_softc *scn)
{
return;
}
@@ -122,9 +121,10 @@ static void hif_dump_snoc_registers(struct ol_softc *scn)
*
* Return: 0 for success or error code
*/
int hif_dump_registers(struct ol_softc *scn)
int hif_dump_registers(struct ol_softc *hif_ctx)
{
int status;
struct hif_softc *scn = HIF_GET_SOFTC(hif_ctx)
status = hif_dump_ce_registers(scn);
if (status)
@@ -143,7 +143,7 @@ int hif_dump_registers(struct ol_softc *scn)
*
* Return: 0 for success and non-zero for failure
*/
int hif_bus_suspend(void *hif_ctx)
int hif_bus_suspend(struct ol_softc *hif_ctx)
{
return 0;
}
@@ -156,7 +156,7 @@ int hif_bus_suspend(void *hif_ctx)
*
* Return: 0 for success and non-zero for failure
*/
int hif_bus_resume(void *hif_ctx)
int hif_bus_resume(struct ol_softc *hif_ctx)
{
return 0;
}
@@ -166,7 +166,7 @@ int hif_bus_resume(void *hif_ctx)
*
* Return: n/a
*/
void hif_enable_power_gating(void *hif_ctx)
void hif_enable_power_gating(struct ol_softc *hif_ctx)
{
}
@@ -175,7 +175,7 @@ void hif_enable_power_gating(void *hif_ctx)
*
* Return: n/a
*/
void hif_disable_aspm(void *hif_ctx)
void hif_disable_aspm(struct ol_softc *hif_ctx)
{
}
@@ -184,7 +184,7 @@ void hif_disable_aspm(void *hif_ctx)
*
* Return: n/a
*/
void hif_bus_close(struct ol_softc *scn)
void hif_bus_close(struct hif_softc *scn)
{
}
@@ -204,7 +204,7 @@ int hif_bus_get_context_size(void)
*
* Return: n/a
*/
CDF_STATUS hif_bus_open(struct ol_softc *scn, enum ath_hal_bus_type bus_type)
CDF_STATUS hif_bus_open(struct hif_softc *scn, enum ath_hal_bus_type bus_type)
{
return CDF_STATUS_SUCCESS;
}
@@ -214,7 +214,7 @@ CDF_STATUS hif_bus_open(struct ol_softc *scn, enum ath_hal_bus_type bus_type)
*
* This function is used to query the target type.
*
* @ol_sc: ol_softc struct pointer
* @ol_sc: hif_softc struct pointer
* @dev: device pointer
* @bdev: bus dev pointer
* @bid: bus id pointer
@@ -223,7 +223,7 @@ CDF_STATUS hif_bus_open(struct ol_softc *scn, enum ath_hal_bus_type bus_type)
*
* Return: 0 for success
*/
int hif_get_target_type(struct ol_softc *ol_sc, struct device *dev,
int hif_get_target_type(struct hif_softc *ol_sc, struct device *dev,
void *bdev, const hif_bus_id *bid, uint32_t *hif_type,
uint32_t *target_type)
{
@@ -247,7 +247,7 @@ int hif_get_target_type(struct ol_softc *ol_sc, struct device *dev,
*
* Return: CDF_STATUS
*/
CDF_STATUS hif_enable_bus(struct ol_softc *ol_sc,
CDF_STATUS hif_enable_bus(struct hif_softc *ol_sc,
struct device *dev, void *bdev,
const hif_bus_id *bid,
enum hif_enable_type type)
@@ -311,11 +311,11 @@ void hif_disable_bus(void *bdev)
*
* This function stops interrupt(s)
*
* @scn: struct ol_softc
* @scn: struct hif_softc
*
* Return: none
*/
void hif_nointrs(struct ol_softc *scn)
void hif_nointrs(struct hif_softc *scn)
{
struct HIF_CE_state *hif_state = HIF_GET_CE_STATE(scn);
if (scn->request_irq_done) {