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disp: msm: sde: add support for hw-fence feature

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Starting mdss 9.0, dpu supports triggering
the frame fetch through hw-fencing. This change
adds support for this hw-fence feature.

Change-Id: Icc7d0b69fc2a51103d14612f5ac89b44a47ed826
Signed-off-by: Ingrid Gallardo <quic_ingridg@quicinc.com>
Signed-off-by: Christina Oliveira <quic_coliveir@quicinc.com>
This commit is contained in:
Christina Oliveira
2022-05-04 14:50:15 -07:00
committed by Gerrit - the friendly Code Review server
parent 487e4ebec2
commit 640c8111d3
20 changed files with 1444 additions and 113 deletions
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49
msm/sde/sde_plane.c
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@@ -78,55 +78,6 @@ enum sde_plane_qos {
SDE_PLANE_QOS_PANIC_CTRL = BIT(2),
};
struct sde_plane {
struct drm_plane base;
struct mutex lock;
enum sde_sspp pipe;
uint64_t features; /* capabilities from catalog */
uint32_t perf_features; /* perf capabilities from catalog */
uint32_t nformats;
uint32_t formats[64];
struct sde_hw_pipe *pipe_hw;
struct sde_hw_pipe_cfg pipe_cfg;
struct sde_hw_sharp_cfg sharp_cfg;
struct sde_hw_pipe_qos_cfg pipe_qos_cfg;
uint32_t color_fill;
bool is_error;
bool is_rt_pipe;
enum sde_wb_usage_type wb_usage_type;
bool is_virtual;
struct list_head mplane_list;
struct sde_mdss_cfg *catalog;
bool revalidate;
bool xin_halt_forced_clk;
struct sde_csc_cfg csc_cfg;
struct sde_csc_cfg *csc_usr_ptr;
struct sde_csc_cfg *csc_ptr;
uint32_t cached_lut_flag;
struct sde_hw_scaler3_cfg scaler3_cfg;
struct sde_hw_pixel_ext pixel_ext;
const struct sde_sspp_sub_blks *pipe_sblk;
char pipe_name[SDE_NAME_SIZE];
struct msm_property_info property_info;
struct msm_property_data property_data[PLANE_PROP_COUNT];
struct drm_property_blob *blob_info;
struct drm_property_blob *blob_rot_caps;
/* debugfs related stuff */
struct dentry *debugfs_root;
bool debugfs_default_scale;
};
#define to_sde_plane(x) container_of(x, struct sde_plane, base)
static int plane_prop_array[PLANE_PROP_COUNT] = {SDE_PLANE_DIRTY_ALL};
static struct sde_kms *_sde_plane_get_kms(struct drm_plane *plane)