msm: camera: isp: Add logs to print hw versions during init

This commit adds debug logs with the read values of hardware versions
of individual hardware components of IFE, SFE and CSID as part of
hardware initialization.

CRs-Fixed: 3071027
Change-Id: I11f4c31ffec2d3d1dc78712c22b85df09691addb
Signed-off-by: Anand Ravi <[email protected]>

drivers/cam_isp/isp_hw_mgr/hw_utils/irq_controller/cam_irq_controller.c

@@ -1019,7 +1019,7 @@ static int cam_irq_controller_test_irq_line_top_half(uint32_t evt_id,
 
 	test_priv = th_payload->handler_priv;
 	complete(&test_priv->complete);
-	CAM_DBG(CAM_IRQ_CTRL, "%s IRQ line verified", test_priv->msg);
+	CAM_INFO(CAM_IRQ_CTRL, "%s IRQ line verified", test_priv->msg);
 
 	return 0;
 }

drivers/cam_isp/isp_hw_mgr/isp_hw/ife_csid_hw/cam_ife_csid_hw_ver2.c

@@ -5467,6 +5467,8 @@ int cam_ife_csid_ver2_irq_line_test(void *hw_priv)
 	struct cam_ife_csid_ver2_hw *csid_hw;
 	struct cam_hw_soc_info *soc_info;
 	int rc = 0;
+	void __iomem *mem_base;
+	struct cam_ife_csid_ver2_reg_info *csid_reg;
 
 	if (!hw_priv) {
 		CAM_ERR(CAM_ISP, "CSID: Invalid args");
@@ -5476,12 +5478,18 @@ int cam_ife_csid_ver2_irq_line_test(void *hw_priv)
 	csid_hw = ((struct cam_hw_info *)hw_priv)->core_info;
 	soc_info = &csid_hw->hw_info->soc_info;
 
+	mem_base = csid_hw->hw_info->soc_info.reg_map[CAM_IFE_CSID_CLC_MEM_BASE_ID].mem_base;
+	csid_reg = csid_hw->core_info->csid_reg;
 	rc = cam_ife_csid_enable_soc_resources(soc_info, CAM_LOWSVS_VOTE);
 	if (rc) {
 		CAM_ERR(CAM_ISP, "CSID[%d] Enable soc failed", csid_hw->hw_intf->hw_idx);
 		return rc;
 	}
 
+	CAM_DBG(CAM_ISP, "CSID[%d] hw-version:0x%x",
+		csid_hw->hw_intf->hw_idx,
+		cam_io_r_mb(mem_base + csid_reg->cmn_reg->hw_version_addr));
+
 	rc = cam_irq_controller_test_irq_line(csid_hw->csid_irq_controller, "CSID:%d",
 		csid_hw->hw_intf->hw_idx);
 

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/cam_sfe_core.c

@@ -67,11 +67,35 @@ int cam_sfe_init_hw(void *hw_priv, void *init_hw_args, uint32_t arg_size)
 	if (rc) {
 		CAM_ERR(CAM_SFE, "Enable SOC failed");
 		rc = -EFAULT;
-		goto decrement_open_cnt;
+		goto deinit_hw;
 	}
 
 	CAM_DBG(CAM_SFE, "SFE SOC resource enabled");
 
+	if (core_info->sfe_top->hw_ops.init) {
+		rc = core_info->sfe_top->hw_ops.init(core_info->sfe_top->top_priv, NULL, 0);
+		if (rc) {
+			CAM_ERR(CAM_SFE, "Top init failed rc=%d", rc);
+			goto deinit_hw;
+		}
+	}
+
+	if (core_info->sfe_bus_wr->hw_ops.init) {
+		rc = core_info->sfe_bus_wr->hw_ops.init(core_info->sfe_bus_wr->bus_priv, NULL, 0);
+		if (rc) {
+			CAM_ERR(CAM_SFE, "Bus WR init failed rc=%d", rc);
+			goto deinit_hw;
+		}
+	}
+
+	if (core_info->sfe_bus_rd->hw_ops.init) {
+		rc = core_info->sfe_bus_rd->hw_ops.init(core_info->sfe_bus_rd->bus_priv, NULL, 0);
+		if (rc) {
+			CAM_ERR(CAM_SFE, "Bus RD init failed rc=%d", rc);
+			goto deinit_hw;
+		}
+	}
+
 	/*
 	 * Async Reset as part of power ON
 	 * Any register write in bus_wr_init/bus_rd_init
@@ -82,10 +106,8 @@ int cam_sfe_init_hw(void *hw_priv, void *init_hw_args, uint32_t arg_size)
 	sfe_hw->hw_state = CAM_HW_STATE_POWER_UP;
 	return rc;
 
-decrement_open_cnt:
-	mutex_lock(&sfe_hw->hw_mutex);
-	sfe_hw->open_count--;
-	mutex_unlock(&sfe_hw->hw_mutex);
+deinit_hw:
+	cam_sfe_deinit_hw(hw_priv, NULL, 0);
 	return rc;
 }
 
@@ -93,8 +115,10 @@ int cam_sfe_deinit_hw(void *hw_priv, void *deinit_hw_args, uint32_t arg_size)
 {
 	struct cam_hw_info                *sfe_hw = hw_priv;
 	struct cam_hw_soc_info            *soc_info = NULL;
+	struct cam_sfe_hw_core_info       *core_info = NULL;
 	int rc = 0;
 
+
 	if (!hw_priv) {
 		CAM_ERR(CAM_SFE, "Invalid arguments");
 		return -EINVAL;
@@ -117,6 +141,25 @@ int cam_sfe_deinit_hw(void *hw_priv, void *deinit_hw_args, uint32_t arg_size)
 	mutex_unlock(&sfe_hw->hw_mutex);
 
 	soc_info = &sfe_hw->soc_info;
+	core_info = (struct cam_sfe_hw_core_info *)sfe_hw->core_info;
+
+	if (core_info->sfe_bus_rd->hw_ops.deinit) {
+		rc = core_info->sfe_bus_rd->hw_ops.deinit(core_info->sfe_bus_rd->bus_priv, NULL, 0);
+		if (rc)
+			CAM_ERR(CAM_SFE, "Bus RD deinit failed rc=%d", rc);
+	}
+
+	if (core_info->sfe_bus_wr->hw_ops.deinit) {
+		rc = core_info->sfe_bus_wr->hw_ops.deinit(core_info->sfe_bus_wr->bus_priv, NULL, 0);
+		if (rc)
+			CAM_ERR(CAM_SFE, "Bus WR deinit failed rc=%d", rc);
+	}
+
+	if (core_info->sfe_top->hw_ops.deinit) {
+		rc = core_info->sfe_top->hw_ops.deinit(core_info->sfe_top->top_priv, NULL, 0);
+		if (rc)
+			CAM_ERR(CAM_SFE, "Top deinit failed rc=%d", rc);
+	}
 
 	/* Turn OFF Regulators, Clocks and other SOC resources */
 	CAM_DBG(CAM_SFE, "Disable SFE SOC resource");

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_bus/cam_sfe_bus_rd.c

@@ -1600,6 +1600,18 @@ end:
 static int cam_sfe_bus_init_hw(void *hw_priv,
 	void *init_hw_args, uint32_t arg_size)
 {
+	struct cam_sfe_bus_rd_priv *bus_priv = hw_priv;
+
+	if (!hw_priv) {
+		CAM_ERR(CAM_SFE, "Invalid args");
+		return -EINVAL;
+	}
+
+	CAM_DBG(CAM_SFE, "SFE:%d bus-rd hw-version:0x%x",
+		bus_priv->common_data.core_index,
+		cam_io_r_mb(bus_priv->common_data.mem_base +
+			bus_priv->common_data.common_reg->hw_version));
+
 	return 0;
 }
 

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_bus/cam_sfe_bus_wr.c

@@ -3049,6 +3049,18 @@ static int cam_sfe_bus_wr_stop_hw(void *hw_priv,
 static int cam_sfe_bus_wr_init_hw(void *hw_priv,
 	void *init_hw_args, uint32_t arg_size)
 {
+	struct cam_sfe_bus_wr_priv *bus_priv = hw_priv;
+
+	if (!hw_priv) {
+		CAM_ERR(CAM_SFE, "Invalid args");
+		return -EINVAL;
+	}
+
+	CAM_DBG(CAM_SFE, "SFE:%d bus-wr hw-version:0x%x",
+		bus_priv->common_data.core_index,
+		cam_io_r_mb(bus_priv->common_data.mem_base +
+			bus_priv->common_data.common_reg->hw_version));
+
 	return 0;
 }
 

drivers/cam_isp/isp_hw_mgr/isp_hw/sfe_hw/sfe_top/cam_sfe_top.c

@@ -1748,6 +1748,25 @@ int cam_sfe_top_stop(
 	return 0;
 }
 
+int cam_sfe_top_init_hw(void *priv, void *init_hw_args, uint32_t arg_size)
+{
+	struct cam_sfe_top_priv *top_priv = priv;
+	void __iomem *mem_base;
+
+	if (!priv) {
+		CAM_ERR(CAM_SFE, "Invalid args");
+		return -EINVAL;
+	}
+
+	mem_base = top_priv->common_data.soc_info->reg_map[SFE_CORE_BASE_IDX].mem_base;
+
+	CAM_DBG(CAM_SFE, "SFE:%d hw-version:0x%x",
+		top_priv->common_data.hw_intf->hw_idx,
+		cam_io_r_mb(mem_base + top_priv->hw_info->common_reg->hw_version));
+
+	return 0;
+}
+
 int cam_sfe_top_init(
 	uint32_t                            hw_version,
 	struct cam_hw_soc_info             *soc_info,
@@ -1892,6 +1911,7 @@ int cam_sfe_top_init(
 	sfe_top->hw_ops.stop = cam_sfe_top_stop;
 	sfe_top->hw_ops.reserve = cam_sfe_top_reserve;
 	sfe_top->hw_ops.release = cam_sfe_top_release;
+	sfe_top->hw_ops.init = cam_sfe_top_init_hw;
 
 	spin_lock_init(&top_priv->spin_lock);
 	INIT_LIST_HEAD(&top_priv->common_data.free_payload_list);

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_bus/cam_vfe_bus_ver3.c

@@ -4074,6 +4074,11 @@ static int cam_vfe_bus_ver3_init_hw(void *hw_priv,
 
 	bus_priv->common_data.hw_init = true;
 
+	CAM_DBG(CAM_ISP, "VFE:%d bus-wr hw-version:0x%x",
+		bus_priv->common_data.core_index,
+		cam_io_r_mb(bus_priv->common_data.mem_base +
+			bus_priv->common_data.common_reg->hw_version));
+
 	return 0;
 }
 

drivers/cam_isp/isp_hw_mgr/isp_hw/vfe_hw/vfe_top/cam_vfe_top_ver4.c

@@ -648,6 +648,10 @@ int cam_vfe_top_ver4_init_hw(void *device_priv,
 	top_priv->top_common.hw_version = cam_io_r_mb(
 		top_priv->top_common.soc_info->reg_map[0].mem_base +
 		common_data.common_reg->hw_version);
+	CAM_DBG(CAM_ISP, "VFE:%d hw-version:0x%x",
+		top_priv->top_common.hw_idx,
+		top_priv->top_common.hw_version);
+
 	return 0;
 }