audio-lnx: Rename folders to new flat structure.
Kernel audio drivers can be categorised into below folders. asoc - ALSA based drivers, asoc/codecs - codec drivers, ipc - APR IPC communication drivers, dsp - DSP low level drivers/Audio ION/ADSP Loader, dsp/codecs - Native encoders and decoders, soc - SoC based drivers(pinctrl/regmap/soundwire) Restructure drivers to above folder format. Include directories also follow above format. Change-Id: I8fa0857baaacd47db126fb5c1f1f5ed7e886dbc0 Signed-off-by: Laxminath Kasam <lkasam@codeaurora.org>
This commit is contained in:
Laxminath Kasam
committad av
Martin Fick
Martin Fick
förälder
84f7f73144
incheckning
605b42f92c
853
asoc/codecs/wcd9xxx-irq.c
Normal file
853
asoc/codecs/wcd9xxx-irq.c
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@@ -0,0 +1,853 @@
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/* Copyright (c) 2011-2017, The Linux Foundation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 and
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* only version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/bitops.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/irq.h>
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#include <linux/mfd/core.h>
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#include <linux/regmap.h>
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#include <linux/delay.h>
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#include <linux/irqdomain.h>
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#include <linux/interrupt.h>
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#include <linux/of.h>
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#include <linux/of_irq.h>
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#include <linux/slab.h>
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#include <linux/ratelimit.h>
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#include <soc/qcom/pm.h>
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#include <linux/gpio.h>
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#include <linux/of_gpio.h>
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#include <linux/mfd/wcd9xxx/wcd9xxx_registers.h>
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#include "core.h"
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#include "wcd9xxx-irq.h"
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#define BYTE_BIT_MASK(nr) (1UL << ((nr) % BITS_PER_BYTE))
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#define BIT_BYTE(nr) ((nr) / BITS_PER_BYTE)
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#define WCD9XXX_SYSTEM_RESUME_TIMEOUT_MS 100
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#ifndef NO_IRQ
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#define NO_IRQ (-1)
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#endif
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#ifdef CONFIG_OF
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struct wcd9xxx_irq_drv_data {
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struct irq_domain *domain;
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int irq;
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};
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#endif
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static int virq_to_phyirq(
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struct wcd9xxx_core_resource *wcd9xxx_res, int virq);
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static int phyirq_to_virq(
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struct wcd9xxx_core_resource *wcd9xxx_res, int irq);
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static unsigned int wcd9xxx_irq_get_upstream_irq(
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struct wcd9xxx_core_resource *wcd9xxx_res);
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static void wcd9xxx_irq_put_upstream_irq(
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struct wcd9xxx_core_resource *wcd9xxx_res);
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static int wcd9xxx_map_irq(
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struct wcd9xxx_core_resource *wcd9xxx_res, int irq);
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static void wcd9xxx_irq_lock(struct irq_data *data)
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{
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struct wcd9xxx_core_resource *wcd9xxx_res =
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irq_data_get_irq_chip_data(data);
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mutex_lock(&wcd9xxx_res->irq_lock);
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}
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static void wcd9xxx_irq_sync_unlock(struct irq_data *data)
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{
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struct wcd9xxx_core_resource *wcd9xxx_res =
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irq_data_get_irq_chip_data(data);
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int i;
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if ((ARRAY_SIZE(wcd9xxx_res->irq_masks_cur) >
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WCD9XXX_MAX_IRQ_REGS) ||
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(ARRAY_SIZE(wcd9xxx_res->irq_masks_cache) >
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WCD9XXX_MAX_IRQ_REGS)) {
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pr_err("%s: Array Size out of bound\n", __func__);
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return;
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}
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if (!wcd9xxx_res->wcd_core_regmap) {
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pr_err("%s: Codec core regmap not defined\n",
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__func__);
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return;
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}
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for (i = 0; i < ARRAY_SIZE(wcd9xxx_res->irq_masks_cur); i++) {
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/* If there's been a change in the mask write it back
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* to the hardware.
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*/
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if (wcd9xxx_res->irq_masks_cur[i] !=
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wcd9xxx_res->irq_masks_cache[i]) {
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wcd9xxx_res->irq_masks_cache[i] =
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wcd9xxx_res->irq_masks_cur[i];
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regmap_write(wcd9xxx_res->wcd_core_regmap,
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wcd9xxx_res->intr_reg[WCD9XXX_INTR_MASK_BASE] + i,
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wcd9xxx_res->irq_masks_cur[i]);
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}
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}
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mutex_unlock(&wcd9xxx_res->irq_lock);
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}
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static void wcd9xxx_irq_enable(struct irq_data *data)
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{
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struct wcd9xxx_core_resource *wcd9xxx_res =
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irq_data_get_irq_chip_data(data);
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int wcd9xxx_irq = virq_to_phyirq(wcd9xxx_res, data->irq);
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int byte = BIT_BYTE(wcd9xxx_irq);
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int size = ARRAY_SIZE(wcd9xxx_res->irq_masks_cur);
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if ((byte < size) && (byte >= 0)) {
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wcd9xxx_res->irq_masks_cur[byte] &=
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~(BYTE_BIT_MASK(wcd9xxx_irq));
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} else {
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pr_err("%s: Array size is %d but index is %d: Out of range\n",
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__func__, size, byte);
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}
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}
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static void wcd9xxx_irq_disable(struct irq_data *data)
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{
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struct wcd9xxx_core_resource *wcd9xxx_res =
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irq_data_get_irq_chip_data(data);
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int wcd9xxx_irq = virq_to_phyirq(wcd9xxx_res, data->irq);
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int byte = BIT_BYTE(wcd9xxx_irq);
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int size = ARRAY_SIZE(wcd9xxx_res->irq_masks_cur);
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if ((byte < size) && (byte >= 0)) {
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wcd9xxx_res->irq_masks_cur[byte]
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|= BYTE_BIT_MASK(wcd9xxx_irq);
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} else {
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pr_err("%s: Array size is %d but index is %d: Out of range\n",
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__func__, size, byte);
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}
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}
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static void wcd9xxx_irq_ack(struct irq_data *data)
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{
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int wcd9xxx_irq = 0;
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struct wcd9xxx_core_resource *wcd9xxx_res =
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irq_data_get_irq_chip_data(data);
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if (wcd9xxx_res == NULL) {
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pr_err("%s: wcd9xxx_res is NULL\n", __func__);
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return;
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}
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wcd9xxx_irq = virq_to_phyirq(wcd9xxx_res, data->irq);
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pr_debug("%s: IRQ_ACK called for WCD9XXX IRQ: %d\n",
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__func__, wcd9xxx_irq);
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}
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static void wcd9xxx_irq_mask(struct irq_data *d)
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{
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/* do nothing but required as linux calls irq_mask without NULL check */
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}
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static struct irq_chip wcd9xxx_irq_chip = {
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.name = "wcd9xxx",
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.irq_bus_lock = wcd9xxx_irq_lock,
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.irq_bus_sync_unlock = wcd9xxx_irq_sync_unlock,
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.irq_disable = wcd9xxx_irq_disable,
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.irq_enable = wcd9xxx_irq_enable,
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.irq_mask = wcd9xxx_irq_mask,
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.irq_ack = wcd9xxx_irq_ack,
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};
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bool wcd9xxx_lock_sleep(
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struct wcd9xxx_core_resource *wcd9xxx_res)
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{
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enum wcd9xxx_pm_state os;
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/*
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* wcd9xxx_{lock/unlock}_sleep will be called by wcd9xxx_irq_thread
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* and its subroutines only motly.
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* but btn0_lpress_fn is not wcd9xxx_irq_thread's subroutine and
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* It can race with wcd9xxx_irq_thread.
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* So need to embrace wlock_holders with mutex.
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*
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* If system didn't resume, we can simply return false so codec driver's
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* IRQ handler can return without handling IRQ.
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* As interrupt line is still active, codec will have another IRQ to
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* retry shortly.
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*/
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mutex_lock(&wcd9xxx_res->pm_lock);
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if (wcd9xxx_res->wlock_holders++ == 0) {
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pr_debug("%s: holding wake lock\n", __func__);
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pm_qos_update_request(&wcd9xxx_res->pm_qos_req,
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msm_cpuidle_get_deep_idle_latency());
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pm_stay_awake(wcd9xxx_res->dev);
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}
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mutex_unlock(&wcd9xxx_res->pm_lock);
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if (!wait_event_timeout(wcd9xxx_res->pm_wq,
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((os = wcd9xxx_pm_cmpxchg(wcd9xxx_res,
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WCD9XXX_PM_SLEEPABLE,
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WCD9XXX_PM_AWAKE)) ==
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WCD9XXX_PM_SLEEPABLE ||
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(os == WCD9XXX_PM_AWAKE)),
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msecs_to_jiffies(
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WCD9XXX_SYSTEM_RESUME_TIMEOUT_MS))) {
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pr_warn("%s: system didn't resume within %dms, s %d, w %d\n",
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__func__,
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WCD9XXX_SYSTEM_RESUME_TIMEOUT_MS, wcd9xxx_res->pm_state,
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wcd9xxx_res->wlock_holders);
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wcd9xxx_unlock_sleep(wcd9xxx_res);
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return false;
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}
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wake_up_all(&wcd9xxx_res->pm_wq);
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return true;
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}
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EXPORT_SYMBOL(wcd9xxx_lock_sleep);
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void wcd9xxx_unlock_sleep(
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struct wcd9xxx_core_resource *wcd9xxx_res)
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{
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mutex_lock(&wcd9xxx_res->pm_lock);
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if (--wcd9xxx_res->wlock_holders == 0) {
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pr_debug("%s: releasing wake lock pm_state %d -> %d\n",
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__func__, wcd9xxx_res->pm_state, WCD9XXX_PM_SLEEPABLE);
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/*
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* if wcd9xxx_lock_sleep failed, pm_state would be still
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* WCD9XXX_PM_ASLEEP, don't overwrite
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*/
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if (likely(wcd9xxx_res->pm_state == WCD9XXX_PM_AWAKE))
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wcd9xxx_res->pm_state = WCD9XXX_PM_SLEEPABLE;
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pm_qos_update_request(&wcd9xxx_res->pm_qos_req,
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PM_QOS_DEFAULT_VALUE);
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pm_relax(wcd9xxx_res->dev);
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}
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mutex_unlock(&wcd9xxx_res->pm_lock);
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wake_up_all(&wcd9xxx_res->pm_wq);
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}
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EXPORT_SYMBOL(wcd9xxx_unlock_sleep);
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void wcd9xxx_nested_irq_lock(struct wcd9xxx_core_resource *wcd9xxx_res)
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{
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mutex_lock(&wcd9xxx_res->nested_irq_lock);
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}
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void wcd9xxx_nested_irq_unlock(struct wcd9xxx_core_resource *wcd9xxx_res)
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{
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mutex_unlock(&wcd9xxx_res->nested_irq_lock);
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}
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static void wcd9xxx_irq_dispatch(struct wcd9xxx_core_resource *wcd9xxx_res,
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struct intr_data *irqdata)
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{
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int irqbit = irqdata->intr_num;
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if (!wcd9xxx_res->wcd_core_regmap) {
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pr_err("%s: codec core regmap not defined\n",
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__func__);
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return;
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}
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if (irqdata->clear_first) {
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wcd9xxx_nested_irq_lock(wcd9xxx_res);
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regmap_write(wcd9xxx_res->wcd_core_regmap,
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wcd9xxx_res->intr_reg[WCD9XXX_INTR_CLEAR_BASE] +
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BIT_BYTE(irqbit),
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BYTE_BIT_MASK(irqbit));
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if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
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regmap_write(wcd9xxx_res->wcd_core_regmap,
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wcd9xxx_res->intr_reg[WCD9XXX_INTR_CLR_COMMIT],
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0x02);
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handle_nested_irq(phyirq_to_virq(wcd9xxx_res, irqbit));
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wcd9xxx_nested_irq_unlock(wcd9xxx_res);
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} else {
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wcd9xxx_nested_irq_lock(wcd9xxx_res);
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handle_nested_irq(phyirq_to_virq(wcd9xxx_res, irqbit));
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regmap_write(wcd9xxx_res->wcd_core_regmap,
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wcd9xxx_res->intr_reg[WCD9XXX_INTR_CLEAR_BASE] +
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BIT_BYTE(irqbit),
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BYTE_BIT_MASK(irqbit));
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if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
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regmap_write(wcd9xxx_res->wcd_core_regmap,
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wcd9xxx_res->intr_reg[WCD9XXX_INTR_CLR_COMMIT],
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0x02);
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wcd9xxx_nested_irq_unlock(wcd9xxx_res);
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}
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}
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static irqreturn_t wcd9xxx_irq_thread(int irq, void *data)
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{
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int ret;
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int i;
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struct intr_data irqdata;
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char linebuf[128];
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static DEFINE_RATELIMIT_STATE(ratelimit, 5 * HZ, 1);
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struct wcd9xxx_core_resource *wcd9xxx_res = data;
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int num_irq_regs = wcd9xxx_res->num_irq_regs;
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u8 status[4], status1[4] = {0}, unmask_status[4] = {0};
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if (unlikely(wcd9xxx_lock_sleep(wcd9xxx_res) == false)) {
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dev_err(wcd9xxx_res->dev, "Failed to hold suspend\n");
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return IRQ_NONE;
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}
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if (!wcd9xxx_res->wcd_core_regmap) {
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dev_err(wcd9xxx_res->dev,
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"%s: Codec core regmap not supplied\n",
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__func__);
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goto err_disable_irq;
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}
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memset(status, 0, sizeof(status));
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ret = regmap_bulk_read(wcd9xxx_res->wcd_core_regmap,
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wcd9xxx_res->intr_reg[WCD9XXX_INTR_STATUS_BASE],
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status, num_irq_regs);
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if (ret < 0) {
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dev_err(wcd9xxx_res->dev,
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"Failed to read interrupt status: %d\n", ret);
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goto err_disable_irq;
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}
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/*
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* If status is 0 return without clearing.
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* status contains: HW status - masked interrupts
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* status1 contains: unhandled interrupts - masked interrupts
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* unmasked_status contains: unhandled interrupts
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*/
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if (unlikely(!memcmp(status, status1, sizeof(status)))) {
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pr_debug("%s: status is 0\n", __func__);
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wcd9xxx_unlock_sleep(wcd9xxx_res);
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return IRQ_HANDLED;
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}
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/*
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* Copy status to unmask_status before masking, otherwise SW may miss
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* to clear masked interrupt in corner case.
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*/
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memcpy(unmask_status, status, sizeof(unmask_status));
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/* Apply masking */
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for (i = 0; i < num_irq_regs; i++)
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status[i] &= ~wcd9xxx_res->irq_masks_cur[i];
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memcpy(status1, status, sizeof(status1));
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/* Find out which interrupt was triggered and call that interrupt's
|
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* handler function
|
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*
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* Since codec has only one hardware irq line which is shared by
|
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* codec's different internal interrupts, so it's possible master irq
|
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* handler dispatches multiple nested irq handlers after breaking
|
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* order. Dispatch interrupts in the order that is maintained by
|
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* the interrupt table.
|
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*/
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for (i = 0; i < wcd9xxx_res->intr_table_size; i++) {
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irqdata = wcd9xxx_res->intr_table[i];
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if (status[BIT_BYTE(irqdata.intr_num)] &
|
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BYTE_BIT_MASK(irqdata.intr_num)) {
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wcd9xxx_irq_dispatch(wcd9xxx_res, &irqdata);
|
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status1[BIT_BYTE(irqdata.intr_num)] &=
|
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~BYTE_BIT_MASK(irqdata.intr_num);
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unmask_status[BIT_BYTE(irqdata.intr_num)] &=
|
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~BYTE_BIT_MASK(irqdata.intr_num);
|
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}
|
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}
|
||||
|
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/*
|
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* As a failsafe if unhandled irq is found, clear it to prevent
|
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* interrupt storm.
|
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* Note that we can say there was an unhandled irq only when no irq
|
||||
* handled by nested irq handler since Taiko supports qdsp as irqs'
|
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* destination for few irqs. Therefore driver shouldn't clear pending
|
||||
* irqs when few handled while few others not.
|
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*/
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if (unlikely(!memcmp(status, status1, sizeof(status)))) {
|
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if (__ratelimit(&ratelimit)) {
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pr_warn("%s: Unhandled irq found\n", __func__);
|
||||
hex_dump_to_buffer(status, sizeof(status), 16, 1,
|
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linebuf, sizeof(linebuf), false);
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pr_warn("%s: status0 : %s\n", __func__, linebuf);
|
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hex_dump_to_buffer(status1, sizeof(status1), 16, 1,
|
||||
linebuf, sizeof(linebuf), false);
|
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pr_warn("%s: status1 : %s\n", __func__, linebuf);
|
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}
|
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/*
|
||||
* unmask_status contains unhandled interrupts, hence clear all
|
||||
* unhandled interrupts.
|
||||
*/
|
||||
ret = regmap_bulk_write(wcd9xxx_res->wcd_core_regmap,
|
||||
wcd9xxx_res->intr_reg[WCD9XXX_INTR_CLEAR_BASE],
|
||||
unmask_status, num_irq_regs);
|
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if (wcd9xxx_get_intf_type() == WCD9XXX_INTERFACE_TYPE_I2C)
|
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regmap_write(wcd9xxx_res->wcd_core_regmap,
|
||||
wcd9xxx_res->intr_reg[WCD9XXX_INTR_CLR_COMMIT],
|
||||
0x02);
|
||||
}
|
||||
wcd9xxx_unlock_sleep(wcd9xxx_res);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
|
||||
err_disable_irq:
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dev_err(wcd9xxx_res->dev,
|
||||
"Disable irq %d\n", wcd9xxx_res->irq);
|
||||
|
||||
disable_irq_wake(wcd9xxx_res->irq);
|
||||
disable_irq_nosync(wcd9xxx_res->irq);
|
||||
wcd9xxx_unlock_sleep(wcd9xxx_res);
|
||||
return IRQ_NONE;
|
||||
}
|
||||
|
||||
/**
|
||||
* wcd9xxx_free_irq
|
||||
*
|
||||
* @wcd9xxx_res: pointer to core resource
|
||||
* irq: irq number
|
||||
* @data: data pointer
|
||||
*
|
||||
*/
|
||||
void wcd9xxx_free_irq(struct wcd9xxx_core_resource *wcd9xxx_res,
|
||||
int irq, void *data)
|
||||
{
|
||||
free_irq(phyirq_to_virq(wcd9xxx_res, irq), data);
|
||||
}
|
||||
EXPORT_SYMBOL(wcd9xxx_free_irq);
|
||||
|
||||
/**
|
||||
* wcd9xxx_enable_irq
|
||||
*
|
||||
* @wcd9xxx_res: pointer to core resource
|
||||
* irq: irq number
|
||||
*
|
||||
*/
|
||||
void wcd9xxx_enable_irq(struct wcd9xxx_core_resource *wcd9xxx_res, int irq)
|
||||
{
|
||||
if (wcd9xxx_res->irq)
|
||||
enable_irq(phyirq_to_virq(wcd9xxx_res, irq));
|
||||
}
|
||||
EXPORT_SYMBOL(wcd9xxx_enable_irq);
|
||||
|
||||
/**
|
||||
* wcd9xxx_disable_irq
|
||||
*
|
||||
* @wcd9xxx_res: pointer to core resource
|
||||
* irq: irq number
|
||||
*
|
||||
*/
|
||||
void wcd9xxx_disable_irq(struct wcd9xxx_core_resource *wcd9xxx_res, int irq)
|
||||
{
|
||||
if (wcd9xxx_res->irq)
|
||||
disable_irq_nosync(phyirq_to_virq(wcd9xxx_res, irq));
|
||||
}
|
||||
EXPORT_SYMBOL(wcd9xxx_disable_irq);
|
||||
|
||||
/**
|
||||
* wcd9xxx_disable_irq_sync
|
||||
*
|
||||
* @wcd9xxx_res: pointer to core resource
|
||||
* irq: irq number
|
||||
*
|
||||
*/
|
||||
void wcd9xxx_disable_irq_sync(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res, int irq)
|
||||
{
|
||||
if (wcd9xxx_res->irq)
|
||||
disable_irq(phyirq_to_virq(wcd9xxx_res, irq));
|
||||
}
|
||||
EXPORT_SYMBOL(wcd9xxx_disable_irq_sync);
|
||||
|
||||
static int wcd9xxx_irq_setup_downstream_irq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
int irq, virq, ret;
|
||||
|
||||
pr_debug("%s: enter\n", __func__);
|
||||
|
||||
for (irq = 0; irq < wcd9xxx_res->num_irqs; irq++) {
|
||||
/* Map OF irq */
|
||||
virq = wcd9xxx_map_irq(wcd9xxx_res, irq);
|
||||
pr_debug("%s: irq %d -> %d\n", __func__, irq, virq);
|
||||
if (virq == NO_IRQ) {
|
||||
pr_err("%s, No interrupt specifier for irq %d\n",
|
||||
__func__, irq);
|
||||
return NO_IRQ;
|
||||
}
|
||||
|
||||
ret = irq_set_chip_data(virq, wcd9xxx_res);
|
||||
if (ret) {
|
||||
pr_err("%s: Failed to configure irq %d (%d)\n",
|
||||
__func__, irq, ret);
|
||||
return ret;
|
||||
}
|
||||
|
||||
if (wcd9xxx_res->irq_level_high[irq])
|
||||
irq_set_chip_and_handler(virq, &wcd9xxx_irq_chip,
|
||||
handle_level_irq);
|
||||
else
|
||||
irq_set_chip_and_handler(virq, &wcd9xxx_irq_chip,
|
||||
handle_edge_irq);
|
||||
|
||||
irq_set_nested_thread(virq, 1);
|
||||
}
|
||||
|
||||
pr_debug("%s: leave\n", __func__);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
/**
|
||||
* wcd9xxx_irq_init
|
||||
*
|
||||
* @wcd9xxx_res: pointer to core resource
|
||||
*
|
||||
* Returns 0 on success, appropriate error code otherwise
|
||||
*/
|
||||
int wcd9xxx_irq_init(struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
int i, ret;
|
||||
u8 irq_level[wcd9xxx_res->num_irq_regs];
|
||||
struct irq_domain *domain;
|
||||
struct device_node *pnode;
|
||||
|
||||
mutex_init(&wcd9xxx_res->irq_lock);
|
||||
mutex_init(&wcd9xxx_res->nested_irq_lock);
|
||||
|
||||
pnode = of_irq_find_parent(wcd9xxx_res->dev->of_node);
|
||||
if (unlikely(!pnode))
|
||||
return -EINVAL;
|
||||
|
||||
domain = irq_find_host(pnode);
|
||||
if (unlikely(!domain))
|
||||
return -EINVAL;
|
||||
|
||||
wcd9xxx_res->domain = domain;
|
||||
|
||||
wcd9xxx_res->irq = wcd9xxx_irq_get_upstream_irq(wcd9xxx_res);
|
||||
if (!wcd9xxx_res->irq) {
|
||||
pr_warn("%s: irq driver is not yet initialized\n", __func__);
|
||||
mutex_destroy(&wcd9xxx_res->irq_lock);
|
||||
mutex_destroy(&wcd9xxx_res->nested_irq_lock);
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
pr_debug("%s: probed irq %d\n", __func__, wcd9xxx_res->irq);
|
||||
|
||||
/* Setup downstream IRQs */
|
||||
ret = wcd9xxx_irq_setup_downstream_irq(wcd9xxx_res);
|
||||
if (ret) {
|
||||
pr_err("%s: Failed to setup downstream IRQ\n", __func__);
|
||||
wcd9xxx_irq_put_upstream_irq(wcd9xxx_res);
|
||||
mutex_destroy(&wcd9xxx_res->irq_lock);
|
||||
mutex_destroy(&wcd9xxx_res->nested_irq_lock);
|
||||
return ret;
|
||||
}
|
||||
|
||||
/* All other wcd9xxx interrupts are edge triggered */
|
||||
wcd9xxx_res->irq_level_high[0] = true;
|
||||
|
||||
/* mask all the interrupts */
|
||||
memset(irq_level, 0, wcd9xxx_res->num_irq_regs);
|
||||
for (i = 0; i < wcd9xxx_res->num_irqs; i++) {
|
||||
wcd9xxx_res->irq_masks_cur[BIT_BYTE(i)] |= BYTE_BIT_MASK(i);
|
||||
wcd9xxx_res->irq_masks_cache[BIT_BYTE(i)] |= BYTE_BIT_MASK(i);
|
||||
irq_level[BIT_BYTE(i)] |=
|
||||
wcd9xxx_res->irq_level_high[i] << (i % BITS_PER_BYTE);
|
||||
}
|
||||
|
||||
if (!wcd9xxx_res->wcd_core_regmap) {
|
||||
dev_err(wcd9xxx_res->dev,
|
||||
"%s: Codec core regmap not defined\n",
|
||||
__func__);
|
||||
ret = -EINVAL;
|
||||
goto fail_irq_init;
|
||||
}
|
||||
|
||||
for (i = 0; i < wcd9xxx_res->num_irq_regs; i++) {
|
||||
/* Initialize interrupt mask and level registers */
|
||||
regmap_write(wcd9xxx_res->wcd_core_regmap,
|
||||
wcd9xxx_res->intr_reg[WCD9XXX_INTR_LEVEL_BASE] + i,
|
||||
irq_level[i]);
|
||||
regmap_write(wcd9xxx_res->wcd_core_regmap,
|
||||
wcd9xxx_res->intr_reg[WCD9XXX_INTR_MASK_BASE] + i,
|
||||
wcd9xxx_res->irq_masks_cur[i]);
|
||||
}
|
||||
|
||||
ret = request_threaded_irq(wcd9xxx_res->irq, NULL, wcd9xxx_irq_thread,
|
||||
IRQF_TRIGGER_HIGH | IRQF_ONESHOT,
|
||||
"wcd9xxx", wcd9xxx_res);
|
||||
if (ret != 0)
|
||||
dev_err(wcd9xxx_res->dev, "Failed to request IRQ %d: %d\n",
|
||||
wcd9xxx_res->irq, ret);
|
||||
else {
|
||||
ret = enable_irq_wake(wcd9xxx_res->irq);
|
||||
if (ret)
|
||||
dev_err(wcd9xxx_res->dev,
|
||||
"Failed to set wake interrupt on IRQ %d: %d\n",
|
||||
wcd9xxx_res->irq, ret);
|
||||
if (ret)
|
||||
free_irq(wcd9xxx_res->irq, wcd9xxx_res);
|
||||
}
|
||||
|
||||
if (ret)
|
||||
goto fail_irq_init;
|
||||
|
||||
return ret;
|
||||
|
||||
fail_irq_init:
|
||||
dev_err(wcd9xxx_res->dev,
|
||||
"%s: Failed to init wcd9xxx irq\n", __func__);
|
||||
wcd9xxx_irq_put_upstream_irq(wcd9xxx_res);
|
||||
mutex_destroy(&wcd9xxx_res->irq_lock);
|
||||
mutex_destroy(&wcd9xxx_res->nested_irq_lock);
|
||||
return ret;
|
||||
}
|
||||
EXPORT_SYMBOL(wcd9xxx_irq_init);
|
||||
|
||||
int wcd9xxx_request_irq(struct wcd9xxx_core_resource *wcd9xxx_res,
|
||||
int irq, irq_handler_t handler,
|
||||
const char *name, void *data)
|
||||
{
|
||||
int virq;
|
||||
|
||||
virq = phyirq_to_virq(wcd9xxx_res, irq);
|
||||
|
||||
return request_threaded_irq(virq, NULL, handler, IRQF_TRIGGER_RISING,
|
||||
name, data);
|
||||
}
|
||||
EXPORT_SYMBOL(wcd9xxx_request_irq);
|
||||
|
||||
void wcd9xxx_irq_exit(struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
dev_dbg(wcd9xxx_res->dev, "%s: Cleaning up irq %d\n", __func__,
|
||||
wcd9xxx_res->irq);
|
||||
|
||||
if (wcd9xxx_res->irq) {
|
||||
disable_irq_wake(wcd9xxx_res->irq);
|
||||
free_irq(wcd9xxx_res->irq, wcd9xxx_res);
|
||||
wcd9xxx_res->irq = 0;
|
||||
wcd9xxx_irq_put_upstream_irq(wcd9xxx_res);
|
||||
}
|
||||
mutex_destroy(&wcd9xxx_res->irq_lock);
|
||||
mutex_destroy(&wcd9xxx_res->nested_irq_lock);
|
||||
}
|
||||
|
||||
#ifndef CONFIG_OF
|
||||
static int phyirq_to_virq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res,
|
||||
int offset)
|
||||
{
|
||||
return wcd9xxx_res->irq_base + offset;
|
||||
}
|
||||
|
||||
static int virq_to_phyirq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res,
|
||||
int virq)
|
||||
{
|
||||
return virq - wcd9xxx_res->irq_base;
|
||||
}
|
||||
|
||||
static unsigned int wcd9xxx_irq_get_upstream_irq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
return wcd9xxx_res->irq;
|
||||
}
|
||||
|
||||
static void wcd9xxx_irq_put_upstream_irq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
/* Do nothing */
|
||||
}
|
||||
|
||||
static int wcd9xxx_map_irq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_core_res, int irq)
|
||||
{
|
||||
return phyirq_to_virq(wcd9xxx_core_res, irq);
|
||||
}
|
||||
#else
|
||||
static struct wcd9xxx_irq_drv_data *
|
||||
wcd9xxx_irq_add_domain(struct device_node *node,
|
||||
struct device_node *parent)
|
||||
{
|
||||
struct wcd9xxx_irq_drv_data *data = NULL;
|
||||
|
||||
pr_debug("%s: node %s, node parent %s\n", __func__,
|
||||
node->name, node->parent->name);
|
||||
|
||||
data = kzalloc(sizeof(*data), GFP_KERNEL);
|
||||
if (!data)
|
||||
return NULL;
|
||||
|
||||
/*
|
||||
* wcd9xxx_intc interrupt controller supports N to N irq mapping with
|
||||
* single cell binding with irq numbers(offsets) only.
|
||||
* Use irq_domain_simple_ops that has irq_domain_simple_map and
|
||||
* irq_domain_xlate_onetwocell.
|
||||
*/
|
||||
data->domain = irq_domain_add_linear(node, WCD9XXX_MAX_NUM_IRQS,
|
||||
&irq_domain_simple_ops, data);
|
||||
if (!data->domain) {
|
||||
kfree(data);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return data;
|
||||
}
|
||||
|
||||
static struct wcd9xxx_irq_drv_data *
|
||||
wcd9xxx_get_irq_drv_d(const struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
struct irq_domain *domain;
|
||||
|
||||
domain = wcd9xxx_res->domain;
|
||||
|
||||
if (domain)
|
||||
return domain->host_data;
|
||||
else
|
||||
return NULL;
|
||||
}
|
||||
|
||||
static int phyirq_to_virq(struct wcd9xxx_core_resource *wcd9xxx_res, int offset)
|
||||
{
|
||||
struct wcd9xxx_irq_drv_data *data;
|
||||
|
||||
data = wcd9xxx_get_irq_drv_d(wcd9xxx_res);
|
||||
if (!data) {
|
||||
pr_warn("%s: not registered to interrupt controller\n",
|
||||
__func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
return irq_linear_revmap(data->domain, offset);
|
||||
}
|
||||
|
||||
static int virq_to_phyirq(struct wcd9xxx_core_resource *wcd9xxx_res, int virq)
|
||||
{
|
||||
struct irq_data *irq_data = irq_get_irq_data(virq);
|
||||
|
||||
if (unlikely(!irq_data)) {
|
||||
pr_err("%s: irq_data is NULL", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
return irq_data->hwirq;
|
||||
}
|
||||
|
||||
static unsigned int wcd9xxx_irq_get_upstream_irq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
struct wcd9xxx_irq_drv_data *data;
|
||||
|
||||
data = wcd9xxx_get_irq_drv_d(wcd9xxx_res);
|
||||
if (!data) {
|
||||
pr_err("%s: interrupt controller is not registered\n",
|
||||
__func__);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* Make sure data is updated before return. */
|
||||
rmb();
|
||||
return data->irq;
|
||||
}
|
||||
|
||||
static void wcd9xxx_irq_put_upstream_irq(
|
||||
struct wcd9xxx_core_resource *wcd9xxx_res)
|
||||
{
|
||||
wcd9xxx_res->domain = NULL;
|
||||
}
|
||||
|
||||
static int wcd9xxx_map_irq(struct wcd9xxx_core_resource *wcd9xxx_res, int irq)
|
||||
{
|
||||
return of_irq_to_resource(wcd9xxx_res->dev->of_node, irq, NULL);
|
||||
}
|
||||
|
||||
static int wcd9xxx_irq_probe(struct platform_device *pdev)
|
||||
{
|
||||
int irq, dir_apps_irq = -EINVAL;
|
||||
struct wcd9xxx_irq_drv_data *data;
|
||||
struct device_node *node = pdev->dev.of_node;
|
||||
int ret = -EINVAL;
|
||||
|
||||
irq = of_get_named_gpio(node, "qcom,gpio-connect", 0);
|
||||
if (!gpio_is_valid(irq))
|
||||
dir_apps_irq = platform_get_irq_byname(pdev, "wcd_irq");
|
||||
|
||||
if (!gpio_is_valid(irq) && dir_apps_irq < 0) {
|
||||
dev_err(&pdev->dev, "TLMM connect gpio not found\n");
|
||||
return -EPROBE_DEFER;
|
||||
}
|
||||
if (dir_apps_irq > 0) {
|
||||
irq = dir_apps_irq;
|
||||
} else {
|
||||
irq = gpio_to_irq(irq);
|
||||
if (irq < 0) {
|
||||
dev_err(&pdev->dev, "Unable to configure irq\n");
|
||||
return irq;
|
||||
}
|
||||
}
|
||||
dev_dbg(&pdev->dev, "%s: virq = %d\n", __func__, irq);
|
||||
data = wcd9xxx_irq_add_domain(node, node->parent);
|
||||
if (!data) {
|
||||
pr_err("%s: irq_add_domain failed\n", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
data->irq = irq;
|
||||
|
||||
/* Make sure irq is saved before return. */
|
||||
wmb();
|
||||
ret = 0;
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int wcd9xxx_irq_remove(struct platform_device *pdev)
|
||||
{
|
||||
struct irq_domain *domain;
|
||||
struct wcd9xxx_irq_drv_data *data;
|
||||
|
||||
domain = irq_find_host(pdev->dev.of_node);
|
||||
if (unlikely(!domain)) {
|
||||
pr_err("%s: domain is NULL", __func__);
|
||||
return -EINVAL;
|
||||
}
|
||||
data = (struct wcd9xxx_irq_drv_data *)domain->host_data;
|
||||
data->irq = 0;
|
||||
|
||||
/* Make sure irq variable is updated in data, before irq removal. */
|
||||
wmb();
|
||||
irq_domain_remove(data->domain);
|
||||
kfree(data);
|
||||
domain->host_data = NULL;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static const struct of_device_id of_match[] = {
|
||||
{ .compatible = "qcom,wcd9xxx-irq" },
|
||||
{ }
|
||||
};
|
||||
|
||||
static struct platform_driver wcd9xxx_irq_driver = {
|
||||
.probe = wcd9xxx_irq_probe,
|
||||
.remove = wcd9xxx_irq_remove,
|
||||
.driver = {
|
||||
.name = "wcd9xxx_intc",
|
||||
.owner = THIS_MODULE,
|
||||
.of_match_table = of_match_ptr(of_match),
|
||||
},
|
||||
};
|
||||
|
||||
int wcd9xxx_irq_drv_init(void)
|
||||
{
|
||||
return platform_driver_register(&wcd9xxx_irq_driver);
|
||||
}
|
||||
|
||||
void wcd9xxx_irq_drv_exit(void)
|
||||
{
|
||||
platform_driver_unregister(&wcd9xxx_irq_driver);
|
||||
}
|
||||
#endif /* CONFIG_OF */
|
||||
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